Re: [PATCH edk2-platforms 1/5] Platform/Socionext/DeveloperBox: fix PCIe slot to B/D/F mapping

[Leif Lindholm <leif.lindholm@linaro.org>]

On Wed, Feb 28, 2018 at 04:18:50PM +0000, Ard Biesheuvel wrote:
> On 28 February 2018 at 16:17, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> > On Tue, Feb 27, 2018 at 09:20:13AM +0000, Ard Biesheuvel wrote:
> >> Fix the static B/D/F specifiers that refer to the pair of x1 PCIe slots
> >> on the DeveloperBox PCB.
> >
> > What is the user-observable problem that is addressed by this patch?
> 
> That limiting the speed of slot 1 affects slot 2

Could you add that to the commit message please?
Something like "The current configuration caused user-configurable
settings for slots 1/2 to apply to the incorrect one.".

> >> Contributed-under: TianoCore Contribution Agreement 1.1
> >> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> >> ---
> >>  Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h | 4 ++--
> >>  1 file changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h b/Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h
> >> index ee2357be9a06..2d3d5cd91be0 100644
> >> --- a/Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h
> >> +++ b/Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h
> >> @@ -62,7 +62,7 @@
> >>
> >>  #define SYNQUACER_PCI_LOCATION(s,b,d)       (((s) << 16) | ((b) << 8) | (d))
> >>  #define SYNQUACER_PCI_SLOT0_LOCATION        SYNQUACER_PCI_LOCATION(1, 0, 0)
> >> -#define SYNQUACER_PCI_SLOT1_LOCATION        SYNQUACER_PCI_LOCATION(0, 1, 7)
> >> -#define SYNQUACER_PCI_SLOT2_LOCATION        SYNQUACER_PCI_LOCATION(0, 1, 3)
> >> +#define SYNQUACER_PCI_SLOT1_LOCATION        SYNQUACER_PCI_LOCATION(0, 1, 3)
> >> +#define SYNQUACER_PCI_SLOT2_LOCATION        SYNQUACER_PCI_LOCATION(0, 1, 7)
> >>
> >>  #endif
> >> --
> >> 2.11.0
> >>