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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: edk2-devel@lists.01.org
Cc: leif.lindholm@linaro.org, graeme.gregory@linaro.org,
	masahisa.kojima@linaro.org,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: [PATCH edk2-platforms v2 6/7] Silicon/SynQuacer/AcpiTables: disable PCI RCs if ECAM ghosts are detected
Date: Wed, 28 Feb 2018 19:24:20 +0000	[thread overview]
Message-ID: <20180228192421.17684-7-ard.biesheuvel@linaro.org> (raw)
In-Reply-To: <20180228192421.17684-1-ard.biesheuvel@linaro.org>

We have a couple of workarounds available for the ECAM ghosting issue
that affects the Synopsys Designware PCIe RCs. First of all, we can be
optimistic and hope that the silicon gets fixed at some point. Then,
there is a SCP firmware hack that hides these ghosts by remapping the
ECAM region using the SMMU sitting between the CPU and the PCIe RC
slave interface. Finally, we have a workaround involving stage 2
translation tables that may be enabled at will using a DIP switch on
the board.

Instead of adding elaborate logic to infer which of these situations we
may find ourselves in, let's just test for the symptom directly in the
_STA method implementation of the PNP0A08 devices, and deactivate the
device if the ECAM space does not appear sane.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl | 40 ++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl
index 1735264f09a3..5ffed663e17d 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl
@@ -31,6 +31,26 @@ DefinitionBlock ("SsdtPci.aml", "SSDT", 1, "SNI", "SYNQUACR",
         Name (_BBN, Zero)                // PCI Base Bus Number
         Name (_CCA, 1)                   // Cache Coherency Attribute
 
+        OperationRegion (BDF1, SystemMemory, SYNQUACER_PCI_SEG0_CONFIG_BASE, 0x10000)
+        Field (BDF1, DWordAcc, NoLock, Preserve) {
+            Offset (0x8000),
+            VPID, 16,
+        }
+
+        Method (_STA, 0x0, Serialized) {
+            //
+            // Check whether the VID/PID of device #1 on bus #0 equals 0xffff.
+            // If this is not the case, we are dealing with a ghost device,
+            // which means we are running with outdated SCP firmware and we
+            // should keep this PCIe RC disabled.
+            //
+            Store (VPID, local1)
+            If (!LEqual (local1, 0xffff)) {
+                Return (0x0)
+            }
+            Return (0xf)
+        }
+
         // PCI Routing Table
         Name (_PRT, Package () {
             Package () { 0xFFFF, 0, Zero, 222 },   // INTA
@@ -149,6 +169,26 @@ DefinitionBlock ("SsdtPci.aml", "SSDT", 1, "SNI", "SYNQUACR",
         Name (_BBN, Zero)                // PCI Base Bus Number
         Name (_CCA, 1)                   // Cache Coherency Attribute
 
+        OperationRegion (BDF1, SystemMemory, SYNQUACER_PCI_SEG1_CONFIG_BASE, 0x10000)
+        Field (BDF1, DWordAcc, NoLock, Preserve) {
+            Offset (0x8000),
+            VPID, 16,
+        }
+
+        Method (_STA, 0x0, Serialized) {
+            //
+            // Check whether the VID/PID of device #1 on bus #0 equals 0xffff.
+            // If this is not the case, we are dealing with a ghost device,
+            // which means we are running with outdated SCP firmware and we
+            // should keep this PCIe RC disabled.
+            //
+            Store (VPID, local1)
+            If (!LEqual (local1, 0xffff)) {
+                Return (0x0)
+            }
+            Return (0xf)
+        }
+
         // PCI Routing Table
         Name (_PRT, Package () {
             Package () { 0xFFFF, 0, Zero, 214 },   // INTA
-- 
2.11.0



  parent reply	other threads:[~2018-02-28 19:18 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-28 19:24 [PATCH edk2-platforms v2 0/7] SynQuacer ACPI support Ard Biesheuvel
2018-02-28 19:24 ` [PATCH edk2-platforms v2 1/7] Platform/Socionext/DeveloperBox: fix PCIe slot to B/D/F mapping Ard Biesheuvel
2018-02-28 19:24 ` [PATCH edk2-platforms v2 2/7] Silicon/SynQuacer: tweak PCI I/O windows for ACPI/Linux support Ard Biesheuvel
2018-02-28 19:24 ` [PATCH edk2-platforms v2 3/7] Silicon/SynQuacer: add ACPI drivers and tables Ard Biesheuvel
2018-02-28 19:24 ` [PATCH edk2-platforms v2 4/7] Silicon/SynQuacer/PlatformDxe: add option to enable ACPI mode Ard Biesheuvel
2018-02-28 19:24 ` [PATCH edk2-platforms v2 5/7] Silicon/SynQuacer/PlatformDxe: add ACPI description of eMMC Ard Biesheuvel
2018-02-28 19:24 ` Ard Biesheuvel [this message]
2018-02-28 19:24 ` [PATCH edk2-platforms v2 7/7] Silicon/SynQuacer/AcpiTables: take presence detect of PCI0 into account Ard Biesheuvel
2018-02-28 20:21 ` [PATCH edk2-platforms v2 0/7] SynQuacer ACPI support Leif Lindholm
2018-03-01 11:23 ` Graeme Gregory (Linaro)
2018-03-01 11:24   ` Ard Biesheuvel
2018-03-15 16:06     ` Ard Biesheuvel

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