[PATCH 11/20] OvmfPkg/SmmCpuFeaturesLib: upper-case the "static" keyword

[Laszlo Ersek <lersek@redhat.com>]

In edk2, the "static" keyword is spelled "STATIC". Also let "STATIC" stand
alone on a line in function definitions.

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
---
 OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c b/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
index a876a6e34751..6b9924e49426 100644
--- a/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
+++ b/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
@@ -427,61 +427,61 @@ typedef struct {
 ///
 /// Structure used to build a lookup table to retrieve the widths and offsets
 /// associated with each supported EFI_SMM_SAVE_STATE_REGISTER value
 ///
 
 #define SMM_SAVE_STATE_REGISTER_FIRST_INDEX             1
 
 typedef struct {
   UINT8   Width32;
   UINT8   Width64;
   UINT16  Offset32;
   UINT16  Offset64Lo;
   UINT16  Offset64Hi;
   BOOLEAN Writeable;
 } CPU_SMM_SAVE_STATE_LOOKUP_ENTRY;
 
 ///
 /// Table used by GetRegisterIndex() to convert an EFI_SMM_SAVE_STATE_REGISTER
 /// value to an index into a table of type CPU_SMM_SAVE_STATE_LOOKUP_ENTRY
 ///
-static CONST CPU_SMM_SAVE_STATE_REGISTER_RANGE mSmmCpuRegisterRanges[] = {
+STATIC CONST CPU_SMM_SAVE_STATE_REGISTER_RANGE mSmmCpuRegisterRanges[] = {
   SMM_REGISTER_RANGE (
     EFI_SMM_SAVE_STATE_REGISTER_GDTBASE,
     EFI_SMM_SAVE_STATE_REGISTER_LDTINFO
     ),
   SMM_REGISTER_RANGE (
     EFI_SMM_SAVE_STATE_REGISTER_ES,
     EFI_SMM_SAVE_STATE_REGISTER_RIP
     ),
   SMM_REGISTER_RANGE (
     EFI_SMM_SAVE_STATE_REGISTER_RFLAGS,
     EFI_SMM_SAVE_STATE_REGISTER_CR4
     ),
   { (EFI_SMM_SAVE_STATE_REGISTER)0, (EFI_SMM_SAVE_STATE_REGISTER)0, 0 }
 };
 
 ///
 /// Lookup table used to retrieve the widths and offsets associated with each
 /// supported EFI_SMM_SAVE_STATE_REGISTER value
 ///
-static CONST CPU_SMM_SAVE_STATE_LOOKUP_ENTRY mSmmCpuWidthOffset[] = {
+STATIC CONST CPU_SMM_SAVE_STATE_LOOKUP_ENTRY mSmmCpuWidthOffset[] = {
   {
     0,                                    // Width32
     0,                                    // Width64
     0,                                    // Offset32
     0,                                    // Offset64Lo
     0,                                    // Offset64Hi
     FALSE                                 // Writeable
   }, // Reserved
 
   //
   // CPU Save State registers defined in PI SMM CPU Protocol.
   //
   {
     0,                                    // Width32
     8,                                    // Width64
     0,                                    // Offset32
     SMM_CPU_OFFSET (x64._GDTRBase),       // Offset64Lo
     SMM_CPU_OFFSET (x64._GDTRBase) + 4,   // Offset64Hi
     FALSE                                 // Writeable
   }, // EFI_SMM_SAVE_STATE_REGISTER_GDTBASE = 4
@@ -816,41 +816,42 @@ static CONST CPU_SMM_SAVE_STATE_LOOKUP_ENTRY mSmmCpuWidthOffset[] = {
     0,                                    // Offset32
     SMM_CPU_OFFSET (x64._CR4),            // Offset64Lo
     SMM_CPU_OFFSET (x64._CR4) + 4,        // Offset64Hi
     FALSE                                 // Writeable
   }, // EFI_SMM_SAVE_STATE_REGISTER_CR4 = 54
 };
 
 //
 // No support for I/O restart
 //
 
 /**
   Read information from the CPU save state.
 
   @param  Register  Specifies the CPU register to read form the save state.
 
   @retval 0   Register is not valid
   @retval >0  Index into mSmmCpuWidthOffset[] associated with Register
 
 **/
-static UINTN
+STATIC
+UINTN
 GetRegisterIndex (
   IN EFI_SMM_SAVE_STATE_REGISTER  Register
   )
 {
   UINTN  Index;
   UINTN  Offset;
 
   for (Index = 0, Offset = SMM_SAVE_STATE_REGISTER_FIRST_INDEX;
        mSmmCpuRegisterRanges[Index].Length != 0;
        Index++) {
     if (Register >= mSmmCpuRegisterRanges[Index].Start &&
         Register <= mSmmCpuRegisterRanges[Index].End) {
       return Register - mSmmCpuRegisterRanges[Index].Start + Offset;
     }
     Offset += mSmmCpuRegisterRanges[Index].Length;
   }
   return 0;
 }
 
 /**
@@ -859,41 +860,42 @@ GetRegisterIndex (
   This function abstracts the differences that whether the CPU Save State
   register is in the IA32 CPU Save State Map or X64 CPU Save State Map.
 
   This function supports reading a CPU Save State register in SMBase relocation
   handler.
 
   @param[in]  CpuIndex       Specifies the zero-based index of the CPU save
                              state.
   @param[in]  RegisterIndex  Index into mSmmCpuWidthOffset[] look up table.
   @param[in]  Width          The number of bytes to read from the CPU save
                              state.
   @param[out] Buffer         Upon return, this holds the CPU register value
                              read from the save state.
 
   @retval EFI_SUCCESS           The register was read from Save State.
   @retval EFI_NOT_FOUND         The register is not defined for the Save State
                                 of Processor.
   @retval EFI_INVALID_PARAMTER  This or Buffer is NULL.
 
 **/
-static EFI_STATUS
+STATIC
+EFI_STATUS
 ReadSaveStateRegisterByIndex (
   IN UINTN   CpuIndex,
   IN UINTN   RegisterIndex,
   IN UINTN   Width,
   OUT VOID   *Buffer
   )
 {
   QEMU_SMRAM_SAVE_STATE_MAP  *CpuSaveState;
 
   CpuSaveState = (QEMU_SMRAM_SAVE_STATE_MAP *)gSmst->CpuSaveState[CpuIndex];
 
   if ((CpuSaveState->x86.SMMRevId & 0xFFFF) == 0) {
     //
     // If 32-bit mode width is zero, then the specified register can not be
     // accessed
     //
     if (mSmmCpuWidthOffset[RegisterIndex].Width32 == 0) {
       return EFI_NOT_FOUND;
     }
 
-- 
2.14.1.3.gb7cf6e02401b