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From: Guo Heyi <heyi.guo@linaro.org>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Heyi Guo <heyi.guo@linaro.org>,
	edk2-devel@lists.01.org, Yi Li <phoenix.liyi@huawei.com>,
	Leif Lindholm <leif.lindholm@linaro.org>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: Re: [PATCH v2 1/1] ArmPkg/TimerDxe: Add ISB for timer compare value reload
Date: Wed, 14 Mar 2018 08:25:09 +0800	[thread overview]
Message-ID: <20180314002509.GE96299@SZX1000114654> (raw)
In-Reply-To: <0403f2bf-d6a8-b101-73a2-949946f71e46@arm.com>

On Tue, Mar 13, 2018 at 09:33:33AM +0000, Marc Zyngier wrote:
> On 13/03/18 00:31, Heyi Guo wrote:
> > If timer interrupt is level sensitive, reloading timer compare
> > register has a side effect of clearing GIC pending status, so a "ISB"
> > is needed to make sure this instruction is executed before enabling
> > CPU IRQ, or else we may get spurious timer interrupts.
> > 
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> > Signed-off-by: Yi Li <phoenix.liyi@huawei.com>
> > Cc: Leif Lindholm <leif.lindholm@linaro.org>
> > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > Cc: Marc Zyngier <marc.zyngier@arm.com>
> > ---
> > 
> > Notes:
> >     v2:
> >     - Use ISB instead of DSB [Marc]
> >     - Update commit message accordingly.
> > 
> >  ArmPkg/Drivers/TimerDxe/TimerDxe.c | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/ArmPkg/Drivers/TimerDxe/TimerDxe.c b/ArmPkg/Drivers/TimerDxe/TimerDxe.c
> > index 33d7c922221f..32abee8726a0 100644
> > --- a/ArmPkg/Drivers/TimerDxe/TimerDxe.c
> > +++ b/ArmPkg/Drivers/TimerDxe/TimerDxe.c
> > @@ -337,6 +337,7 @@ TimerInterruptHandler (
> >  
> >      // Set next compare value
> >      ArmGenericTimerSetCompareVal (CompareValue);
> > +    ArmInstructionSynchronizationBarrier ();
> >      ArmGenericTimerEnableTimer ();
> >    }
> 
> Sorry for being pedantic here, but it would make more sense if ISB was
> placed after the enabling of the timer. Otherwise, you only force the
> update of the comparator. But on the other hand, the timer was never
> disabled the first place, in which case you'd wonder why you're trying
> to enable it again.
Yes, I also had such question and hesitated at this place :)
> 
> So either you leave the ISB here and remove the enable call, or move the
> ISB after the enable.

If we are going to remove the enable call, is it better to be changed in a
separate patch? It seems not related with adding ISB, though it is only a
one-line change.

Thanks and regards,
Heyi

> 
> Thanks,
> 
> 	M.
> -- 
> Jazz is not dead. It just smells funny...


  reply	other threads:[~2018-03-14  0:18 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-13  0:31 [PATCH v2 0/1] ArmPkg/TimerDxe: Add ISB for timer compare value reload Heyi Guo
2018-03-13  0:31 ` [PATCH v2 1/1] " Heyi Guo
2018-03-13  9:33   ` Marc Zyngier
2018-03-14  0:25     ` Guo Heyi [this message]
2018-03-14  7:45       ` Marc Zyngier
2018-03-14 14:50         ` Ard Biesheuvel
2018-03-15  7:11           ` Guo Heyi
2018-03-15  7:30             ` Ard Biesheuvel
2018-03-15  9:40               ` Marc Zyngier
2018-03-15  9:52                 ` Ard Biesheuvel
2018-03-15 10:02                   ` Marc Zyngier

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