From: Laszlo Ersek <lersek@redhat.com>
To: edk2-devel-01 <edk2-devel@lists.01.org>
Cc: Eric Dong <eric.dong@intel.com>,
Michael D Kinney <michael.d.kinney@intel.com>
Subject: [PATCH v2 13/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmInitStack" with PatchInstructionX86()
Date: Fri, 23 Mar 2018 22:15:02 +0100 [thread overview]
Message-ID: <20180323211504.22434-14-lersek@redhat.com> (raw)
In-Reply-To: <20180323211504.22434-1-lersek@redhat.com>
Rename the variable to "gPatchSmmInitStack" so that its association with
PatchInstructionX86() is clear from the declaration, change its type to
X86_ASSEMBLY_PATCH_LABEL, and patch it with PatchInstructionX86(). This
lets us remove the binary (DB) encoding of some instructions in
"SmmInit.nasm".
The size of the patched source operand is (sizeof (UINTN)).
Cc: Eric Dong <eric.dong@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=866
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
---
Notes:
v2:
- use the X86_ASSEMBLY_PATCH_LABEL type rather than UINT8 [Mike]
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 2 +-
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm | 6 +++---
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm | 6 +++---
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 6 +++++-
4 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index 856d5738c081..0281be9d88f0 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
@@ -302,7 +302,7 @@ extern UINT32 mSmmCr0;
X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;
extern UINT32 mSmmCr4;
X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr4;
-extern UINTN gSmmInitStack;
+X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack;
/**
Semaphore operation for all processor relocate SMMBase.
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
index f59413d9d4a3..5ff3cd2e731f 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
@@ -25,7 +25,7 @@ extern ASM_PFX(mSmmRelocationOriginalAddress)
global ASM_PFX(gPatchSmmCr3)
global ASM_PFX(gPatchSmmCr4)
global ASM_PFX(gPatchSmmCr0)
-global ASM_PFX(gSmmInitStack)
+global ASM_PFX(gPatchSmmInitStack)
global ASM_PFX(gcSmiInitGdtr)
global ASM_PFX(gcSmmInitSize)
global ASM_PFX(gcSmmInitTemplate)
@@ -72,8 +72,8 @@ BITS 32
mov fs, edi
mov gs, edi
mov ss, edi
- DB 0xbc ; mov esp, imm32
-ASM_PFX(gSmmInitStack): DD 0
+ mov esp, strict dword 0 ; source operand will be patched
+ASM_PFX(gPatchSmmInitStack):
call ASM_PFX(SmmInitHandler)
rsm
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
index 2460e1eb2dee..eae14c0549f0 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
@@ -25,7 +25,7 @@ extern ASM_PFX(mSmmRelocationOriginalAddress)
global ASM_PFX(gPatchSmmCr3)
global ASM_PFX(gPatchSmmCr4)
global ASM_PFX(gPatchSmmCr0)
-global ASM_PFX(gSmmInitStack)
+global ASM_PFX(gPatchSmmInitStack)
global ASM_PFX(gcSmiInitGdtr)
global ASM_PFX(gcSmmInitSize)
global ASM_PFX(gcSmmInitTemplate)
@@ -72,8 +72,8 @@ ASM_PFX(gPatchSmmCr0):
BITS 64
@LongMode: ; long-mode starts here
- DB 0x48, 0xbc ; mov rsp, imm64
-ASM_PFX(gSmmInitStack): DQ 0
+ mov rsp, strict qword 0 ; source operand will be patched
+ASM_PFX(gPatchSmmInitStack):
and sp, 0xfff0 ; make sure RSP is 16-byte aligned
;
; Accoring to X64 calling convention, XMM0~5 are volatile, we need to save
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
index 0c8a4543d865..fbf74e8d90f9 100755
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
@@ -848,7 +848,11 @@ PiCpuSmmEntry (
//
// Set SMI stack for SMM base relocation
//
- gSmmInitStack = (UINTN) (Stacks + mSmmStackSize - sizeof (UINTN));
+ PatchInstructionX86 (
+ gPatchSmmInitStack,
+ (UINTN) (Stacks + mSmmStackSize - sizeof (UINTN)),
+ sizeof (UINTN)
+ );
//
// Initialize IDT
--
2.14.1.3.gb7cf6e02401b
next prev parent reply other threads:[~2018-03-23 21:08 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-23 21:14 [PATCH v2 00/15] rid PiSmmCpuDxeSmm of DB-encoded instructions Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 01/15] MdePkg/BaseLib.h: state preprocessing conditions in comments after #endifs Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 02/15] MdePkg/BaseLib: add PatchInstructionX86() Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 03/15] UefiCpuPkg/PiSmmCpuDxeSmm: remove *.S and *.asm assembly files Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 04/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmbase" with PatchInstructionX86() Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 05/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmiStack" " Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 06/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmiCr3" " Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 07/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "XdSupported" " Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 08/15] UefiCpuPkg/PiSmmCpuDxeSmm: remove unneeded DBs from X64 SmmStartup() Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 09/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmCr3" with PatchInstructionX86() Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 10/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmCr4" " Laszlo Ersek
2018-03-23 21:15 ` [PATCH v2 11/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmCr0" " Laszlo Ersek
2018-03-23 21:15 ` [PATCH v2 12/15] UefiCpuPkg/PiSmmCpuDxeSmm: eliminate "gSmmJmpAddr" and related DBs Laszlo Ersek
2018-03-23 21:15 ` Laszlo Ersek [this message]
2018-03-23 21:15 ` [PATCH v2 14/15] UefiCpuPkg/PiSmmCpuDxeSmm: remove DBs from SmmRelocationSemaphoreComplete32() Laszlo Ersek
2018-03-23 21:15 ` [PATCH v2 15/15] UefiCpuPkg/PiSmmCpuDxeSmm: use mnemonics for FXSAVE(64)/FXRSTOR(64) Laszlo Ersek
2018-04-03 12:57 ` [PATCH v2 00/15] rid PiSmmCpuDxeSmm of DB-encoded instructions Laszlo Ersek
2018-04-04 8:56 ` Gao, Liming
2018-04-04 15:02 ` Laszlo Ersek
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