From: Laszlo Ersek <lersek@redhat.com>
To: edk2-devel-01 <edk2-devel@lists.01.org>
Cc: Eric Dong <eric.dong@intel.com>,
Michael D Kinney <michael.d.kinney@intel.com>
Subject: [PATCH v2 15/15] UefiCpuPkg/PiSmmCpuDxeSmm: use mnemonics for FXSAVE(64)/FXRSTOR(64)
Date: Fri, 23 Mar 2018 22:15:04 +0100 [thread overview]
Message-ID: <20180323211504.22434-16-lersek@redhat.com> (raw)
In-Reply-To: <20180323211504.22434-1-lersek@redhat.com>
NASM introduced FXSAVE / FXRSTOR support in commit 900fa5b26b8f ("NASM
0.98p3-hpa", 2002-04-30), which commit stands for the nasm-0.98p3-hpa
release.
NASM introduced FXSAVE64 / FXRSTOR64 support in commit 3a014348ca15
("insns: add FXSAVE64/FXRSTOR64, drop np prefix", 2010-07-07), which was
part of the "nasm-2.09" release.
Edk2 requires nasm-2.10 or later for use with the GCC toolchain family,
and nasm-2.12.01 or later for use with all other toolchain families.
Replace the binary encoding of the FXSAVE(64)/FXRSTOR(64) instructions
with mnemonics.
I verified that the "Ia32/SmiException.obj", "X64/SmiEntry.obj" and
"X64/SmiException.obj" files are rebuilt after this patch, without any
change in content.
This patch removes the last instructions encoded with DBs from
PiSmmCpuDxeSmm.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=866
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
---
Notes:
v2:
- new in v2
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm | 8 ++++----
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 6 ++----
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm | 4 ++--
3 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm
index 7c80a6ae91c2..fa02c1016ce7 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm
@@ -382,7 +382,7 @@ ASM_PFX(PageFaultIdtHandlerSmmProfile):
;; FX_SAVE_STATE_IA32 FxSaveState;
sub esp, 512
mov edi, esp
- db 0xf, 0xae, 0x7 ;fxsave [edi]
+ fxsave [edi]
; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
cld
@@ -410,7 +410,7 @@ ASM_PFX(PageFaultIdtHandlerSmmProfile):
;; FX_SAVE_STATE_IA32 FxSaveState;
mov esi, esp
- db 0xf, 0xae, 0xe ; fxrstor [esi]
+ fxrstor [esi]
add esp, 512
;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
@@ -582,7 +582,7 @@ PFHandlerEntry:
clts
sub esp, 512
mov edi, esp
- db 0xf, 0xae, 0x7 ;fxsave [edi]
+ fxsave [edi]
; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
cld
@@ -612,7 +612,7 @@ PFHandlerEntry:
;; FX_SAVE_STATE_IA32 FxSaveState;
mov esi, esp
- db 0xf, 0xae, 0xe ; fxrstor [esi]
+ fxrstor [esi]
add esp, 512
;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
index 5d731e228095..97c7b01d0db7 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
@@ -182,8 +182,7 @@ _SmiHandler:
; Save FP registers
;
sub rsp, 0x200
- DB 0x48 ; FXSAVE64
- fxsave [rsp]
+ fxsave64 [rsp]
add rsp, -0x20
@@ -201,8 +200,7 @@ _SmiHandler:
;
; Restore FP registers
;
- DB 0x48 ; FXRSTOR64
- fxrstor [rsp]
+ fxrstor64 [rsp]
add rsp, 0x200
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm
index a8a9af300869..98c40949f583 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm
@@ -279,7 +279,7 @@ ASM_PFX(PageFaultIdtHandlerSmmProfile):
sub rsp, 512
mov rdi, rsp
- db 0xf, 0xae, 00000111y ;fxsave [rdi]
+ fxsave [rdi]
; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear
cld
@@ -309,7 +309,7 @@ ASM_PFX(PageFaultIdtHandlerSmmProfile):
;; FX_SAVE_STATE_X64 FxSaveState;
mov rsi, rsp
- db 0xf, 0xae, 00001110y ; fxrstor [rsi]
+ fxrstor [rsi]
add rsp, 512
;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
--
2.14.1.3.gb7cf6e02401b
next prev parent reply other threads:[~2018-03-23 21:08 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-23 21:14 [PATCH v2 00/15] rid PiSmmCpuDxeSmm of DB-encoded instructions Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 01/15] MdePkg/BaseLib.h: state preprocessing conditions in comments after #endifs Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 02/15] MdePkg/BaseLib: add PatchInstructionX86() Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 03/15] UefiCpuPkg/PiSmmCpuDxeSmm: remove *.S and *.asm assembly files Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 04/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmbase" with PatchInstructionX86() Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 05/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmiStack" " Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 06/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmiCr3" " Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 07/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "XdSupported" " Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 08/15] UefiCpuPkg/PiSmmCpuDxeSmm: remove unneeded DBs from X64 SmmStartup() Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 09/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmCr3" with PatchInstructionX86() Laszlo Ersek
2018-03-23 21:14 ` [PATCH v2 10/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmCr4" " Laszlo Ersek
2018-03-23 21:15 ` [PATCH v2 11/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmCr0" " Laszlo Ersek
2018-03-23 21:15 ` [PATCH v2 12/15] UefiCpuPkg/PiSmmCpuDxeSmm: eliminate "gSmmJmpAddr" and related DBs Laszlo Ersek
2018-03-23 21:15 ` [PATCH v2 13/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmInitStack" with PatchInstructionX86() Laszlo Ersek
2018-03-23 21:15 ` [PATCH v2 14/15] UefiCpuPkg/PiSmmCpuDxeSmm: remove DBs from SmmRelocationSemaphoreComplete32() Laszlo Ersek
2018-03-23 21:15 ` Laszlo Ersek [this message]
2018-04-03 12:57 ` [PATCH v2 00/15] rid PiSmmCpuDxeSmm of DB-encoded instructions Laszlo Ersek
2018-04-04 8:56 ` Gao, Liming
2018-04-04 15:02 ` Laszlo Ersek
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