From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=66.187.233.73; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org Received: from mx1.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D9CF0223E0BA4 for ; Fri, 23 Mar 2018 14:08:46 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.rdu2.redhat.com [10.11.54.6]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A363EEAEB8; Fri, 23 Mar 2018 21:15:19 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-180.rdu2.redhat.com [10.10.120.180]) by smtp.corp.redhat.com (Postfix) with ESMTP id EDE68215CDAC; Fri, 23 Mar 2018 21:15:18 +0000 (UTC) From: Laszlo Ersek To: edk2-devel-01 Cc: Eric Dong , Michael D Kinney Date: Fri, 23 Mar 2018 22:14:53 +0100 Message-Id: <20180323211504.22434-5-lersek@redhat.com> In-Reply-To: <20180323211504.22434-1-lersek@redhat.com> References: <20180323211504.22434-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.6 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.1]); Fri, 23 Mar 2018 21:15:19 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.1]); Fri, 23 Mar 2018 21:15:19 +0000 (UTC) for IP:'10.11.54.6' DOMAIN:'int-mx06.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'lersek@redhat.com' RCPT:'' Subject: [PATCH v2 04/15] UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmbase" with PatchInstructionX86() X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Mar 2018 21:08:47 -0000 Rename the variable to "gPatchSmbase" so that its association with PatchInstructionX86() is clear from the declaration, change its type to X86_ASSEMBLY_PATCH_LABEL, and patch it with PatchInstructionX86(). This lets us remove the binary (DB) encoding of some instructions in "SmiEntry.nasm". Cc: Eric Dong Cc: Michael D Kinney Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=866 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek --- Notes: v2: - use the X86_ASSEMBLY_PATCH_LABEL type rather than UINT8 [Mike] UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 6 +++--- UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 6 +++--- UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c | 12 ++++++------ 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm index a8324a7f4a84..e6e29128e64e 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm @@ -46,7 +46,7 @@ global ASM_PFX(gcSmiHandlerTemplate) global ASM_PFX(gcSmiHandlerSize) global ASM_PFX(gSmiCr3) global ASM_PFX(gSmiStack) -global ASM_PFX(gSmbase) +global ASM_PFX(gPatchSmbase) global ASM_PFX(mXdSupported) extern ASM_PFX(gSmiHandlerIdtr) @@ -65,8 +65,8 @@ _SmiEntryPoint: o32 lgdt [cs:bx] ; lgdt fword ptr cs:[bx] mov ax, PROTECT_MODE_CS mov [cs:bx-0x2],ax - DB 0x66, 0xbf ; mov edi, SMBASE -ASM_PFX(gSmbase): DD 0 + mov edi, strict dword 0 ; source operand will be patched +ASM_PFX(gPatchSmbase): lea eax, [edi + (@32bit - _SmiEntryPoint) + 0x8000] mov [cs:bx-0x6],eax mov ebx, cr0 diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm index 697fd2bec7c6..0e314279a541 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm @@ -53,7 +53,7 @@ extern ASM_PFX(gSmiHandlerIdtr) extern ASM_PFX(CpuSmmDebugEntry) extern ASM_PFX(CpuSmmDebugExit) -global ASM_PFX(gSmbase) +global ASM_PFX(gPatchSmbase) global ASM_PFX(mXdSupported) global ASM_PFX(gSmiStack) global ASM_PFX(gSmiCr3) @@ -75,8 +75,8 @@ _SmiEntryPoint: o32 lgdt [cs:bx] ; lgdt fword ptr cs:[bx] mov ax, PROTECT_MODE_CS mov [cs:bx-0x2],ax - DB 0x66, 0xbf ; mov edi, SMBASE -ASM_PFX(gSmbase): DD 0 + mov edi, strict dword 0 ; source operand will be patched +ASM_PFX(gPatchSmbase): lea eax, [edi + (@ProtectedMode - _SmiEntryPoint) + 0x8000] mov [cs:bx-0x6],eax mov ebx, cr0 diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c b/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c index 3188d438181c..d34345d5ff80 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c @@ -105,11 +105,11 @@ typedef struct { /// /// Variables from SMI Handler /// -extern UINT32 gSmbase; -extern volatile UINT32 gSmiStack; -extern UINT32 gSmiCr3; -extern volatile UINT8 gcSmiHandlerTemplate[]; -extern CONST UINT16 gcSmiHandlerSize; +X86_ASSEMBLY_PATCH_LABEL gPatchSmbase; +extern volatile UINT32 gSmiStack; +extern UINT32 gSmiCr3; +extern volatile UINT8 gcSmiHandlerTemplate[]; +extern CONST UINT16 gcSmiHandlerSize; // // Variables used by SMI Handler @@ -718,7 +718,7 @@ InstallSmiHandler ( // gSmiStack = (UINT32)((UINTN)SmiStack + StackSize - sizeof (UINTN)); gSmiCr3 = Cr3; - gSmbase = SmBase; + PatchInstructionX86 (gPatchSmbase, SmBase, 4); gSmiHandlerIdtr.Base = IdtBase; gSmiHandlerIdtr.Limit = (UINT16)(IdtSize - 1); -- 2.14.1.3.gb7cf6e02401b