* [PATCH 1/2] MdePkg/Library/BaseSynchronizationLib: Enable VS2017/ARM64 builds
2018-03-28 15:55 [PATCH 0/2] MdePkg/Library: Add missing .asm files for VS2017/ARM64 Pete Batard
@ 2018-03-28 15:55 ` Pete Batard
2018-03-28 15:55 ` [PATCH 2/2] MdePkg/Library/BaseCpuLib: " Pete Batard
2018-03-29 2:46 ` [PATCH 0/2] MdePkg/Library: Add missing .asm files for VS2017/ARM64 Gao, Liming
2 siblings, 0 replies; 4+ messages in thread
From: Pete Batard @ 2018-03-28 15:55 UTC (permalink / raw)
To: edk2-devel; +Cc: liming.gao, ard.biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
---
MdePkg/Library/BaseSynchronizationLib/AArch64/Synchronization.asm | 205 ++++++++++++++++++++
MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf | 3 +-
2 files changed, 207 insertions(+), 1 deletion(-)
diff --git a/MdePkg/Library/BaseSynchronizationLib/AArch64/Synchronization.asm b/MdePkg/Library/BaseSynchronizationLib/AArch64/Synchronization.asm
new file mode 100644
index 000000000000..0b13b2662120
--- /dev/null
+++ b/MdePkg/Library/BaseSynchronizationLib/AArch64/Synchronization.asm
@@ -0,0 +1,205 @@
+; Implementation of synchronization functions for ARM architecture (AArch64)
+;
+; Copyright (c) 2012-2015, ARM Limited. All rights reserved.
+; Copyright (c) 2015, Linaro Limited. All rights reserved.
+;
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;
+
+ EXPORT InternalSyncCompareExchange16
+ EXPORT InternalSyncCompareExchange32
+ EXPORT InternalSyncCompareExchange64
+ EXPORT InternalSyncIncrement
+ EXPORT InternalSyncDecrement
+ AREA BaseSynchronizationLib_LowLevel, CODE, READONLY
+
+;/**
+; Performs an atomic compare exchange operation on a 16-bit unsigned integer.
+;
+; Performs an atomic compare exchange operation on the 16-bit unsigned integer
+; specified by Value. If Value is equal to CompareValue, then Value is set to
+; ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+; then Value is returned. The compare exchange operation must be performed using
+; MP safe mechanisms.
+;
+; @param Value A pointer to the 16-bit value for the compare exchange
+; operation.
+; @param CompareValue 16-bit value used in compare operation.
+; @param ExchangeValue 16-bit value used in exchange operation.
+;
+; @return The original *Value before exchange.
+;
+;**/
+;UINT16
+;EFIAPI
+;InternalSyncCompareExchange16 (
+; IN volatile UINT16 *Value,
+; IN UINT16 CompareValue,
+; IN UINT16 ExchangeValue
+; )
+InternalSyncCompareExchange16
+ uxth w1, w1
+ uxth w2, w2
+ dmb sy
+
+InternalSyncCompareExchange16Again
+ ldxrh w3, [x0]
+ cmp w3, w1
+ bne InternalSyncCompareExchange16Fail
+
+InternalSyncCompareExchange16Exchange
+ stxrh w4, w2, [x0]
+ cbnz w4, InternalSyncCompareExchange16Again
+
+InternalSyncCompareExchange16Fail
+ dmb sy
+ mov w0, w3
+ ret
+
+;/**
+; Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+;
+; Performs an atomic compare exchange operation on the 32-bit unsigned integer
+; specified by Value. If Value is equal to CompareValue, then Value is set to
+; ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+; then Value is returned. The compare exchange operation must be performed using
+; MP safe mechanisms.
+;
+; @param Value A pointer to the 32-bit value for the compare exchange
+; operation.
+; @param CompareValue 32-bit value used in compare operation.
+; @param ExchangeValue 32-bit value used in exchange operation.
+;
+; @return The original *Value before exchange.
+;
+;**/
+;UINT32
+;EFIAPI
+;InternalSyncCompareExchange32 (
+; IN volatile UINT32 *Value,
+; IN UINT32 CompareValue,
+; IN UINT32 ExchangeValue
+; )
+InternalSyncCompareExchange32
+ dmb sy
+
+InternalSyncCompareExchange32Again
+ ldxr w3, [x0]
+ cmp w3, w1
+ bne InternalSyncCompareExchange32Fail
+
+InternalSyncCompareExchange32Exchange
+ stxr w4, w2, [x0]
+ cbnz w4, InternalSyncCompareExchange32Again
+
+InternalSyncCompareExchange32Fail
+ dmb sy
+ mov w0, w3
+ ret
+
+;/**
+; Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+;
+; Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+; by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+; CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+; The compare exchange operation must be performed using MP safe mechanisms.
+;
+; @param Value A pointer to the 64-bit value for the compare exchange
+; operation.
+; @param CompareValue 64-bit value used in compare operation.
+; @param ExchangeValue 64-bit value used in exchange operation.
+;
+; @return The original *Value before exchange.
+;
+;**/
+;UINT64
+;EFIAPI
+;InternalSyncCompareExchange64 (
+; IN volatile UINT64 *Value,
+; IN UINT64 CompareValue,
+; IN UINT64 ExchangeValue
+; )
+InternalSyncCompareExchange64
+ dmb sy
+
+InternalSyncCompareExchange64Again
+ ldxr x3, [x0]
+ cmp x3, x1
+ bne InternalSyncCompareExchange64Fail
+
+InternalSyncCompareExchange64Exchange
+ stxr w4, x2, [x0]
+ cbnz w4, InternalSyncCompareExchange64Again
+
+InternalSyncCompareExchange64Fail
+ dmb sy
+ mov x0, x3
+ ret
+
+;/**
+; Performs an atomic increment of an 32-bit unsigned integer.
+;
+; Performs an atomic increment of the 32-bit unsigned integer specified by
+; Value and returns the incremented value. The increment operation must be
+; performed using MP safe mechanisms. The state of the return value is not
+; guaranteed to be MP safe.
+;
+; @param Value A pointer to the 32-bit value to increment.
+;
+; @return The incremented value.
+;
+;**/
+;UINT32
+;EFIAPI
+;InternalSyncIncrement (
+; IN volatile UINT32 *Value
+; )
+InternalSyncIncrement
+ dmb sy
+TryInternalSyncIncrement
+ ldxr w1, [x0]
+ add w1, w1, #1
+ stxr w2, w1, [x0]
+ cbnz w2, TryInternalSyncIncrement
+ mov w0, w1
+ dmb sy
+ ret
+
+;/**
+; Performs an atomic decrement of an 32-bit unsigned integer.
+;
+; Performs an atomic decrement of the 32-bit unsigned integer specified by
+; Value and returns the decrement value. The decrement operation must be
+; performed using MP safe mechanisms. The state of the return value is not
+; guaranteed to be MP safe.
+;
+; @param Value A pointer to the 32-bit value to decrement.
+;
+; @return The decrement value.
+;
+;**/
+;UINT32
+;EFIAPI
+;InternalSyncDecrement (
+; IN volatile UINT32 *Value
+; )
+InternalSyncDecrement
+ dmb sy
+TryInternalSyncDecrement
+ ldxr w1, [x0]
+ sub w1, w1, #1
+ stxr w2, w1, [x0]
+ cbnz w2, TryInternalSyncDecrement
+ mov w0, w1
+ dmb sy
+ ret
+
+ END
diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
index 265de1341a0f..6fca7dd29360 100755
--- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
@@ -105,7 +105,8 @@ [Sources.ARM]
[Sources.AARCH64]
Synchronization.c
- AArch64/Synchronization.S
+ AArch64/Synchronization.S | GCC
+ AArch64/Synchronization.asm | MSFT
[Packages]
MdePkg/MdePkg.dec
--
2.9.3.windows.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] MdePkg/Library/BaseCpuLib: Enable VS2017/ARM64 builds
2018-03-28 15:55 [PATCH 0/2] MdePkg/Library: Add missing .asm files for VS2017/ARM64 Pete Batard
2018-03-28 15:55 ` [PATCH 1/2] MdePkg/Library/BaseSynchronizationLib: Enable VS2017/ARM64 builds Pete Batard
@ 2018-03-28 15:55 ` Pete Batard
2018-03-29 2:46 ` [PATCH 0/2] MdePkg/Library: Add missing .asm files for VS2017/ARM64 Gao, Liming
2 siblings, 0 replies; 4+ messages in thread
From: Pete Batard @ 2018-03-28 15:55 UTC (permalink / raw)
To: edk2-devel; +Cc: liming.gao, ard.biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
---
MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm | 39 +++++++++++++++++++
MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.asm | 40 ++++++++++++++++++++
MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 8 ++--
3 files changed, 84 insertions(+), 3 deletions(-)
diff --git a/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm b/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm
new file mode 100644
index 000000000000..aee9049fba12
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.asm
@@ -0,0 +1,39 @@
+;------------------------------------------------------------------------------
+;
+; CpuFlushTlb() for ARM
+;
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ EXPORT CpuFlushTlb
+ AREA BaseCpuLib_LowLevel, CODE, READONLY
+
+;/**
+; Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+;
+; Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+;
+;**/
+;VOID
+;EFIAPI
+;CpuFlushTlb (
+; VOID
+; );
+;
+CpuFlushTlb
+ tlbi vmalle1 // Invalidate Inst TLB and Data TLB
+ dsb sy
+ isb
+ ret
+
+ END
diff --git a/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.asm b/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.asm
new file mode 100644
index 000000000000..7481c225d745
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------
+;
+; CpuSleep() for AArch64
+;
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+; Portions copyright (c) 2011 - 2013, ARM LTD. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ EXPORT CpuSleep
+ AREA BaseCpuLib_LowLevel, CODE, READONLY
+
+;/**
+; Places the CPU in a sleep state until an interrupt is received.
+;
+; Places the CPU in a sleep state until an interrupt is received. If interrupts
+; are disabled prior to calling this function, then the CPU will be placed in a
+; sleep state indefinitely.
+;
+;**/
+;VOID
+;EFIAPI
+;CpuSleep (
+; VOID
+; );
+;
+
+CpuSleep
+ wfi
+ ret
+
+ END
diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
index 996446ec1a38..dad08dfe7f54 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
@@ -1,7 +1,7 @@
## @file
# Instance of CPU Library for various architecture.
#
-# CPU Library implemented using ASM functions for IA-32 and X64,
+# CPU Library implemented using ASM functions for IA32, X64, ARM, AARCH64,
# PAL CALLs for IPF, and empty functions for EBC.
#
# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
@@ -71,8 +71,10 @@ [Sources.ARM]
Arm/CpuSleep.S | GCC
[Sources.AARCH64]
- AArch64/CpuFlushTlb.S | GCC
- AArch64/CpuSleep.S | GCC
+ AArch64/CpuFlushTlb.S | GCC
+ AArch64/CpuSleep.S | GCC
+ AArch64/CpuFlushTlb.asm | MSFT
+ AArch64/CpuSleep.asm | MSFT
[Packages]
MdePkg/MdePkg.dec
--
2.9.3.windows.2
^ permalink raw reply related [flat|nested] 4+ messages in thread