From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.101.70; helo=foss.arm.com; envelope-from=supreeth.venkatesh@arm.com; receiver=edk2-devel@lists.01.org Received: from foss.arm.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id CB85B22685255 for ; Fri, 6 Apr 2018 07:43:01 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A947B1529; Fri, 6 Apr 2018 07:43:01 -0700 (PDT) Received: from u201365.usa.Arm.com (bc-c3-3-14.eu.iaas.arm.com [10.6.43.238]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 323033F587; Fri, 6 Apr 2018 07:43:00 -0700 (PDT) From: Supreeth Venkatesh To: edk2-devel@lists.01.org Cc: michael.d.kinney@intel.com, liming.gao@intel.com, jiewen.yao@intel.com, achin.gupta@arm.com, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, Supreeth Venkatesh Date: Fri, 6 Apr 2018 15:42:09 +0100 Message-Id: <20180406144223.10931-5-supreeth.venkatesh@arm.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180406144223.10931-1-supreeth.venkatesh@arm.com> References: <20180406144223.10931-1-supreeth.venkatesh@arm.com> Subject: [PATCH v1 04/18] ArmPkg/ArmMmuLib: Add MMU Library suitable for use in S-EL0. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 06 Apr 2018 14:43:02 -0000 The Standalone MM environment runs in S-EL0 in AArch64 on ARM Standard Platforms. Privileged firmware e.g. ARM Trusted Firmware sets up its architectural context including the initial translation tables for the S-EL1/EL0 translation regime. The MM environment could still request ARM TF to change the memory attributes of memory regions during initialization. This patch adds a simple MMU library suitable for execution in S-EL0 and requesting operations from higher exception levels. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Achin Gupta Signed-off-by: Supreeth Venkatesh --- ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuSecLib.c | 146 ++++++++++++++++++++++++ 1 file changed, 146 insertions(+) create mode 100644 ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuSecLib.c diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuSecLib.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuSecLib.c new file mode 100644 index 0000000000..56969e31d1 --- /dev/null +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuSecLib.c @@ -0,0 +1,146 @@ +/** @file +* File managing the MMU for ARMv8 architecture in S-EL0 +* +* Copyright (c) 2017, ARM Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include +#include +#include + +#include +#include +#include +#include +#include + +EFI_STATUS +RequestMemoryPermissionChange( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length, + IN UINTN Permissions + ) +{ + EFI_STATUS Status; + ARM_SVC_ARGS ChangeMemoryPermissionsSvcArgs = {0}; + + ChangeMemoryPermissionsSvcArgs.Arg0 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64; + ChangeMemoryPermissionsSvcArgs.Arg1 = BaseAddress; + ChangeMemoryPermissionsSvcArgs.Arg2 = (Length >= EFI_PAGE_SIZE) ? \ + Length >> EFI_PAGE_SHIFT : 1; + ChangeMemoryPermissionsSvcArgs.Arg3 = Permissions; + + ArmCallSvc(&ChangeMemoryPermissionsSvcArgs); + + Status = ChangeMemoryPermissionsSvcArgs.Arg0; + + switch (Status) { + case ARM_SVC_SPM_RET_SUCCESS: + Status = EFI_SUCCESS; + break; + + case ARM_SVC_SPM_RET_NOT_SUPPORTED: + Status = EFI_UNSUPPORTED; + break; + + case ARM_SVC_SPM_RET_INVALID_PARAMS: + Status = EFI_INVALID_PARAMETER; + break; + + case ARM_SVC_SPM_RET_DENIED: + Status = EFI_ACCESS_DENIED; + break; + + case ARM_SVC_SPM_RET_NO_MEMORY: + Status = EFI_BAD_BUFFER_SIZE; + break; + + default: + Status = EFI_ACCESS_DENIED; + ASSERT (0); + } + + return Status; +} + +EFI_STATUS +ArmSetMemoryRegionNoExec ( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length + ) +{ + return RequestMemoryPermissionChange(BaseAddress, + Length, + SET_MEM_ATTR_MAKE_PERM_REQUEST( \ + SET_MEM_ATTR_DATA_PERM_RO, \ + SET_MEM_ATTR_CODE_PERM_XN)); +} + +EFI_STATUS +ArmClearMemoryRegionNoExec ( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length + ) +{ + return RequestMemoryPermissionChange(BaseAddress, + Length, + SET_MEM_ATTR_MAKE_PERM_REQUEST( \ + SET_MEM_ATTR_DATA_PERM_RO, \ + SET_MEM_ATTR_CODE_PERM_X)); +} + +EFI_STATUS +ArmSetMemoryRegionReadOnly ( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length + ) +{ + return RequestMemoryPermissionChange(BaseAddress, + Length, + SET_MEM_ATTR_MAKE_PERM_REQUEST( \ + SET_MEM_ATTR_DATA_PERM_RO, \ + SET_MEM_ATTR_CODE_PERM_XN)); +} + +EFI_STATUS +ArmClearMemoryRegionReadOnly ( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64 Length + ) +{ + return RequestMemoryPermissionChange(BaseAddress, + Length, + SET_MEM_ATTR_MAKE_PERM_REQUEST( \ + SET_MEM_ATTR_DATA_PERM_RW, \ + SET_MEM_ATTR_CODE_PERM_XN)); +} + +EFI_STATUS +EFIAPI +ArmConfigureMmu ( + IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable, + OUT VOID **TranslationTableBase OPTIONAL, + OUT UINTN *TranslationTableSize OPTIONAL + ) +{ + return EFI_UNSUPPORTED; +} + +EFI_STATUS +EFIAPI +ArmMmuSecLibConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_MM_SYSTEM_TABLE *MmSystemTable + ) +{ + return EFI_SUCCESS; +} -- 2.16.2