From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::242; helo=mail-wr0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x242.google.com (mail-wr0-x242.google.com [IPv6:2a00:1450:400c:c0c::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4504C22590E10 for ; Mon, 16 Apr 2018 23:03:27 -0700 (PDT) Received: by mail-wr0-x242.google.com with SMTP id q6so19836628wrd.6 for ; Mon, 16 Apr 2018 23:03:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=V6bp5k93mpuX5PU45EgpWPcWzEI1KY+tVscpJGnixLM=; b=U6BVxlJRlUchRejUk2vqCG1CoApjfC0CJkX57d9j3RoD1RfiAJK0ogxNhW54KRr7Oz Vs120V4Ccl/lt9xAolrxqFWgCtGyi2J+4Y1ZGct4w29twbkk1LuO6EJUA0h33dwLiJWR Bluo5kMtRzx+ZRiWkKQrRng8L4QLZK3wmkK/s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=V6bp5k93mpuX5PU45EgpWPcWzEI1KY+tVscpJGnixLM=; b=G3Fr6PALZjkXMddl3KGw32b77Ct8GZlWWQO+brFYq+Cf0vjAteryQRjxPwkQ2jr61R R/mUNXxeQSuJ7sdfEr2DOF1SfkA7xtOBf829KHg1PKCcyuTnnBAll2fQYvP1fDKpdKyd 818aZHvyXBR0UNoKktkVZNpqUn8vy6TaVUDZ5WuXRQY8W7LafiB4l0PC2mPEKs8FVq2Y b6OIkeI1D6AboL+JaRVfe3fu2j+O3JDA+IHv6vjIIyMvxMdvBsoHCBDgr/psznMeXsjV 0bCjYiAN1BN0zN/XmRrhDf3pqVIRatC7C7JWFBRtTIPwX5lrRFQ6IYzWicg3A1ZY1t8u Z7eA== X-Gm-Message-State: ALQs6tAT0yin0btRw6obs0VeM9EPJOHnilN3aO8orkKoR6UGEHIpwADm CgNYOOtOZWFIID+bM7Lk5+IaniMzsAM= X-Google-Smtp-Source: AIpwx4/tvOO7RcrynGcq+r1idcnXK9/29uYTOHzBVjP5HWUYqPQ1eiSe8iFXYXQjn/Urch/m4D3ccg== X-Received: by 10.223.171.86 with SMTP id r22mr509297wrc.228.1523945005324; Mon, 16 Apr 2018 23:03:25 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:3995:5470:200:1aff:fe1b:b328]) by smtp.gmail.com with ESMTPSA id h133sm9162224wmf.47.2018.04.16.23.03.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 16 Apr 2018 23:03:24 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, marc.zyngier@arm.com, lersek@redhat.com, Ard Biesheuvel , cross-distro@lists.linaro.org Date: Tue, 17 Apr 2018 08:03:20 +0200 Message-Id: <20180417060320.29090-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.0 Subject: [PATCH v2] ArmPkg/TimerDxe: remove workaround for KVM timer handling X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 17 Apr 2018 06:03:27 -0000 When we first ported EDK2 to KVM/arm, we implemented a workaround for the quirky timer handling on the KVM side. This has been fixed in Linux commit f120cd6533d2 ("KVM: arm/arm64: timer: Allow the timer to control the active state") dated 23 June 2014, which was incorporated into Linux release 4.3. So almost 4 years later, it should be safe to drop this workaround on the EDK2 side. This reverts commit b1a633434ddc. Cc: cross-distro@lists.linaro.org Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Acked-by: Marc Zyngier Reviewed-by: Leif Lindholm Acked-by: Laszlo Ersek --- v2: add acks Note to cross-distro readers: this means guest firmware built with this patch will not work on KVM/ARM hosts using kernel v4.2 or earlier. ArmPkg/Drivers/TimerDxe/TimerDxe.c | 1 - ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c | 10 ---------- 2 files changed, 11 deletions(-) diff --git a/ArmPkg/Drivers/TimerDxe/TimerDxe.c b/ArmPkg/Drivers/TimerDxe/TimerDxe.c index a3202fa056f3..bd616d2efc73 100644 --- a/ArmPkg/Drivers/TimerDxe/TimerDxe.c +++ b/ArmPkg/Drivers/TimerDxe/TimerDxe.c @@ -337,7 +337,6 @@ TimerInterruptHandler ( // Set next compare value ArmGenericTimerSetCompareVal (CompareValue); - ArmGenericTimerEnableTimer (); ArmInstructionSynchronizationBarrier (); } diff --git a/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c b/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c index 69a4ceb62db6..c941895a3574 100644 --- a/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c +++ b/ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c @@ -26,16 +26,6 @@ ArmGenericTimerEnableTimer ( TimerCtrlReg = ArmReadCntvCtl (); TimerCtrlReg |= ARM_ARCH_TIMER_ENABLE; - - // - // When running under KVM, we need to unmask the interrupt on the timer side - // as KVM will mask it when servicing the interrupt at the hypervisor level - // and delivering the virtual timer interrupt to the guest. Otherwise, the - // interrupt will fire again, trapping into the hypervisor again, etc. etc. - // This is scheduled to be fixed on the KVM side, but there is no harm in - // leaving this in once KVM gets fixed. - // - TimerCtrlReg &= ~ARM_ARCH_TIMER_IMASK; ArmWriteCntvCtl (TimerCtrlReg); } -- 2.17.0