* [PATCH edk2-platforms 0/5] Seattle spring cleaning
@ 2018-05-15 17:37 Ard Biesheuvel
2018-05-15 17:37 ` [PATCH edk2-platforms 1/5] Silicon/AMD/Styx: make ARM-TF and PSCI dependencies unconditional Ard Biesheuvel
` (5 more replies)
0 siblings, 6 replies; 8+ messages in thread
From: Ard Biesheuvel @ 2018-05-15 17:37 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, alan, neko, Ard Biesheuvel
Some cleanup patches for Seattle, removing the unused code that deals
with configurations where the SCP, ARM-TF or PSCI support are absent,
which is rather pointless for a platform that is no longer under
development.
Ard Biesheuvel (5):
Silicon/AMD/Styx: make ARM-TF and PSCI dependencies unconditional
Silicon/AMD/Styx: remove MpBootDxe driver
Silicon/AMD/Styx: remove support for the ACPI parking protocol
Silicon/AMD/Styx: make ISCP dependency unconditional
Platform/AMD/Overdrive: enable support for NVME PCIe devices
.../AMD/OverdriveBoard/OverdriveBoard.dsc | 20 +--
.../AMD/OverdriveBoard/OverdriveBoard.fdf | 6 +-
Platform/LeMaker/CelloBoard/CelloBoard.dsc | 3 -
.../Overdrive1000Board/Overdrive1000Board.dsc | 19 --
.../Overdrive1000Board/Overdrive1000Board.fdf | 5 -
Silicon/AMD/Styx/AcpiTables/AcpiTables.inf | 3 -
Silicon/AMD/Styx/AcpiTables/Fadt.c | 5 +-
Silicon/AMD/Styx/AcpiTables/Madt.c | 24 +--
Silicon/AMD/Styx/AmdStyx.dec | 12 --
Silicon/AMD/Styx/Common/Protocol/AmdMpBoot.h | 39 ----
.../AMD/Styx/Common/Protocol/AmdMpCoreInfo.h | 7 -
.../AMD/Styx/Drivers/MpBootDxe/MpBootDxe.c | 170 ------------------
.../AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf | 53 ------
.../AMD/Styx/Drivers/MpBootDxe/MpBootHelper.S | 87 ---------
.../Styx/Drivers/PlatInitDxe/PlatInitDxe.c | 91 ----------
.../Styx/Drivers/PlatInitDxe/PlatInitDxe.inf | 6 -
.../Styx/Drivers/PlatInitPei/PlatInitPei.c | 120 ++++++-------
.../Styx/Drivers/PlatInitPei/PlatInitPei.inf | 2 -
.../PlatformSmbiosDxe/PlatformSmbiosDxe.c | 40 -----
.../PlatformSmbiosDxe/PlatformSmbiosDxe.inf | 1 -
.../Library/MemoryInitPei/MemoryInitPeiLib.c | 58 +++---
.../MemoryInitPei/MemoryInitPeiLib.inf | 3 -
.../RealTimeClockLib/RealTimeClockLib.c | 16 +-
.../RealTimeClockLib/RealTimeClockLib.inf | 3 -
.../Library/ResetSystemLib/ResetSystemLib.inf | 3 -
.../StyxDtbLoaderLib/StyxDtbLoaderLib.inf | 2 -
26 files changed, 89 insertions(+), 709 deletions(-)
delete mode 100644 Silicon/AMD/Styx/Common/Protocol/AmdMpBoot.h
delete mode 100644 Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.c
delete mode 100644 Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf
delete mode 100644 Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootHelper.S
--
2.17.0
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH edk2-platforms 1/5] Silicon/AMD/Styx: make ARM-TF and PSCI dependencies unconditional
2018-05-15 17:37 [PATCH edk2-platforms 0/5] Seattle spring cleaning Ard Biesheuvel
@ 2018-05-15 17:37 ` Ard Biesheuvel
2018-05-15 17:37 ` [PATCH edk2-platforms 2/5] Silicon/AMD/Styx: remove MpBootDxe driver Ard Biesheuvel
` (4 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Ard Biesheuvel @ 2018-05-15 17:37 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, alan, neko, Ard Biesheuvel
The Styx platform theoretically supports running in an environment
where no ARM Trusted Firmware is running in EL3 and PSCI is not
implemented. This is not a configuration that we aim to support,
and so let's remove the code that implements this, especially because
it is essentially dead code and unmaintained.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 7 --
Platform/LeMaker/CelloBoard/CelloBoard.dsc | 1 -
Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc | 7 --
Silicon/AMD/Styx/AcpiTables/AcpiTables.inf | 2 -
Silicon/AMD/Styx/AcpiTables/Fadt.c | 5 +-
Silicon/AMD/Styx/AmdStyx.dec | 5 --
Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.c | 70 --------------------
Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.inf | 6 --
Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf | 1 -
Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c | 58 ++++++++--------
Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf | 1 -
Silicon/AMD/Styx/Library/ResetSystemLib/ResetSystemLib.inf | 3 -
Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf | 2 -
13 files changed, 29 insertions(+), 139 deletions(-)
diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
index 348828e18d44..86061cd4606f 100644
--- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
+++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
@@ -19,7 +19,6 @@ [Defines]
DEFINE DO_XGBE = 1
DEFINE NUM_CORES = 8
-DEFINE DO_PSCI = 1
DEFINE DO_ISCP = 1
DEFINE DO_KCS = 1
DEFINE DO_FLASHER = FALSE
@@ -457,12 +456,6 @@ [PcdsFixedAtBuild.common]
#
gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy|0xC000000000007FD1
-!if $(DO_PSCI)
- gAmdStyxTokenSpaceGuid.PcdPsciOsSupport|TRUE
-!else
- gAmdStyxTokenSpaceGuid.PcdPsciOsSupport|FALSE
-!endif
-
!if $(DO_ISCP)
gAmdStyxTokenSpaceGuid.PcdIscpSupport|TRUE
!else
diff --git a/Platform/LeMaker/CelloBoard/CelloBoard.dsc b/Platform/LeMaker/CelloBoard/CelloBoard.dsc
index 007c36412b93..80b096ba5587 100644
--- a/Platform/LeMaker/CelloBoard/CelloBoard.dsc
+++ b/Platform/LeMaker/CelloBoard/CelloBoard.dsc
@@ -431,7 +431,6 @@ [PcdsFixedAtBuild.common]
#
gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy|0xC000000000007FD1
- gAmdStyxTokenSpaceGuid.PcdPsciOsSupport|TRUE
gAmdStyxTokenSpaceGuid.PcdIscpSupport|TRUE
# SMBIOS 3.0 only
diff --git a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
index 3f4c7c8a3eef..72eb943a8bfd 100644
--- a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
+++ b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
@@ -18,7 +18,6 @@
[Defines]
DEFINE NUM_CORES = 4
-DEFINE DO_PSCI = 1
DEFINE DO_ISCP = 1
DEFINE DO_KCS = 1
DEFINE DO_FLASHER = FALSE
@@ -428,12 +427,6 @@ [PcdsFixedAtBuild.common]
## ACPI (no tables < 4GB)
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
-!if $(DO_PSCI)
- gAmdStyxTokenSpaceGuid.PcdPsciOsSupport|TRUE
-!else
- gAmdStyxTokenSpaceGuid.PcdPsciOsSupport|FALSE
-!endif
-
!if $(DO_ISCP)
gAmdStyxTokenSpaceGuid.PcdIscpSupport|TRUE
!else
diff --git a/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf b/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
index 057c52512e4e..bff5be4673a4 100644
--- a/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
+++ b/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
@@ -82,8 +82,6 @@ [FixedPcd]
gAmdStyxTokenSpaceGuid.PcdSbsaWakeUpGSIV
gAmdStyxTokenSpaceGuid.PcdSbsaWatchDogGSIV
gAmdStyxTokenSpaceGuid.PcdSocCoresPerCluster
- gAmdStyxTokenSpaceGuid.PcdPsciOsSupport
- gAmdStyxTokenSpaceGuid.PcdTrustedFWSupport
gAmdStyxTokenSpaceGuid.PcdParkingProtocolVersion
gAmdStyxTokenSpaceGuid.PcdSata1PortCount
diff --git a/Silicon/AMD/Styx/AcpiTables/Fadt.c b/Silicon/AMD/Styx/AcpiTables/Fadt.c
index bcbff3798883..bdf88a9c8e32 100644
--- a/Silicon/AMD/Styx/AcpiTables/Fadt.c
+++ b/Silicon/AMD/Styx/AcpiTables/Fadt.c
@@ -73,7 +73,7 @@ STATIC EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE AcpiFadt = {
FADT_FLAGS, // UINT32 Flags
NULL_GAS, // EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg
0, // UINT8 ResetValue
- 0, // UINT16 ArmBootArch
+ EFI_ACPI_5_1_ARM_PSCI_COMPLIANT, // UINT16 ArmBootArch
1, // UINT8 MinorVersion
0, // UINT64 XFirmwareCtrl
0, // UINT64 XDsdt
@@ -96,9 +96,6 @@ FadtTable (
VOID
)
{
- if (FixedPcdGetBool (PcdPsciOsSupport) && FixedPcdGetBool (PcdTrustedFWSupport)) {
- AcpiFadt.ArmBootArch = EFI_ACPI_5_1_ARM_PSCI_COMPLIANT;
- }
return (EFI_ACPI_DESCRIPTION_HEADER *) &AcpiFadt;
}
diff --git a/Silicon/AMD/Styx/AmdStyx.dec b/Silicon/AMD/Styx/AmdStyx.dec
index 0d7e82f2d768..cffe1cafde8b 100644
--- a/Silicon/AMD/Styx/AmdStyx.dec
+++ b/Silicon/AMD/Styx/AmdStyx.dec
@@ -89,17 +89,12 @@ [PcdsFixedAtBuild]
gAmdStyxTokenSpaceGuid.PcdSbsaWatchDogGSIV|369|UINT32|0x00050008
# Trusted-Firmware
- gAmdStyxTokenSpaceGuid.PcdTrustedFWSupport|TRUE|BOOLEAN|0x00060000
gAmdStyxTokenSpaceGuid.PcdTrustedFWMemoryBase|0x8000000000|UINT64|0x00060001
gAmdStyxTokenSpaceGuid.PcdTrustedFWMemorySize|0xE80000|UINT64|0x0006002
# ISCP
gAmdStyxTokenSpaceGuid.PcdIscpSupport|TRUE|BOOLEAN|0x00070000
- # PSCI
- gAmdStyxTokenSpaceGuid.PcdPsciOsSupport|TRUE|BOOLEAN|0x00080000
- gAmdStyxTokenSpaceGuid.PcdPsciCpuOnContext|0|UINT64|0x00080001
-
# Cores Per cluster
gAmdStyxTokenSpaceGuid.PcdSocCoresPerCluster|2|UINT32|0x00090000
diff --git a/Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.c b/Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.c
index fd5bb96f7c98..e713d5581925 100644
--- a/Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.c
+++ b/Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.c
@@ -33,7 +33,6 @@
STATIC AMD_MP_CORE_INFO_PROTOCOL mAmdMpCoreInfoProtocol = { 0 };
-STATIC AMD_MP_BOOT_PROTOCOL mAmdMpBootProtocol = { 0 };
STATIC AMD_MP_BOOT_INFO mAmdMpBootInfo = { 0 };
@@ -56,13 +55,6 @@ AmdStyxGetMpParkingBase (
OUT UINTN *MpParkingSize
);
-STATIC
-VOID
-AmdStyxParkSecondaryCore (
- ARM_CORE_INFO *ArmCoreInfo,
- EFI_PHYSICAL_ADDRESS SecondaryEntry
- );
-
#pragma pack(push, 1)
typedef struct _PMU_INFO {
@@ -94,8 +86,6 @@ PlatInitDxeEntryPoint (
)
{
EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS MpParkingBase;
- UINTN MpParkingSize;
ARM_CORE_INFO *ArmCoreInfoTable;
UINTN ArmCoreCount;
EFI_HANDLE Handle = NULL;
@@ -120,39 +110,6 @@ PlatInitDxeEntryPoint (
);
ASSERT_EFI_ERROR (Status);
- // Install MP-Boot Protocol
- if (!FixedPcdGetBool (PcdPsciOsSupport) &&
- FixedPcdGetBool (PcdTrustedFWSupport)) {
- // Allocate Parking area (4KB-aligned, 4KB per core) as Reserved memory
- MpParkingBase = 0;
- MpParkingSize = ArmCoreCount * SIZE_4KB;
- Status = gBS->AllocatePages (AllocateAnyPages, EfiReservedMemoryType,
- EFI_SIZE_TO_PAGES (MpParkingSize),
- &MpParkingBase);
- if (EFI_ERROR (Status) || MpParkingBase == 0) {
- DEBUG ((EFI_D_ERROR, "Warning: Failed to allocate MpParkingBase."));
- } else {
- mAmdMpBootInfo.MpParkingBase = MpParkingBase;
- mAmdMpBootInfo.MpParkingSize = MpParkingSize;
- mAmdMpBootInfo.ArmCoreInfoTable = ArmCoreInfoTable;
- mAmdMpBootInfo.ArmCoreCount = ArmCoreCount;
-
- mAmdMpBootProtocol.ParkSecondaryCore = AmdStyxParkSecondaryCore;
- mAmdMpBootProtocol.MpBootInfo = &mAmdMpBootInfo;
-
- Status = gBS->InstallProtocolInterface (
- &Handle,
- &gAmdMpBootProtocolGuid,
- EFI_NATIVE_INTERFACE,
- (VOID *)&mAmdMpBootProtocol
- );
- if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "Warning: Failed to install MP-Boot Protocol."));
- gBS->FreePages (MpParkingBase, EFI_SIZE_TO_PAGES (MpParkingSize));
- }
- }
- }
-
return Status;
}
@@ -208,30 +165,3 @@ AmdStyxGetMpParkingBase (
*MpParkingSize = mAmdMpBootInfo.MpParkingBase;
return mAmdMpBootInfo.MpParkingBase;
}
-
-
-STATIC
-VOID
-AmdStyxParkSecondaryCore (
- ARM_CORE_INFO *ArmCoreInfo,
- EFI_PHYSICAL_ADDRESS SecondaryEntry
- )
-{
- ARM_SMC_ARGS SmcRegs = {0};
- UINTN MpId;
-
- MpId = GET_MPID (ArmCoreInfo->ClusterId, ArmCoreInfo->CoreId);
-
- SmcRegs.Arg0 = ARM_SMC_ID_PSCI_CPU_ON_AARCH64;
- SmcRegs.Arg1 = MpId;
- SmcRegs.Arg2 = SecondaryEntry;
- SmcRegs.Arg3 = FixedPcdGet64 (PcdPsciCpuOnContext);
- ArmCallSmc (&SmcRegs);
-
- if (SmcRegs.Arg0 == ARM_SMC_PSCI_RET_SUCCESS ||
- SmcRegs.Arg0 == ARM_SMC_PSCI_RET_ALREADY_ON) {
- DEBUG ((EFI_D_ERROR, "CPU[MpId] = 0x%X at RUN state.\n", MpId));
- } else {
- DEBUG ((EFI_D_ERROR, "Warning: Could not transition CPU[MpId] = 0x%X to RUN state.\n", MpId));
- }
-}
diff --git a/Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.inf b/Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.inf
index 15f46be651b7..1ebde2723355 100644
--- a/Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.inf
+++ b/Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.inf
@@ -51,12 +51,6 @@ [Guids]
[Protocols]
gAmdMpCoreInfoProtocolGuid ## PRODUCER
- gAmdMpBootProtocolGuid ## PRODUCER
-
-[FixedPcd]
- gAmdStyxTokenSpaceGuid.PcdPsciOsSupport
- gAmdStyxTokenSpaceGuid.PcdPsciCpuOnContext
- gAmdStyxTokenSpaceGuid.PcdTrustedFWSupport
[Depex]
TRUE
diff --git a/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf b/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf
index 9f141946aea5..ccc079bebab2 100644
--- a/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf
+++ b/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf
@@ -68,7 +68,6 @@ [Pcd]
[FixedPcd]
gAmdStyxTokenSpaceGuid.PcdIscpSupport
- gAmdStyxTokenSpaceGuid.PcdTrustedFWSupport
gAmdStyxTokenSpaceGuid.PcdCpuIdRegister
[Depex]
diff --git a/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c b/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c
index 70821d1b120b..67f90efdcb3f 100644
--- a/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c
+++ b/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c
@@ -127,36 +127,34 @@ MemoryPeim (
Base = PcdGet64 (PcdSystemMemoryBase);
Size = PcdGet64 (PcdSystemMemorySize);
- if (FixedPcdGetBool (PcdTrustedFWSupport)) {
-
- //
- // For now, we assume that the trusted firmware region is at the base of
- // system memory, since that is much easier to deal with.
- //
- ASSERT (Base == PcdGet64 (PcdTrustedFWMemoryBase));
-
- Base += PcdGet64 (PcdTrustedFWMemorySize);
- Size -= PcdGet64 (PcdTrustedFWMemorySize);
-
- // Reserved Trusted Firmware region
- BuildResourceDescriptorHob (
- EFI_RESOURCE_SYSTEM_MEMORY,
- ( EFI_RESOURCE_ATTRIBUTE_PRESENT |
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_TESTED ),
- PcdGet64 (PcdTrustedFWMemoryBase),
- PcdGet64 (PcdTrustedFWMemorySize)
- );
-
- BuildMemoryAllocationHob (
- PcdGet64 (PcdTrustedFWMemoryBase),
- PcdGet64 (PcdTrustedFWMemorySize),
- EfiReservedMemoryType
- );
- }
+
+ //
+ // For now, we assume that the trusted firmware region is at the base of
+ // system memory, since that is much easier to deal with.
+ //
+ ASSERT (Base == PcdGet64 (PcdTrustedFWMemoryBase));
+
+ Base += PcdGet64 (PcdTrustedFWMemorySize);
+ Size -= PcdGet64 (PcdTrustedFWMemorySize);
+
+ // Reserved Trusted Firmware region
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ ( EFI_RESOURCE_ATTRIBUTE_PRESENT |
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
+ EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
+ EFI_RESOURCE_ATTRIBUTE_TESTED ),
+ PcdGet64 (PcdTrustedFWMemoryBase),
+ PcdGet64 (PcdTrustedFWMemorySize)
+ );
+
+ BuildMemoryAllocationHob (
+ PcdGet64 (PcdTrustedFWMemoryBase),
+ PcdGet64 (PcdTrustedFWMemorySize),
+ EfiReservedMemoryType
+ );
// Declare system memory
BuildResourceDescriptorHob (
diff --git a/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf b/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf
index 724d71645d5a..d17e6c26feb5 100644
--- a/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf
+++ b/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf
@@ -69,7 +69,6 @@ [FixedPcd]
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData
- gAmdStyxTokenSpaceGuid.PcdTrustedFWSupport
gAmdStyxTokenSpaceGuid.PcdTrustedFWMemoryBase
gAmdStyxTokenSpaceGuid.PcdTrustedFWMemorySize
diff --git a/Silicon/AMD/Styx/Library/ResetSystemLib/ResetSystemLib.inf b/Silicon/AMD/Styx/Library/ResetSystemLib/ResetSystemLib.inf
index 5a99fd79384a..d9faf3abb09a 100644
--- a/Silicon/AMD/Styx/Library/ResetSystemLib/ResetSystemLib.inf
+++ b/Silicon/AMD/Styx/Library/ResetSystemLib/ResetSystemLib.inf
@@ -42,6 +42,3 @@ [LibraryClasses]
PcdLib
BaseLib
ArmSmcLib
-
-[FixedPcd]
- gAmdStyxTokenSpaceGuid.PcdTrustedFWSupport
diff --git a/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf b/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf
index fc8b25c92873..3f36799f5df1 100644
--- a/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf
+++ b/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf
@@ -51,8 +51,6 @@ [Pcd]
[FixedPcd]
gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset
gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment
- gAmdStyxTokenSpaceGuid.PcdPsciOsSupport
- gAmdStyxTokenSpaceGuid.PcdTrustedFWSupport
gAmdStyxTokenSpaceGuid.PcdSata1PortCount
[Guids]
--
2.17.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH edk2-platforms 2/5] Silicon/AMD/Styx: remove MpBootDxe driver
2018-05-15 17:37 [PATCH edk2-platforms 0/5] Seattle spring cleaning Ard Biesheuvel
2018-05-15 17:37 ` [PATCH edk2-platforms 1/5] Silicon/AMD/Styx: make ARM-TF and PSCI dependencies unconditional Ard Biesheuvel
@ 2018-05-15 17:37 ` Ard Biesheuvel
2018-05-15 17:37 ` [PATCH edk2-platforms 3/5] Silicon/AMD/Styx: remove support for the ACPI parking protocol Ard Biesheuvel
` (3 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Ard Biesheuvel @ 2018-05-15 17:37 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, alan, neko, Ard Biesheuvel
MpBootDxe implements support for the ACPI Parking Protocol and the
DT based spintable protocol to bring up secondaries, neither of which
are recommended on systems implementing EL3, are not enabled in the
default build configuration of the platforms that include it and is
therefore essentially dead code. (Note that this driver DEPEXes on
a protocol that never gets installed when building this platform with
ARM-TF and PSCI support, which we now do unconditionally)
So let's remove it from the platform descriptions that refer to it,
and remove the code altogether as well.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 5 -
Platform/AMD/OverdriveBoard/OverdriveBoard.fdf | 5 -
Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc | 5 -
Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.fdf | 5 -
Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.c | 170 --------------------
Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf | 53 ------
Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootHelper.S | 87 ----------
7 files changed, 330 deletions(-)
diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
index 86061cd4606f..26b91ca88a2c 100644
--- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
+++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
@@ -629,11 +629,6 @@ [Components.common]
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
- #
- # MP-Boot: ACPI[Parking Protocol] + FDT[Spin-Table]
- #
- Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf
-
#
# AHCI Support
#
diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf b/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
index 541d65ef753e..1ed32f68ef9d 100644
--- a/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
+++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
@@ -222,11 +222,6 @@ [FV.FvMain]
INF Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
- #
- # MP-Boot: ACPI[Parking Protocol] + FDT[Spin-Table]
- #
- INF Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf
-
#
# SMBIOS Support
#
diff --git a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
index 72eb943a8bfd..8d50d78c30cd 100644
--- a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
+++ b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
@@ -563,11 +563,6 @@ [Components.common]
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
- #
- # MP-Boot: ACPI[Parking Protocol] + FDT[Spin-Table]
- #
- Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf
-
#
# AHCI Support
#
diff --git a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.fdf b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.fdf
index 38344fa406a3..e23533d1bddb 100644
--- a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.fdf
+++ b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.fdf
@@ -220,11 +220,6 @@ [FV.FvMain]
INF RuleOverride=ACPITABLE Silicon/AMD/Styx/AcpiTables/AcpiAml.inf
INF Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
- #
- # MP-Boot: ACPI[Parking Protocol] + FDT[Spin-Table]
- #
- INF Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf
-
#
# SMBIOS Support
#
diff --git a/Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.c b/Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.c
deleted file mode 100644
index bd7244648ab0..000000000000
--- a/Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.c
+++ /dev/null
@@ -1,170 +0,0 @@
-/** @file
-
- Copyright (c) 2016, AMD Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Library/ArmLib.h>
-#include <Library/ArmSmcLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/CacheMaintenanceLib.h>
-#include <Library/DebugLib.h>
-#include <Library/UefiDriverEntryPoint.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#include <Guid/ArmMpCoreInfo.h>
-#include <Protocol/AmdMpBoot.h>
-
-
-/* These externs are used to relocate our Pen code into pre-allocated memory */
-extern VOID *SecondariesPenStart;
-extern VOID *SecondariesPenEnd;
-extern UINTN *AsmParkingBase;
-extern UINTN *AsmMailboxBase;
-
-
-STATIC
-EFI_PHYSICAL_ADDRESS
-ConfigurePen (
- IN EFI_PHYSICAL_ADDRESS MpParkingBase,
- IN UINTN MpParkingSize,
- IN ARM_CORE_INFO *ArmCoreInfoTable,
- IN UINTN ArmCoreCount
- )
-{
- EFI_PHYSICAL_ADDRESS PenBase;
- UINTN PenSize;
- UINTN MailboxBase;
- UINTN CoreNum;
- UINTN CoreMailbox;
- UINTN CoreParking;
-
- //
- // Set Pen at the 2K-offset of the Parking area, skipping an 8-byte slot for the Core#.
- // For details, refer to the "Multi-processor Startup for ARM Platforms" document:
- // https://acpica.org/sites/acpica/files/MP%20Startup%20for%20ARM%20platforms.docx
- //
- PenBase = (EFI_PHYSICAL_ADDRESS)((UINTN)MpParkingBase + SIZE_2KB + sizeof(UINT64));
- PenSize = (UINTN)&SecondariesPenEnd - (UINTN)&SecondariesPenStart;
-
- // Relocate the Pen code
- CopyMem ((VOID*)(PenBase), (VOID*)&SecondariesPenStart, PenSize);
-
- // Put spin-table mailboxes below the pen code so we know where they are relative to code.
- // Make sure this is 8 byte aligned.
- MailboxBase = (UINTN)PenBase + ((UINTN)&SecondariesPenEnd - (UINTN)&SecondariesPenStart);
- if (MailboxBase % sizeof(UINT64) != 0) {
- MailboxBase += sizeof(UINT64) - MailboxBase % sizeof(UINT64);
- }
-
- // Update variables used in the Pen code
- *(UINTN*)(PenBase + ((UINTN)&AsmMailboxBase - (UINTN)&SecondariesPenStart)) = MailboxBase;
- *(UINTN*)(PenBase + ((UINTN)&AsmParkingBase - (UINTN)&SecondariesPenStart)) = (UINTN)MpParkingBase;
-
- for (CoreNum = 0; CoreNum < ArmCoreCount; CoreNum++) {
- // Clear the jump address at spin-table slot
- CoreMailbox = MailboxBase + CoreNum * sizeof (UINT64);
- *((UINTN*)(CoreMailbox)) = 0x0;
-
- // Clear the jump address and set Core# at mp-parking slot
- CoreParking = (UINTN)MpParkingBase + CoreNum * SIZE_4KB;
- *((UINTN*)(CoreParking + sizeof (UINT64))) = 0x0;
- *((UINTN*)(CoreParking + SIZE_2KB)) = CoreNum;
-
- // Update table entry to be consumed by FDT parser
- ArmCoreInfoTable[CoreNum].MailboxSetAddress = CoreMailbox;
- }
-
- // flush the cache before launching secondary cores
- WriteBackDataCacheRange ((VOID *)MpParkingBase, MpParkingSize);
-
- return PenBase;
-}
-
-
-EFI_STATUS
-EFIAPI
-MpBootDxeEntryPoint (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
- AMD_MP_BOOT_PROTOCOL *MpBootProtocol;
- EFI_PHYSICAL_ADDRESS MpParkingBase;
- UINTN MpParkingSize;
- ARM_CORE_INFO *ArmCoreInfoTable;
- UINTN ArmCoreCount;
- UINTN CoreNum;
- EFI_PHYSICAL_ADDRESS PenBase;
-
- DEBUG ((EFI_D_ERROR, "MpBootDxe Loaded\n"));
-
- MpBootProtocol = NULL;
- Status = gBS->LocateProtocol (
- &gAmdMpBootProtocolGuid,
- NULL,
- (VOID **)&MpBootProtocol
- );
- if (EFI_ERROR (Status) || MpBootProtocol == NULL) {
- DEBUG ((EFI_D_ERROR, "Warning: Failed to locate MP-Boot Protocol.\n"));
- return EFI_UNSUPPORTED;
- }
-
- if ((VOID *)MpBootProtocol->MpBootInfo == NULL) {
- DEBUG ((EFI_D_ERROR, "Warning: MpBootInfo not allocated.\n"));
- return EFI_UNSUPPORTED;
- }
-
- MpParkingBase = MpBootProtocol->MpBootInfo->MpParkingBase;
- if ((VOID *)MpParkingBase == NULL) {
- DEBUG ((EFI_D_ERROR, "Warning: MpParkingBase not allocated.\n"));
- return EFI_UNSUPPORTED;
- }
- if (((UINTN)MpParkingBase & (SIZE_4KB -1)) != 0) {
- DEBUG ((EFI_D_ERROR, "Warning: MpParkingBase not 4K aligned.\n"));
- return EFI_UNSUPPORTED;
- }
-
- ArmCoreInfoTable = MpBootProtocol->MpBootInfo->ArmCoreInfoTable;
- if (ArmCoreInfoTable == NULL) {
- DEBUG ((EFI_D_ERROR, "Warning: ArmCoreInfoTable not allocated.\n"));
- return EFI_UNSUPPORTED;
- }
-
- ArmCoreCount = MpBootProtocol->MpBootInfo->ArmCoreCount;
- if (ArmCoreCount < 2) {
- DEBUG ((EFI_D_ERROR, "Warning: Found %d cores.\n", ArmCoreCount));
- return EFI_UNSUPPORTED;
- }
-
- MpParkingSize = ArmCoreCount * SIZE_4KB;
- if (MpParkingSize > MpBootProtocol->MpBootInfo->MpParkingSize) {
- DEBUG ((EFI_D_ERROR, "Warning: MpParkingSize = 0x%lX, not large enough for %d cores.\n",
- MpBootProtocol->MpBootInfo->MpParkingSize, ArmCoreCount));
- return EFI_UNSUPPORTED;
- }
-
- if ((VOID *)MpBootProtocol->ParkSecondaryCore == NULL) {
- DEBUG ((EFI_D_ERROR, "Warning: ParkSecondaryCore() not supported.\n"));
- return EFI_UNSUPPORTED;
- }
-
- // Move secondary cores to our new Pen
- PenBase = ConfigurePen (MpParkingBase, MpParkingSize, ArmCoreInfoTable, ArmCoreCount);
- for (CoreNum = 0; CoreNum < ArmCoreCount; CoreNum++) {
- MpBootProtocol->ParkSecondaryCore (&ArmCoreInfoTable[CoreNum], PenBase);
- }
-
- return EFI_SUCCESS;
-}
-
-
diff --git a/Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf b/Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf
deleted file mode 100644
index ec63cd36e804..000000000000
--- a/Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf
+++ /dev/null
@@ -1,53 +0,0 @@
-#/* @file
-#
-# Copyright (c) 2016, AMD Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = MpBootDxe
- FILE_GUID = ff3f9c9b-6d36-4787-9144-6b22acba5e9b
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
- ENTRY_POINT = MpBootDxeEntryPoint
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = AARCH64
-#
-#
-
-[Sources.common]
- MpBootDxe.c
-
-[Sources.AARCH64]
- MpBootHelper.S
-
-[Packages]
- ArmPkg/ArmPkg.dec
- MdePkg/MdePkg.dec
- Silicon/AMD/Styx/AmdModulePkg/AmdModulePkg.dec
- Silicon/AMD/Styx/AmdStyx.dec
-
-[LibraryClasses]
- UefiDriverEntryPoint
- UefiBootServicesTableLib
- CacheMaintenanceLib
- BaseMemoryLib
- DebugLib
-
-[Protocols]
- gAmdMpBootProtocolGuid ## CONSUMED
-
-[Depex]
- gAmdMpBootProtocolGuid
diff --git a/Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootHelper.S b/Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootHelper.S
deleted file mode 100644
index c16cc59a1e5e..000000000000
--- a/Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootHelper.S
+++ /dev/null
@@ -1,87 +0,0 @@
-//
-// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-// Copyright (c) 2014 - 2016, AMD Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//**
-// Derived from:
-// ArmPkg/Library/BdsLib/AArch64/BdsLinuxLoaderHelper.S
-//
-//**
-
-/* Secondary core pens for AArch64 Linux booting.
-
- This code is placed in Linux kernel memory and marked reserved. UEFI ensures
- that the secondary cores get to this pen and the kernel can then start the
- cores from here.
- NOTE: This code must be self-contained.
-*/
-
-#include <Library/ArmLib.h>
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(SecondariesPenStart)
-ASM_GLOBAL SecondariesPenEnd
-
-ASM_PFX(SecondariesPenStart):
- // Registers x0-x3 are reserved for future use and should be set to zero.
- mov x0, xzr
- mov x1, xzr
- mov x2, xzr
- mov x3, xzr
-
- mrs x4, mpidr_el1 // Get MPCore register
- and x5, x4, #ARM_CORE_MASK // Get core number
- and x4, x4, #ARM_CLUSTER_MASK // Get cluster number
-
- add x4, x5, x4, LSR #7 // Add scaled cluster number to core number
- mov x6, x4 // Save a copy to compute mp-parking offset
-
- ldr x5, AsmMailboxBase // Get mailbox addr relative to PC
- lsl x4, x4, 3 // Add 8-byte offset for this core
- add x4, x4, x5 //
-
- ldr x5, AsmParkingBase // Get mp-parking addr relative to PC
- lsl x6, x6, 12 // Add 4K-byte offset for this core
- add x6, x6, x5 //
-
- mov x5, 1 // Get mp-parking id# at 2K offset
- lsl x5, x5, 11 //
- add x5, x5, x6 //
- ldr x10, [x5] //
-
-1: ldr x5, [x4] // Load jump-addr from spin-table mailbox
- cmp xzr, x5 // Has the value been set?
- b.ne 4f // If so, break out of loop
-
- ldr x5, [x6] // Load mp-parking id#
- cmp w10, w5 // Is it my id?
- b.ne 2f // If not, continue polling
-
- ldr x5, [x6, 8] // Load jump-addr from mp-parking
- cmp xzr, x5 // Has the value been set?
- b.ne 3f // If so, break out of loop
-
-2: wfe // Wait a bit
- b 1b // Wait over, check again
-
-3: str xzr, [x6, 8] // Clear to acknowledge
- mov x0, x6 // Return mp-parking address
-4: br x5 // Jump to new addr
-
-.align 3 // Make sure the variable below is 8 byte aligned.
- .global AsmParkingBase
-AsmParkingBase: .xword 0xdeaddeadbeefbeef
- .global AsmMailboxBase
-AsmMailboxBase: .xword 0xdeaddeadbeefbeef
-
-SecondariesPenEnd:
--
2.17.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH edk2-platforms 3/5] Silicon/AMD/Styx: remove support for the ACPI parking protocol
2018-05-15 17:37 [PATCH edk2-platforms 0/5] Seattle spring cleaning Ard Biesheuvel
2018-05-15 17:37 ` [PATCH edk2-platforms 1/5] Silicon/AMD/Styx: make ARM-TF and PSCI dependencies unconditional Ard Biesheuvel
2018-05-15 17:37 ` [PATCH edk2-platforms 2/5] Silicon/AMD/Styx: remove MpBootDxe driver Ard Biesheuvel
@ 2018-05-15 17:37 ` Ard Biesheuvel
2018-05-15 17:37 ` [PATCH edk2-platforms 4/5] Silicon/AMD/Styx: make ISCP dependency unconditional Ard Biesheuvel
` (2 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Ard Biesheuvel @ 2018-05-15 17:37 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, alan, neko, Ard Biesheuvel
The ACPI parking protocol is a kludge to allow SOC implementations
that lack EL3 support to bring up secondaries in a standardized
manner. Since our UEFI implementation unconditionally relies on
ARM Trusted Firmware and PSCI now, there is no point in supporting
the parking protocol any longer so let's remove it. (Note also that
the implementation of AmdStyxGetMpParkingBase is flawed, so it is
unsure whether it has ever worked in reality)
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Silicon/AMD/Styx/AcpiTables/AcpiTables.inf | 1 -
Silicon/AMD/Styx/AcpiTables/Madt.c | 24 ++----------
Silicon/AMD/Styx/AmdStyx.dec | 4 --
Silicon/AMD/Styx/Common/Protocol/AmdMpBoot.h | 39 --------------------
Silicon/AMD/Styx/Common/Protocol/AmdMpCoreInfo.h | 7 ----
Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.c | 21 -----------
6 files changed, 3 insertions(+), 93 deletions(-)
diff --git a/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf b/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
index bff5be4673a4..4ae64ac22665 100644
--- a/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
+++ b/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
@@ -82,7 +82,6 @@ [FixedPcd]
gAmdStyxTokenSpaceGuid.PcdSbsaWakeUpGSIV
gAmdStyxTokenSpaceGuid.PcdSbsaWatchDogGSIV
gAmdStyxTokenSpaceGuid.PcdSocCoresPerCluster
- gAmdStyxTokenSpaceGuid.PcdParkingProtocolVersion
gAmdStyxTokenSpaceGuid.PcdSata1PortCount
[Depex]
diff --git a/Silicon/AMD/Styx/AcpiTables/Madt.c b/Silicon/AMD/Styx/AcpiTables/Madt.c
index 96182e790f98..43d415c8bc32 100644
--- a/Silicon/AMD/Styx/AcpiTables/Madt.c
+++ b/Silicon/AMD/Styx/AcpiTables/Madt.c
@@ -57,12 +57,7 @@ AMD_MP_CORE_INFO_PROTOCOL *mAmdMpCoreInfoProtocol = NULL;
#define MSI_TYPER_FLAG ( 0 ) // Use TYPER register and ignore Count/Base fields
#endif
-#define PARKING_PROTOCOL_VERSION (FixedPcdGet32 (PcdParkingProtocolVersion))
-#define PARKED_OFFSET ( 4096 )
-
#define CORES_PER_CLUSTER (FixedPcdGet32 (PcdSocCoresPerCluster))
-#define PARKED_ADDRESS(Base, ClusterId, CoreId) \
- ((Base) + (CORES_PER_CLUSTER * ClusterId + CoreId) * PARKED_OFFSET)
/* Macro to populate EFI_ACPI_5_1_GIC_STRUCTURE */
@@ -73,7 +68,7 @@ AMD_MP_CORE_INFO_PROTOCOL *mAmdMpCoreInfoProtocol = NULL;
CpuNum, /* UINT32 CPUInterfaceNumber */ \
(ClusterId << 8) | CoreId, /* UINT32 AcpiProcessorUid */ \
EFI_ACPI_5_1_GIC_ENABLED, /* UINT32 Flags */ \
- PARKING_PROTOCOL_VERSION, /* UINT32 ParkingProtocolVersion */ \
+ 0, /* UINT32 ParkingProtocolVersion */ \
PerfInt, /* UINT32 PerformanceInterruptGsiv */ \
0, /* UINT64 ParkedAddress */ \
GIC_BASE, /* UINT64 PhysicalBaseAddress */ \
@@ -194,8 +189,7 @@ BuildGicC (
EFI_ACPI_5_1_GIC_STRUCTURE *GicC,
UINT32 CpuNum,
UINT32 ClusterId,
- UINT32 CoreId,
- EFI_PHYSICAL_ADDRESS MpParkingBase
+ UINT32 CoreId
)
{
UINT32 MpId, PmuSpi;
@@ -212,8 +206,6 @@ BuildGicC (
GicC->CPUInterfaceNumber = CpuNum;
GicC->AcpiProcessorUid = MpId;
GicC->Flags = EFI_ACPI_5_1_GIC_ENABLED;
- GicC->ParkingProtocolVersion = PARKING_PROTOCOL_VERSION;
- GicC->ParkedAddress = PARKED_ADDRESS(MpParkingBase, ClusterId, CoreId);
GicC->PhysicalBaseAddress = GIC_BASE;
GicC->GICV = GICV_BASE;
GicC->GICH = GICH_BASE;
@@ -281,8 +273,6 @@ MadtHeader (
ARM_CORE_INFO *ArmCoreInfoTable;
UINTN CoreCount, CpuNum;
EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS MpParkingBase;
- UINTN MpParkingSize;
Status = gBS->LocateProtocol (
&gAmdMpCoreInfoProtocolGuid,
@@ -299,13 +289,6 @@ MadtHeader (
ASSERT (CoreCount <= NUM_CORES);
ASSERT (CoreCount <= PcdGet32(PcdSocCoreCount));
- MpParkingSize = 0;
- MpParkingBase = mAmdMpCoreInfoProtocol->GetMpParkingBase(&MpParkingSize);
- if (MpParkingBase && MpParkingSize < (CoreCount * SIZE_4KB)) {
- DEBUG ((EFI_D_ERROR, "MADT: Parking Protocol not supported.\n"));
- MpParkingBase = 0;
- }
-
GicC = (EFI_ACPI_5_1_GIC_STRUCTURE *)&AcpiMadt.GicC[0];
AcpiMadt.Header.Header.Length = sizeof (EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER);
@@ -315,8 +298,7 @@ MadtHeader (
Status = BuildGicC (GicC, CpuNum,
ArmCoreInfoTable[CpuNum].ClusterId,
- ArmCoreInfoTable[CpuNum].CoreId,
- MpParkingBase
+ ArmCoreInfoTable[CpuNum].CoreId
);
ASSERT_EFI_ERROR (Status);
diff --git a/Silicon/AMD/Styx/AmdStyx.dec b/Silicon/AMD/Styx/AmdStyx.dec
index cffe1cafde8b..1eb1ce801e0b 100644
--- a/Silicon/AMD/Styx/AmdStyx.dec
+++ b/Silicon/AMD/Styx/AmdStyx.dec
@@ -28,7 +28,6 @@ [Ppis]
gAmdStyxPlatInitPpiGuid = { 0xcbff429c, 0xd3e3, 0x4c50, { 0xac, 0x1a, 0x1c, 0xd2, 0xfe, 0x15, 0x1a, 0xd7 } }
[Protocols]
- gAmdMpBootProtocolGuid = { 0xe21eac84, 0x9fbf, 0x4808, { 0x83, 0x93, 0xe1, 0x93, 0x97, 0x23, 0x48, 0xab } }
gAmdMpCoreInfoProtocolGuid = { 0x0dba25f8, 0x2da1, 0x4ec5, { 0x89, 0x5d, 0x32, 0x1e, 0xd6, 0x1e, 0x3f, 0x43 } }
[Guids]
@@ -101,9 +100,6 @@ [PcdsFixedAtBuild]
# UEFI entry point
gAmdStyxTokenSpaceGuid.PcdUefiEntryAddress|0x8000E80000|UINT64|0x000a0000
- # Parking Protocol
- gAmdStyxTokenSpaceGuid.PcdParkingProtocolVersion|1|UINT32|0x000b0000
-
# The original offset in memory of the NV store firmware volume, before
# relocating it to a dynamically allocated buffer. We need this to correlate
# flash accesses to the in-memory copy with LBAs in the actual SPI flash
diff --git a/Silicon/AMD/Styx/Common/Protocol/AmdMpBoot.h b/Silicon/AMD/Styx/Common/Protocol/AmdMpBoot.h
deleted file mode 100644
index 2aa4c55ccbaf..000000000000
--- a/Silicon/AMD/Styx/Common/Protocol/AmdMpBoot.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/** @file
-
- Copyright (c) 2016, AMD Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _AMD_MP_BOOT_H_
-#define _AMD_MP_BOOT_H_
-
-extern EFI_GUID gAmdMpBootProtocolGuid;
-
-typedef
-VOID
-(EFIAPI *PARK_SECONDARY_CORE) (
- IN ARM_CORE_INFO *ArmCoreInfo,
- IN EFI_PHYSICAL_ADDRESS SecondaryEntry
- );
-
-typedef struct _AMD_MP_BOOT_INFO {
- EFI_PHYSICAL_ADDRESS MpParkingBase;
- UINTN MpParkingSize;
- ARM_CORE_INFO *ArmCoreInfoTable;
- UINTN ArmCoreCount;
-} AMD_MP_BOOT_INFO;
-
-typedef struct _AMD_MP_BOOT_PROTOCOL {
- PARK_SECONDARY_CORE ParkSecondaryCore;
- AMD_MP_BOOT_INFO *MpBootInfo;
-} AMD_MP_BOOT_PROTOCOL;
-
-#endif // _AMD_MP_BOOT_H_
diff --git a/Silicon/AMD/Styx/Common/Protocol/AmdMpCoreInfo.h b/Silicon/AMD/Styx/Common/Protocol/AmdMpCoreInfo.h
index 95f46e8af962..e6aa8fb1bec9 100644
--- a/Silicon/AMD/Styx/Common/Protocol/AmdMpCoreInfo.h
+++ b/Silicon/AMD/Styx/Common/Protocol/AmdMpCoreInfo.h
@@ -30,16 +30,9 @@ EFI_STATUS
OUT UINT32 *PmuSpi
);
-typedef
-EFI_PHYSICAL_ADDRESS
-(EFIAPI *GET_MP_PARKING_BASE) (
- OUT UINTN *MpParkingSize
- );
-
typedef struct _AMD_MP_CORE_INFO_PROTOCOL {
GET_ARM_CORE_INFO_TABLE GetArmCoreInfoTable;
GET_PMU_SPI_FROM_MPID GetPmuSpiFromMpId;
- GET_MP_PARKING_BASE GetMpParkingBase;
} AMD_MP_CORE_INFO_PROTOCOL;
#endif // _AMD_MP_CORE_INFO_H_
diff --git a/Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.c b/Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.c
index e713d5581925..68f97fb89148 100644
--- a/Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.c
+++ b/Silicon/AMD/Styx/Drivers/PlatInitDxe/PlatInitDxe.c
@@ -29,11 +29,9 @@
#include <Guid/ArmMpCoreInfo.h>
#include <Protocol/AmdMpCoreInfo.h>
-#include <Protocol/AmdMpBoot.h>
STATIC AMD_MP_CORE_INFO_PROTOCOL mAmdMpCoreInfoProtocol = { 0 };
-STATIC AMD_MP_BOOT_INFO mAmdMpBootInfo = { 0 };
STATIC
@@ -49,12 +47,6 @@ AmdStyxGetPmuSpiFromMpId (
OUT UINT32 *PmuSpi
);
-STATIC
-EFI_PHYSICAL_ADDRESS
-AmdStyxGetMpParkingBase (
- OUT UINTN *MpParkingSize
- );
-
#pragma pack(push, 1)
typedef struct _PMU_INFO {
@@ -101,7 +93,6 @@ PlatInitDxeEntryPoint (
// Install CoreInfo Protocol
mAmdMpCoreInfoProtocol.GetArmCoreInfoTable = AmdStyxGetArmCoreInfoTable;
mAmdMpCoreInfoProtocol.GetPmuSpiFromMpId = AmdStyxGetPmuSpiFromMpId;
- mAmdMpCoreInfoProtocol.GetMpParkingBase = AmdStyxGetMpParkingBase;
Status = gBS->InstallProtocolInterface (
&Handle,
&gAmdMpCoreInfoProtocolGuid,
@@ -153,15 +144,3 @@ AmdStyxGetPmuSpiFromMpId (
return EFI_INVALID_PARAMETER;
}
-
-STATIC
-EFI_PHYSICAL_ADDRESS
-AmdStyxGetMpParkingBase (
- OUT UINTN *MpParkingSize
- )
-{
- ASSERT (MpParkingSize != NULL);
-
- *MpParkingSize = mAmdMpBootInfo.MpParkingBase;
- return mAmdMpBootInfo.MpParkingBase;
-}
--
2.17.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH edk2-platforms 4/5] Silicon/AMD/Styx: make ISCP dependency unconditional
2018-05-15 17:37 [PATCH edk2-platforms 0/5] Seattle spring cleaning Ard Biesheuvel
` (2 preceding siblings ...)
2018-05-15 17:37 ` [PATCH edk2-platforms 3/5] Silicon/AMD/Styx: remove support for the ACPI parking protocol Ard Biesheuvel
@ 2018-05-15 17:37 ` Ard Biesheuvel
2018-05-15 17:37 ` [PATCH edk2-platforms 5/5] Platform/AMD/Overdrive: enable support for NVME PCIe devices Ard Biesheuvel
2018-05-22 14:56 ` [PATCH edk2-platforms 0/5] Seattle spring cleaning Leif Lindholm
5 siblings, 0 replies; 8+ messages in thread
From: Ard Biesheuvel @ 2018-05-15 17:37 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, alan, neko, Ard Biesheuvel
The Styx code can be built without relying on the ISCP, but doing so
is rather pointless, and is essentially dead code because nobody
ever does that. Let's just remove this feature.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 7 --
Platform/LeMaker/CelloBoard/CelloBoard.dsc | 2 -
Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc | 7 --
Silicon/AMD/Styx/AmdStyx.dec | 3 -
Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.c | 120 +++++++++-----------
Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf | 1 -
Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c | 40 -------
Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf | 1 -
Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf | 2 -
Silicon/AMD/Styx/Library/RealTimeClockLib/RealTimeClockLib.c | 16 +--
Silicon/AMD/Styx/Library/RealTimeClockLib/RealTimeClockLib.inf | 3 -
11 files changed, 55 insertions(+), 147 deletions(-)
diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
index 26b91ca88a2c..7bc1ab937813 100644
--- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
+++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
@@ -19,7 +19,6 @@ [Defines]
DEFINE DO_XGBE = 1
DEFINE NUM_CORES = 8
-DEFINE DO_ISCP = 1
DEFINE DO_KCS = 1
DEFINE DO_FLASHER = FALSE
DEFINE DO_CAPSULE = FALSE
@@ -456,12 +455,6 @@ [PcdsFixedAtBuild.common]
#
gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy|0xC000000000007FD1
-!if $(DO_ISCP)
- gAmdStyxTokenSpaceGuid.PcdIscpSupport|TRUE
-!else
- gAmdStyxTokenSpaceGuid.PcdIscpSupport|FALSE
-!endif
-
# SMBIOS 3.0 only
gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosEntryPointProvideMethod|0x2
diff --git a/Platform/LeMaker/CelloBoard/CelloBoard.dsc b/Platform/LeMaker/CelloBoard/CelloBoard.dsc
index 80b096ba5587..1acfe7e93fad 100644
--- a/Platform/LeMaker/CelloBoard/CelloBoard.dsc
+++ b/Platform/LeMaker/CelloBoard/CelloBoard.dsc
@@ -431,8 +431,6 @@ [PcdsFixedAtBuild.common]
#
gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy|0xC000000000007FD1
- gAmdStyxTokenSpaceGuid.PcdIscpSupport|TRUE
-
# SMBIOS 3.0 only
gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosEntryPointProvideMethod|0x2
diff --git a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
index 8d50d78c30cd..8d0a5bdc5270 100644
--- a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
+++ b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
@@ -18,7 +18,6 @@
[Defines]
DEFINE NUM_CORES = 4
-DEFINE DO_ISCP = 1
DEFINE DO_KCS = 1
DEFINE DO_FLASHER = FALSE
@@ -427,12 +426,6 @@ [PcdsFixedAtBuild.common]
## ACPI (no tables < 4GB)
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
-!if $(DO_ISCP)
- gAmdStyxTokenSpaceGuid.PcdIscpSupport|TRUE
-!else
- gAmdStyxTokenSpaceGuid.PcdIscpSupport|FALSE
-!endif
-
# SMBIOS 3.0 only
gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosEntryPointProvideMethod|0x2
diff --git a/Silicon/AMD/Styx/AmdStyx.dec b/Silicon/AMD/Styx/AmdStyx.dec
index 1eb1ce801e0b..eeded93a32e2 100644
--- a/Silicon/AMD/Styx/AmdStyx.dec
+++ b/Silicon/AMD/Styx/AmdStyx.dec
@@ -91,9 +91,6 @@ [PcdsFixedAtBuild]
gAmdStyxTokenSpaceGuid.PcdTrustedFWMemoryBase|0x8000000000|UINT64|0x00060001
gAmdStyxTokenSpaceGuid.PcdTrustedFWMemorySize|0xE80000|UINT64|0x0006002
- # ISCP
- gAmdStyxTokenSpaceGuid.PcdIscpSupport|TRUE|BOOLEAN|0x00070000
-
# Cores Per cluster
gAmdStyxTokenSpaceGuid.PcdSocCoresPerCluster|2|UINT32|0x00090000
diff --git a/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.c b/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.c
index 61e373406bcc..4ea1dd4b3577 100644
--- a/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.c
+++ b/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.c
@@ -140,64 +140,56 @@ PlatInitPeiEntryPoint (
mAmdCoreCount = PcdGet32 (PcdSocCoreCount);
}
- if (FixedPcdGetBool (PcdIscpSupport)) {
- Status = PeiServicesLocatePpi (&gPeiIscpPpiGuid, 0, NULL, (VOID**)&PeiIscpPpi);
- ASSERT_EFI_ERROR (Status);
+ Status = PeiServicesLocatePpi (&gPeiIscpPpiGuid, 0, NULL, (VOID**)&PeiIscpPpi);
+ ASSERT_EFI_ERROR (Status);
- // Get fuse information from ISCP
- Status = PeiIscpPpi->ExecuteFuseTransaction (PeiServices, &IscpFuseInfo);
- ASSERT_EFI_ERROR (Status);
+ // Get fuse information from ISCP
+ Status = PeiIscpPpi->ExecuteFuseTransaction (PeiServices, &IscpFuseInfo);
+ ASSERT_EFI_ERROR (Status);
- CpuMap = IscpFuseInfo.SocConfiguration.CpuMap;
- CpuCoreCount = IscpFuseInfo.SocConfiguration.CpuCoreCount;
- CpuMapSize = sizeof (IscpFuseInfo.SocConfiguration.CpuMap) * 8;
+ CpuMap = IscpFuseInfo.SocConfiguration.CpuMap;
+ CpuCoreCount = IscpFuseInfo.SocConfiguration.CpuCoreCount;
+ CpuMapSize = sizeof (IscpFuseInfo.SocConfiguration.CpuMap) * 8;
- ASSERT (CpuMap != 0);
- ASSERT (CpuCoreCount != 0);
- ASSERT (CpuCoreCount <= CpuMapSize);
+ ASSERT (CpuMap != 0);
+ ASSERT (CpuCoreCount != 0);
+ ASSERT (CpuCoreCount <= CpuMapSize);
- // Update core count based on fusing
- if (mAmdCoreCount > CpuCoreCount) {
- mAmdCoreCount = CpuCoreCount;
- }
+ // Update core count based on fusing
+ if (mAmdCoreCount > CpuCoreCount) {
+ mAmdCoreCount = CpuCoreCount;
}
//
// Update per-core information from ISCP
+ // Walk CPU map to enumerate active cores
//
- if (!FixedPcdGetBool (PcdIscpSupport)) {
- DEBUG ((EFI_D_ERROR, "Warning: Could not get CPU info via ISCP, using default values.\n"));
- } else {
- //
- // Walk CPU map to enumerate active cores
- //
- for (CoreNum = 0, Index = 0; CoreNum < CpuMapSize && Index < mAmdCoreCount; ++CoreNum) {
- if (CpuMap & 1) {
- CpuResetInfo.CoreNum = CoreNum;
- Status = PeiIscpPpi->ExecuteCpuRetrieveIdTransaction (
- PeiServices, &CpuResetInfo );
- ASSERT_EFI_ERROR (Status);
- ASSERT (CpuResetInfo.CoreStatus.Status != CPU_CORE_DISABLED);
- ASSERT (CpuResetInfo.CoreStatus.Status != CPU_CORE_UNDEFINED);
-
- mAmdMpCoreInfoTable[Index].ClusterId = CpuResetInfo.CoreStatus.ClusterId;
- mAmdMpCoreInfoTable[Index].CoreId = CpuResetInfo.CoreStatus.CoreId;
-
- DEBUG ((EFI_D_ERROR, "Core[%d]: ClusterId = %d CoreId = %d\n",
- Index, mAmdMpCoreInfoTable[Index].ClusterId,
- mAmdMpCoreInfoTable[Index].CoreId));
-
- // Next core in Table
- ++Index;
- }
- // Next core in Map
- CpuMap >>= 1;
+ for (CoreNum = 0, Index = 0; CoreNum < CpuMapSize && Index < mAmdCoreCount; ++CoreNum) {
+ if (CpuMap & 1) {
+ CpuResetInfo.CoreNum = CoreNum;
+ Status = PeiIscpPpi->ExecuteCpuRetrieveIdTransaction (
+ PeiServices, &CpuResetInfo );
+ ASSERT_EFI_ERROR (Status);
+ ASSERT (CpuResetInfo.CoreStatus.Status != CPU_CORE_DISABLED);
+ ASSERT (CpuResetInfo.CoreStatus.Status != CPU_CORE_UNDEFINED);
+
+ mAmdMpCoreInfoTable[Index].ClusterId = CpuResetInfo.CoreStatus.ClusterId;
+ mAmdMpCoreInfoTable[Index].CoreId = CpuResetInfo.CoreStatus.CoreId;
+
+ DEBUG ((EFI_D_ERROR, "Core[%d]: ClusterId = %d CoreId = %d\n",
+ Index, mAmdMpCoreInfoTable[Index].ClusterId,
+ mAmdMpCoreInfoTable[Index].CoreId));
+
+ // Next core in Table
+ ++Index;
}
+ // Next core in Map
+ CpuMap >>= 1;
+ }
- // Update core count based on CPU map
- if (mAmdCoreCount > Index) {
- mAmdCoreCount = Index;
- }
+ // Update core count based on CPU map
+ if (mAmdCoreCount > Index) {
+ mAmdCoreCount = Index;
}
// Update SocCoreCount on Dynamic PCD
@@ -212,14 +204,12 @@ PlatInitPeiEntryPoint (
// Get SystemMemorySize from ISCP
IscpMemDescriptor.Size0 = 0;
- if (FixedPcdGetBool (PcdIscpSupport)) {
- Status = PeiIscpPpi->ExecuteMemoryTransaction (PeiServices, &IscpMemDescriptor);
- ASSERT_EFI_ERROR (Status);
+ Status = PeiIscpPpi->ExecuteMemoryTransaction (PeiServices, &IscpMemDescriptor);
+ ASSERT_EFI_ERROR (Status);
- // Update SystemMemorySize on Dynamic PCD
- if (IscpMemDescriptor.Size0) {
- PcdSet64 (PcdSystemMemorySize, IscpMemDescriptor.Size0);
- }
+ // Update SystemMemorySize on Dynamic PCD
+ if (IscpMemDescriptor.Size0) {
+ PcdSet64 (PcdSystemMemorySize, IscpMemDescriptor.Size0);
}
if (IscpMemDescriptor.Size0 == 0) {
DEBUG ((EFI_D_ERROR, "Warning: Could not get SystemMemorySize via ISCP, using default value.\n"));
@@ -229,19 +219,17 @@ PlatInitPeiEntryPoint (
#if DO_XGBE == 1
// Get MAC Address from ISCP
- if (FixedPcdGetBool (PcdIscpSupport)) {
- Status = PeiIscpPpi->ExecuteGetMacAddressTransaction (
- PeiServices, &MacAddrInfo );
- ASSERT_EFI_ERROR (Status);
-
- MacAddr0 = MacAddr1 = 0;
- for (Index = 0; Index < 6; ++Index) {
- MacAddr0 |= (UINT64)MacAddrInfo.MacAddress0[Index] << (Index * 8);
- MacAddr1 |= (UINT64)MacAddrInfo.MacAddress1[Index] << (Index * 8);
- }
- PcdSet64 (PcdEthMacA, MacAddr0);
- PcdSet64 (PcdEthMacB, MacAddr1);
+ Status = PeiIscpPpi->ExecuteGetMacAddressTransaction (
+ PeiServices, &MacAddrInfo );
+ ASSERT_EFI_ERROR (Status);
+
+ MacAddr0 = MacAddr1 = 0;
+ for (Index = 0; Index < 6; ++Index) {
+ MacAddr0 |= (UINT64)MacAddrInfo.MacAddress0[Index] << (Index * 8);
+ MacAddr1 |= (UINT64)MacAddrInfo.MacAddress1[Index] << (Index * 8);
}
+ PcdSet64 (PcdEthMacA, MacAddr0);
+ PcdSet64 (PcdEthMacB, MacAddr1);
DEBUG ((EFI_D_ERROR, "EthMacA = 0x%lX\n", PcdGet64 (PcdEthMacA)));
DEBUG ((EFI_D_ERROR, "EthMacB = 0x%lX\n", PcdGet64 (PcdEthMacB)));
diff --git a/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf b/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf
index ccc079bebab2..b8829a4a9c3e 100644
--- a/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf
+++ b/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.inf
@@ -67,7 +67,6 @@ [Pcd]
gAmdStyxTokenSpaceGuid.PcdEthMacB
[FixedPcd]
- gAmdStyxTokenSpaceGuid.PcdIscpSupport
gAmdStyxTokenSpaceGuid.PcdCpuIdRegister
[Depex]
diff --git a/Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c b/Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c
index 4bf9fc39942f..bcb6e020a5fd 100644
--- a/Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c
+++ b/Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c
@@ -455,16 +455,7 @@ STATIC SMBIOS_TABLE_TYPE17 mMemDevInfoType17 = {
0, // ConfiguredMemoryClockSpeed;
};
-#if (FixedPcdGetBool (PcdIscpSupport))
STATIC CHAR8 CONST *mMemDevInfoType17Strings[ 7 ] = {0};
-#else
-STATIC CHAR8 CONST * CONST mMemDevInfoType17Strings[] = {
- "OS Virtual Memory",
- "malloc",
- "OSV",
- NULL
-};
-#endif
/***********************************************************************
SMBIOS data definition TYPE19 Memory Array Mapped Address Information
@@ -648,7 +639,6 @@ ProcessorInfoUpdateSmbiosType4 (
VOID
)
{
-#if (FixedPcdGetBool (PcdIscpSupport))
ISCP_TYPE4_SMBIOS_INFO *SmbiosT4 = &mSmbiosInfo.SmbiosCpuBuffer.T4[0];
DEBUG ((EFI_D_ERROR, "Logging SmbiosType4 from ISCP.\n"));
@@ -671,22 +661,6 @@ ProcessorInfoUpdateSmbiosType4 (
&SmbiosT4->T4ProcId.ProcIDMsd, sizeof(UINT32));
CopyMem (&mProcessorInfoType4.Voltage,
&SmbiosT4->T4Voltage, sizeof(UINT8));
-#else
- mProcessorInfoType4.ProcessorType = CentralProcessor;
- mProcessorInfoType4.ProcessorFamily = ProcessorFamilyIndicatorFamily2;
- mProcessorInfoType4.ProcessorFamily2 = ProcessorFamilyARM;
- #ifdef ARM_CPU_AARCH64
- mProcessorInfoType4.ProcessorCharacteristics = 0x6C;
- #else
- mProcessorInfoType4.ProcessorCharacteristics = 0x68;
- #endif
- mProcessorInfoType4.MaxSpeed = PcdGet32(PcdArmArchTimerFreqInHz)/1000000; // In MHz
- mProcessorInfoType4.CurrentSpeed = PcdGet32(PcdArmArchTimerFreqInHz)/1000000; // In MHz
- mProcessorInfoType4.CoreCount = PcdGet32(PcdCoreCount);
- mProcessorInfoType4.EnabledCoreCount = PcdGet32(PcdCoreCount);
- mProcessorInfoType4.ThreadCount = PcdGet32(PcdCoreCount);
- mProcessorInfoType4.ProcessorUpgrade = ProcessorUpgradeDaughterBoard;
-#endif
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&mProcessorInfoType4, mProcessorInfoType4Strings);
}
@@ -700,7 +674,6 @@ CacheInfoUpdateSmbiosType7 (
VOID
)
{
-#if (FixedPcdGetBool (PcdIscpSupport))
ISCP_TYPE7_SMBIOS_INFO *SmbiosT7;
SMBIOS_TABLE_TYPE7 dstType7 = {{0}};
@@ -756,9 +729,6 @@ CacheInfoUpdateSmbiosType7 (
dstType7.SystemCacheType = SmbiosT7->T7SystemCacheType;
dstType7.Associativity = SmbiosT7->T7Associativity;
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7Strings);
-#else
- LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&mCacheInfoType7, mCacheInfoType7Strings);
-#endif
}
/***********************************************************************
@@ -782,7 +752,6 @@ PhyMemArrayInfoUpdateSmbiosType16 (
VOID
)
{
-#if (FixedPcdGetBool (PcdIscpSupport))
ISCP_TYPE16_SMBIOS_INFO *SmbiosT16 = &mSmbiosInfo.SmbiosMemBuffer.T16;
DEBUG ((EFI_D_ERROR, "Logging SmbiosType16 from ISCP.\n"));
@@ -791,7 +760,6 @@ PhyMemArrayInfoUpdateSmbiosType16 (
mPhyMemArrayInfoType16.Use = SmbiosT16->Use;
mPhyMemArrayInfoType16.MemoryErrorCorrection = SmbiosT16->MemoryErrorCorrection;
mPhyMemArrayInfoType16.NumberOfMemoryDevices = SmbiosT16->NumberOfMemoryDevices;
-#endif
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&mPhyMemArrayInfoType16, mPhyMemArrayInfoType16Strings);
}
@@ -805,7 +773,6 @@ MemDevInfoUpdatedstType17 (
VOID
)
{
-#if (FixedPcdGetBool (PcdIscpSupport))
SMBIOS_TABLE_TYPE17 dstType17 = {{0}};
ISCP_TYPE17_SMBIOS_INFO *srcType17;
UINTN i, j, StrIndex, LastIndex;
@@ -874,9 +841,6 @@ MemDevInfoUpdatedstType17 (
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType17, mMemDevInfoType17Strings);
}
}
-#else
- LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&mMemDevInfoType17, mMemDevInfoType17Strings);
-#endif
}
/***********************************************************************
@@ -888,7 +852,6 @@ MemArrMapInfoUpdateSmbiosType19 (
VOID
)
{
-#if (FixedPcdGetBool (PcdIscpSupport))
ISCP_TYPE19_SMBIOS_INFO *SmbiosT19 = &mSmbiosInfo.SmbiosMemBuffer.T19;
DEBUG ((EFI_D_ERROR, "Logging SmbiosType19 from ISCP.\n"));
@@ -899,7 +862,6 @@ MemArrMapInfoUpdateSmbiosType19 (
mMemArrMapInfoType19.PartitionWidth = SmbiosT19->PartitionWidth;
mMemArrMapInfoType19.ExtendedStartingAddress = SmbiosT19->ExtStartingAddr;
mMemArrMapInfoType19.ExtendedEndingAddress = SmbiosT19->ExtEndingAddr;
-#endif
LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&mMemArrMapInfoType19, mMemArrMapInfoType19Strings);
}
@@ -946,7 +908,6 @@ PlatformSmbiosDriverEntryPoint (
return Status;
}
-#if (FixedPcdGetBool (PcdIscpSupport))
Status = gBS->LocateProtocol (
&gAmdIscpDxeProtocolGuid,
NULL,
@@ -966,7 +927,6 @@ PlatformSmbiosDriverEntryPoint (
DEBUG ((EFI_D_ERROR, "Failed to get SMBIOS data via ISCP"));
return Status;
}
-#endif
BIOSInfoUpdateSmbiosType0();
diff --git a/Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf b/Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf
index 0027d79031d7..76521cbde59e 100644
--- a/Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf
+++ b/Silicon/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf
@@ -52,7 +52,6 @@ [Guids]
[FixedPcd]
gArmPlatformTokenSpaceGuid.PcdCoreCount
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz
- gAmdStyxTokenSpaceGuid.PcdIscpSupport
[Depex]
gEfiSmbiosProtocolGuid AND
diff --git a/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf b/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf
index d17e6c26feb5..db7ce6af33d1 100644
--- a/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf
+++ b/Silicon/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf
@@ -72,8 +72,6 @@ [FixedPcd]
gAmdStyxTokenSpaceGuid.PcdTrustedFWMemoryBase
gAmdStyxTokenSpaceGuid.PcdTrustedFWMemorySize
- gAmdStyxTokenSpaceGuid.PcdIscpSupport
-
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
diff --git a/Silicon/AMD/Styx/Library/RealTimeClockLib/RealTimeClockLib.c b/Silicon/AMD/Styx/Library/RealTimeClockLib/RealTimeClockLib.c
index 1b926242b5bb..11f398ad29e2 100644
--- a/Silicon/AMD/Styx/Library/RealTimeClockLib/RealTimeClockLib.c
+++ b/Silicon/AMD/Styx/Library/RealTimeClockLib/RealTimeClockLib.c
@@ -60,10 +60,6 @@ LibGetTime (
ISCP_RTC_INFO RtcInfo;
EFI_STATUS Status;
- if (!FixedPcdGetBool (PcdIscpSupport)) {
- return EFI_DEVICE_ERROR;
- }
-
if (mRtcIscpDxeProtocol == NULL) {
DEBUG((EFI_D_ERROR, "RTC: ISCP DXE Protocol is NULL!\n"));
return EFI_DEVICE_ERROR;
@@ -111,10 +107,6 @@ LibSetTime (
EFI_STATUS Status;
ISCP_RTC_INFO RtcInfo;
- if (!FixedPcdGetBool (PcdIscpSupport)) {
- return EFI_DEVICE_ERROR;
- }
-
//
// Use Time, to set the time in your RTC hardware
//
@@ -213,10 +205,6 @@ LibRtcInitialize (
{
EFI_STATUS Status;
- if (!FixedPcdGetBool (PcdIscpSupport)) {
- return EFI_SUCCESS;
- }
-
//
// Do some initialization if required to turn on the RTC
//
@@ -268,9 +256,7 @@ LibRtcVirtualNotifyEvent (
// to virtual address. After the OS transistions to calling in virtual mode, all future
// runtime calls will be made in virtual mode.
//
- if (FixedPcdGetBool (PcdIscpSupport)) {
- EfiConvertPointer (0x0, (VOID**)&mRtcIscpDxeProtocol);
- }
+ EfiConvertPointer (0x0, (VOID**)&mRtcIscpDxeProtocol);
}
diff --git a/Silicon/AMD/Styx/Library/RealTimeClockLib/RealTimeClockLib.inf b/Silicon/AMD/Styx/Library/RealTimeClockLib/RealTimeClockLib.inf
index cd9418c9b732..5392bd076cf0 100644
--- a/Silicon/AMD/Styx/Library/RealTimeClockLib/RealTimeClockLib.inf
+++ b/Silicon/AMD/Styx/Library/RealTimeClockLib/RealTimeClockLib.inf
@@ -41,9 +41,6 @@ [LibraryClasses]
UefiRuntimeLib
DxeServicesTableLib
-[FixedPcd]
- gAmdStyxTokenSpaceGuid.PcdIscpSupport
-
[Guids]
gEfiEventVirtualAddressChangeGuid
--
2.17.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH edk2-platforms 5/5] Platform/AMD/Overdrive: enable support for NVME PCIe devices
2018-05-15 17:37 [PATCH edk2-platforms 0/5] Seattle spring cleaning Ard Biesheuvel
` (3 preceding siblings ...)
2018-05-15 17:37 ` [PATCH edk2-platforms 4/5] Silicon/AMD/Styx: make ISCP dependency unconditional Ard Biesheuvel
@ 2018-05-15 17:37 ` Ard Biesheuvel
2018-05-22 14:56 ` [PATCH edk2-platforms 0/5] Seattle spring cleaning Leif Lindholm
5 siblings, 0 replies; 8+ messages in thread
From: Ard Biesheuvel @ 2018-05-15 17:37 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, alan, neko, Ard Biesheuvel
Upon request, add the generic NvmExpress driver to the Overdrive
build so plugin NVME SSDs can be supported at boot.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 1 +
Platform/AMD/OverdriveBoard/OverdriveBoard.fdf | 1 +
2 files changed, 2 insertions(+)
diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
index 7bc1ab937813..5e564f66b824 100644
--- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
+++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
@@ -621,6 +621,7 @@ [Components.common]
ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+ MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
#
# AHCI Support
diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf b/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
index 1ed32f68ef9d..97894aa8482d 100644
--- a/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
+++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.fdf
@@ -161,6 +161,7 @@ [FV.FvMain]
INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+ INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
#
# AHCI Support
--
2.17.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH edk2-platforms 0/5] Seattle spring cleaning
2018-05-15 17:37 [PATCH edk2-platforms 0/5] Seattle spring cleaning Ard Biesheuvel
` (4 preceding siblings ...)
2018-05-15 17:37 ` [PATCH edk2-platforms 5/5] Platform/AMD/Overdrive: enable support for NVME PCIe devices Ard Biesheuvel
@ 2018-05-22 14:56 ` Leif Lindholm
2018-05-22 16:40 ` Ard Biesheuvel
5 siblings, 1 reply; 8+ messages in thread
From: Leif Lindholm @ 2018-05-22 14:56 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel, alan, neko
On Tue, May 15, 2018 at 07:37:31PM +0200, Ard Biesheuvel wrote:
> Some cleanup patches for Seattle, removing the unused code that deals
> with configurations where the SCP, ARM-TF or PSCI support are absent,
> which is rather pointless for a platform that is no longer under
> development.
>
> Ard Biesheuvel (5):
> Silicon/AMD/Styx: make ARM-TF and PSCI dependencies unconditional
> Silicon/AMD/Styx: remove MpBootDxe driver
> Silicon/AMD/Styx: remove support for the ACPI parking protocol
> Silicon/AMD/Styx: make ISCP dependency unconditional
> Platform/AMD/Overdrive: enable support for NVME PCIe devices
For the series:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> .../AMD/OverdriveBoard/OverdriveBoard.dsc | 20 +--
> .../AMD/OverdriveBoard/OverdriveBoard.fdf | 6 +-
> Platform/LeMaker/CelloBoard/CelloBoard.dsc | 3 -
> .../Overdrive1000Board/Overdrive1000Board.dsc | 19 --
> .../Overdrive1000Board/Overdrive1000Board.fdf | 5 -
> Silicon/AMD/Styx/AcpiTables/AcpiTables.inf | 3 -
> Silicon/AMD/Styx/AcpiTables/Fadt.c | 5 +-
> Silicon/AMD/Styx/AcpiTables/Madt.c | 24 +--
> Silicon/AMD/Styx/AmdStyx.dec | 12 --
> Silicon/AMD/Styx/Common/Protocol/AmdMpBoot.h | 39 ----
> .../AMD/Styx/Common/Protocol/AmdMpCoreInfo.h | 7 -
> .../AMD/Styx/Drivers/MpBootDxe/MpBootDxe.c | 170 ------------------
> .../AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf | 53 ------
> .../AMD/Styx/Drivers/MpBootDxe/MpBootHelper.S | 87 ---------
> .../Styx/Drivers/PlatInitDxe/PlatInitDxe.c | 91 ----------
> .../Styx/Drivers/PlatInitDxe/PlatInitDxe.inf | 6 -
> .../Styx/Drivers/PlatInitPei/PlatInitPei.c | 120 ++++++-------
> .../Styx/Drivers/PlatInitPei/PlatInitPei.inf | 2 -
> .../PlatformSmbiosDxe/PlatformSmbiosDxe.c | 40 -----
> .../PlatformSmbiosDxe/PlatformSmbiosDxe.inf | 1 -
> .../Library/MemoryInitPei/MemoryInitPeiLib.c | 58 +++---
> .../MemoryInitPei/MemoryInitPeiLib.inf | 3 -
> .../RealTimeClockLib/RealTimeClockLib.c | 16 +-
> .../RealTimeClockLib/RealTimeClockLib.inf | 3 -
> .../Library/ResetSystemLib/ResetSystemLib.inf | 3 -
> .../StyxDtbLoaderLib/StyxDtbLoaderLib.inf | 2 -
> 26 files changed, 89 insertions(+), 709 deletions(-)
> delete mode 100644 Silicon/AMD/Styx/Common/Protocol/AmdMpBoot.h
> delete mode 100644 Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.c
> delete mode 100644 Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf
> delete mode 100644 Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootHelper.S
>
> --
> 2.17.0
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH edk2-platforms 0/5] Seattle spring cleaning
2018-05-22 14:56 ` [PATCH edk2-platforms 0/5] Seattle spring cleaning Leif Lindholm
@ 2018-05-22 16:40 ` Ard Biesheuvel
0 siblings, 0 replies; 8+ messages in thread
From: Ard Biesheuvel @ 2018-05-22 16:40 UTC (permalink / raw)
To: Leif Lindholm; +Cc: edk2-devel@lists.01.org, Alan Ott, Matt Sealey
On 22 May 2018 at 16:56, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Tue, May 15, 2018 at 07:37:31PM +0200, Ard Biesheuvel wrote:
>> Some cleanup patches for Seattle, removing the unused code that deals
>> with configurations where the SCP, ARM-TF or PSCI support are absent,
>> which is rather pointless for a platform that is no longer under
>> development.
>>
>> Ard Biesheuvel (5):
>> Silicon/AMD/Styx: make ARM-TF and PSCI dependencies unconditional
>> Silicon/AMD/Styx: remove MpBootDxe driver
>> Silicon/AMD/Styx: remove support for the ACPI parking protocol
>> Silicon/AMD/Styx: make ISCP dependency unconditional
>> Platform/AMD/Overdrive: enable support for NVME PCIe devices
>
> For the series:
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>
Thanks
Pushed as 735e517fefbf..e174fc77d3bb
>
>> .../AMD/OverdriveBoard/OverdriveBoard.dsc | 20 +--
>> .../AMD/OverdriveBoard/OverdriveBoard.fdf | 6 +-
>> Platform/LeMaker/CelloBoard/CelloBoard.dsc | 3 -
>> .../Overdrive1000Board/Overdrive1000Board.dsc | 19 --
>> .../Overdrive1000Board/Overdrive1000Board.fdf | 5 -
>> Silicon/AMD/Styx/AcpiTables/AcpiTables.inf | 3 -
>> Silicon/AMD/Styx/AcpiTables/Fadt.c | 5 +-
>> Silicon/AMD/Styx/AcpiTables/Madt.c | 24 +--
>> Silicon/AMD/Styx/AmdStyx.dec | 12 --
>> Silicon/AMD/Styx/Common/Protocol/AmdMpBoot.h | 39 ----
>> .../AMD/Styx/Common/Protocol/AmdMpCoreInfo.h | 7 -
>> .../AMD/Styx/Drivers/MpBootDxe/MpBootDxe.c | 170 ------------------
>> .../AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf | 53 ------
>> .../AMD/Styx/Drivers/MpBootDxe/MpBootHelper.S | 87 ---------
>> .../Styx/Drivers/PlatInitDxe/PlatInitDxe.c | 91 ----------
>> .../Styx/Drivers/PlatInitDxe/PlatInitDxe.inf | 6 -
>> .../Styx/Drivers/PlatInitPei/PlatInitPei.c | 120 ++++++-------
>> .../Styx/Drivers/PlatInitPei/PlatInitPei.inf | 2 -
>> .../PlatformSmbiosDxe/PlatformSmbiosDxe.c | 40 -----
>> .../PlatformSmbiosDxe/PlatformSmbiosDxe.inf | 1 -
>> .../Library/MemoryInitPei/MemoryInitPeiLib.c | 58 +++---
>> .../MemoryInitPei/MemoryInitPeiLib.inf | 3 -
>> .../RealTimeClockLib/RealTimeClockLib.c | 16 +-
>> .../RealTimeClockLib/RealTimeClockLib.inf | 3 -
>> .../Library/ResetSystemLib/ResetSystemLib.inf | 3 -
>> .../StyxDtbLoaderLib/StyxDtbLoaderLib.inf | 2 -
>> 26 files changed, 89 insertions(+), 709 deletions(-)
>> delete mode 100644 Silicon/AMD/Styx/Common/Protocol/AmdMpBoot.h
>> delete mode 100644 Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.c
>> delete mode 100644 Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootDxe.inf
>> delete mode 100644 Silicon/AMD/Styx/Drivers/MpBootDxe/MpBootHelper.S
>>
>> --
>> 2.17.0
>>
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2018-05-22 16:40 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2018-05-15 17:37 [PATCH edk2-platforms 0/5] Seattle spring cleaning Ard Biesheuvel
2018-05-15 17:37 ` [PATCH edk2-platforms 1/5] Silicon/AMD/Styx: make ARM-TF and PSCI dependencies unconditional Ard Biesheuvel
2018-05-15 17:37 ` [PATCH edk2-platforms 2/5] Silicon/AMD/Styx: remove MpBootDxe driver Ard Biesheuvel
2018-05-15 17:37 ` [PATCH edk2-platforms 3/5] Silicon/AMD/Styx: remove support for the ACPI parking protocol Ard Biesheuvel
2018-05-15 17:37 ` [PATCH edk2-platforms 4/5] Silicon/AMD/Styx: make ISCP dependency unconditional Ard Biesheuvel
2018-05-15 17:37 ` [PATCH edk2-platforms 5/5] Platform/AMD/Overdrive: enable support for NVME PCIe devices Ard Biesheuvel
2018-05-22 14:56 ` [PATCH edk2-platforms 0/5] Seattle spring cleaning Leif Lindholm
2018-05-22 16:40 ` Ard Biesheuvel
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