From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.100; helo=mga07.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 813C0207E5400 for ; Fri, 25 May 2018 03:02:39 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 May 2018 03:02:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,439,1520924400"; d="scan'208";a="202392467" Received: from ray-dev.ccr.corp.intel.com ([10.239.9.4]) by orsmga004.jf.intel.com with ESMTP; 25 May 2018 03:02:37 -0700 From: Ruiyu Ni To: edk2-devel@lists.01.org Date: Fri, 25 May 2018 18:02:44 +0800 Message-Id: <20180525100246.428944-1-ruiyu.ni@intel.com> X-Mailer: git-send-email 2.16.1.windows.1 Subject: [PATCH 0/2] MdeModulePkg/PciBus: Do not enable MemWriteAndInvalidate bit for PCIE X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 25 May 2018 10:02:39 -0000 Per PCIE spec, Memory Write and Invalidate is hardwired to 0b so PciBus driver shouldn't write 1b to it. Patch #1 cleans up some unnecessary code. Ruiyu Ni (2): MdeModulePkg/PciBus: Remove unnecessary PCIE detection MdeModulePkg/PciBus: Do not enable MemWriteAndInvalidate bit for PCIE MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c | 17 +---------------- MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 10 ++++++---- 2 files changed, 7 insertions(+), 20 deletions(-) -- 2.16.1.windows.1