From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.100; helo=mga07.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 09DCC20837994 for ; Fri, 25 May 2018 03:02:41 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 May 2018 03:02:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,439,1520924400"; d="scan'208";a="202392478" Received: from ray-dev.ccr.corp.intel.com ([10.239.9.4]) by orsmga004.jf.intel.com with ESMTP; 25 May 2018 03:02:40 -0700 From: Ruiyu Ni To: edk2-devel@lists.01.org Cc: Star Zeng , Chasel Chiu Date: Fri, 25 May 2018 18:02:46 +0800 Message-Id: <20180525100246.428944-3-ruiyu.ni@intel.com> X-Mailer: git-send-email 2.16.1.windows.1 In-Reply-To: <20180525100246.428944-1-ruiyu.ni@intel.com> References: <20180525100246.428944-1-ruiyu.ni@intel.com> Subject: [PATCH 2/2] MdeModulePkg/PciBus: Do not enable MemWriteAndInvalidate bit for PCIE X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 25 May 2018 10:02:41 -0000 Per PCIE spec, Memory Write and Invalidate is hardwired to 0b so PciBus driver shouldn't write 1b to it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni Cc: Star Zeng Cc: Chasel Chiu --- MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c index 81171c82d9..6f3d1bebc6 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c @@ -1,7 +1,7 @@ /** @file PCI emumeration support functions implementation for PCI Bus module. -Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
(C) Copyright 2015 Hewlett Packard Enterprise Development LP
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -1254,9 +1254,11 @@ DetermineDeviceAttribute ( PciSetDeviceAttribute (PciIoDevice, OldCommand, OldBridgeControl, EFI_SET_ATTRIBUTES); // - // Enable other supported attributes but not defined in PCI_IO_PROTOCOL - // - PCI_ENABLE_COMMAND_REGISTER (PciIoDevice, EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE); + // Enable other PCI supported attributes but not defined in PCI_IO_PROTOCOL + // For PCI Express devices, Memory Write and Invalidate is hardwired to 0b so only enable it for PCI devices. + if (!PciIoDevice->IsPciExp) { + PCI_ENABLE_COMMAND_REGISTER (PciIoDevice, EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE); + } } FastB2BSupport = TRUE; -- 2.16.1.windows.1