[PATCH edk2-platforms 2/2] Silicon/NorFlashSynQuacerLib: describe entire firmware region as FV

[Ard Biesheuvel <ard.biesheuvel@linaro.org>]

In order to allow for more flexibility when updating parts of the
firmware via capsule update, expand the description of the code FV
to cover the entire 4 MB region at the base of the NOR flash.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c
index 816d8ba33f8c..357082c3d903 100644
--- a/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c
+++ b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c
@@ -23,8 +23,9 @@ STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] = {
   {
     // UEFI code region
     SYNQUACER_SPI_NOR_BASE,                             // device base
-    FixedPcdGet64 (PcdFdBaseAddress),                   // region base
-    FixedPcdGet32 (PcdFdSize),                          // region size
+    SYNQUACER_SPI_NOR_BASE,                             // region base
+    FixedPcdGet32 (PcdFlashNvStorageVariableBase) -
+    SYNQUACER_SPI_NOR_BASE,                             // region size
     SIZE_64KB,                                          // block size
     {
       0x19c118b0, 0xc423, 0x42be, { 0xb8, 0x0f, 0x70, 0x6f, 0x1f, 0xcb, 0x59, 0x9a }
-- 
2.17.0