From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::241; helo=mail-wm0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 695BC21194899 for ; Mon, 11 Jun 2018 00:42:33 -0700 (PDT) Received: by mail-wm0-x241.google.com with SMTP id e16-v6so12849131wmd.0 for ; Mon, 11 Jun 2018 00:42:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=A1UO0sgBr4yMU3KgKWd6d8b8NpMbtT/xuXUlXnyCrfQ=; b=VR5uZ6S88+CigLQa5wlvzOpSESMo75qc3HElHhE9m2hPFg8rYvstVowMpHyCMmMUFK /1t7cVLX+ecjRqEoF4YBy2EE45+mm7jDejUcTPCrYysbONMRgIsf25Q1bh5/uP28iTOe dOwFDWfZVL7YkSwUJ/OrC9KWpsclh9P5mgahc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=A1UO0sgBr4yMU3KgKWd6d8b8NpMbtT/xuXUlXnyCrfQ=; b=qqZA3OzHHhkzRx4sKYF5Uty+jcmPdPfygh5YdLKgTAQOGopQ2gvbPrnntQ5OG/2eq5 zBzAnebhyYix53pjDkZFnQkqmV1jikbI7YyCdcKNDrWSy7jQvQShLAuQGWIil2EmIjUa Mz+JfLKjgBqREkKBNZqKcwp1R+uPKd5Ib+pXlxsfF3fdEkTESoctUinhecEoW1R/mK6U XOq5vTLdg/rBbYvulPtkv8lJye3mrmXF9MqtzmP9ErTn7tcBqTADppcxv7IxjoGMJDSi PN2CaN7f9CLC5WsMHxJi+Gu3XQm8NgbcaTKHJuEEnk7S3wIbEF4chlI5SMr9RvGKD+1H rBog== X-Gm-Message-State: APt69E0DR2kYVIZfxdx2UXinruwZt4hgx885YirUegIMdt/htCcjj2aN jm00r32v68QdQe4ro43r2nXF1qb8K5g= X-Google-Smtp-Source: ADUXVKJs3lADIh5uXOLsswLcvm7dO7uZyi5HyU+xIf+UKVF3CEB6uKoxzxMlZW8LHCErq9OVUVL9PQ== X-Received: by 2002:a1c:454f:: with SMTP id s76-v6mr7091108wma.16.1528702951677; Mon, 11 Jun 2018 00:42:31 -0700 (PDT) Received: from dogfood.home ([2a01:cb1d:112:6f00:49dd:727b:5dc6:612d]) by smtp.gmail.com with ESMTPSA id n7-v6sm45702756wri.27.2018.06.11.00.42.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 11 Jun 2018 00:42:30 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org Cc: yonghong.zhu@intel.com, liming.gao@intel.com, lersek@redhat.com, steven.shi@intel.com, zenith432@users.sourceforge.net, Ard Biesheuvel Date: Mon, 11 Jun 2018 09:42:27 +0200 Message-Id: <20180611074227.30625-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 Subject: [PATCH] BaseTools/tools_def IA32: disable PIE code generation explicitly X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 11 Jun 2018 07:42:33 -0000 As a security measure, some distros now build their GCC toolchains with PIE code generation enabled by default, because it is a prerequisite for ASLR to be enabled when running the executable. This typically results in slightly larger code, but it also generates ELF relocations that our tooling cannot deal with, so let's disable it explicitly when using GCC5 for IA32. (Note that this does not apply to X64: it uses PIE code deliberately in some cases, and our tooling does deal with the resuling relocations) Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- BaseTools/Conf/tools_def.template | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template index 7e9c915755ed..ab57f9c706e3 100755 --- a/BaseTools/Conf/tools_def.template +++ b/BaseTools/Conf/tools_def.template @@ -4670,7 +4670,7 @@ DEFINE GCC49_AARCH64_DLINK2_FLAGS = DEF(GCC48_AARCH64_DLINK2_FLAGS) DEFINE GCC49_ARM_ASLDLINK_FLAGS = DEF(GCC48_ARM_ASLDLINK_FLAGS) DEFINE GCC49_AARCH64_ASLDLINK_FLAGS = DEF(GCC48_AARCH64_ASLDLINK_FLAGS) -DEFINE GCC5_IA32_CC_FLAGS = DEF(GCC49_IA32_CC_FLAGS) +DEFINE GCC5_IA32_CC_FLAGS = DEF(GCC49_IA32_CC_FLAGS) -fno-pic -fno-pie DEFINE GCC5_X64_CC_FLAGS = DEF(GCC49_X64_CC_FLAGS) DEFINE GCC5_IA32_X64_DLINK_COMMON = DEF(GCC49_IA32_X64_DLINK_COMMON) DEFINE GCC5_IA32_X64_ASLDLINK_FLAGS = DEF(GCC49_IA32_X64_ASLDLINK_FLAGS) @@ -5502,9 +5502,9 @@ RELEASE_GCC49_AARCH64_DLINK_FLAGS = DEF(GCC49_AARCH64_DLINK_FLAGS) *_GCC5_IA32_RC_PATH = DEF(GCC5_IA32_PREFIX)objcopy *_GCC5_IA32_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS) -m32 -fno-lto -*_GCC5_IA32_ASLDLINK_FLAGS = DEF(GCC5_IA32_X64_ASLDLINK_FLAGS) -Wl,-m,elf_i386 +*_GCC5_IA32_ASLDLINK_FLAGS = DEF(GCC5_IA32_X64_ASLDLINK_FLAGS) -Wl,-m,elf_i386 -no-pie *_GCC5_IA32_ASM_FLAGS = DEF(GCC5_ASM_FLAGS) -m32 -march=i386 -*_GCC5_IA32_DLINK2_FLAGS = DEF(GCC5_IA32_DLINK2_FLAGS) +*_GCC5_IA32_DLINK2_FLAGS = DEF(GCC5_IA32_DLINK2_FLAGS) -no-pie *_GCC5_IA32_RC_FLAGS = DEF(GCC_IA32_RC_FLAGS) *_GCC5_IA32_OBJCOPY_FLAGS = *_GCC5_IA32_NASM_FLAGS = -f elf32 -- 2.17.1