* [platforms PATCH 01/25] Marvell/Library: Introduce ArmadaSoCDescLib class
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
@ 2018-06-08 15:33 ` Marcin Wojtas
2018-06-12 15:16 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 02/25] Marvell/Library: Introduce ArmadaBoardDescLib class Marcin Wojtas
` (25 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:33 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
From: jinghua <jinghua@marvell.com>
ArmadaSoCDescLib is a per SoC family library, which provides SoC
description, like register base of some hardware module controller,
COMPHY/I2C/NETWORK etc., which right now is hardcoded in MvHwDescLib.h.
There will be a new protocol, which gets SoC description from this
library, and provides board description based on enable/disable
values of each hardware module controller in dsc file.
As a first example implement obtaining UTMI controllers information.
Remaining interfaces will be added in follow-up commits.
This patch introduces new library callback (ArmadaSoCDescUtmiGet ()),
which dynamically allocates and fills MV_SOC_UTMI_DESC structure,
SoC description of UTMI PHYs. A new PCD is introduced (PcdMaxCpCount)
which stores maximal amount of CP110 blocks in the SoC family.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: jinghua <jinghua@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 78 ++++++++++++++++++++
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf | 37 ++++++++++
Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 33 +++++++++
Silicon/Marvell/Marvell.dec | 4 +
4 files changed, 152 insertions(+)
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
new file mode 100644
index 0000000..0ee943b
--- /dev/null
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -0,0 +1,78 @@
+/**
+*
+* Copyright (C) 2018, Marvell International Ltd. and its affiliates.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+* Glossary - abbreviations used in Marvell SampleAtReset library implementation:
+* AP - Application Processor hardware block (Armada 7k8k incorporates AP806)
+* CP - South Bridge hardware blocks (Armada 7k8k incorporates CP110)
+**/
+
+#include <Uefi.h>
+
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#include <Protocol/BoardDesc.h>
+
+//
+// Common macros
+//
+#define MV_SOC_CP_BASE(Cp) (0xF2000000 + (Cp) * 0x2000000)
+
+//
+// Platform description of UTMI PHY's
+//
+#define MV_SOC_UTMI_PER_CP_COUNT 2
+#define MV_SOC_UTMI_ID(Utmi) (Utmi)
+#define MV_SOC_UTMI_BASE(Utmi) (0x580000 + (Utmi) * 0x1000)
+#define MV_SOC_UTMI_CFG_BASE 0x440440
+#define MV_SOC_UTMI_USB_CFG_BASE 0x440420
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescUtmiGet (
+ IN OUT MV_SOC_UTMI_DESC **UtmiDesc,
+ IN OUT UINT8 *DescCount
+ )
+{
+ MV_SOC_UTMI_DESC *Desc;
+ UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount);
+ UINT8 Index, CpIndex, UtmiIndex = 0;
+
+ Desc = AllocateZeroPool (CpCount * MV_SOC_UTMI_PER_CP_COUNT *
+ sizeof (MV_SOC_UTMI_DESC));
+ if (Desc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+ for (Index = 0; Index < MV_SOC_UTMI_PER_CP_COUNT; Index++) {
+ Desc[UtmiIndex].UtmiPhyId = MV_SOC_UTMI_ID (UtmiIndex);
+ Desc[UtmiIndex].UtmiBaseAddress =
+ MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_BASE (Index);
+ Desc[UtmiIndex].UtmiConfigAddress =
+ MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_CFG_BASE;
+ Desc[UtmiIndex].UsbConfigAddress =
+ MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_USB_CFG_BASE;
+ UtmiIndex++;
+ }
+ }
+
+ *UtmiDesc = Desc;
+ *DescCount = UtmiIndex;
+
+ return EFI_SUCCESS;
+}
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
new file mode 100644
index 0000000..e993878
--- /dev/null
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
@@ -0,0 +1,37 @@
+## @file
+#
+# Copyright (C) 2018, Marvell International Ltd. and its affiliates<BR>
+#
+# This program and the accompanying materials are licensed and made available
+# under the terms and conditions of the BSD License which accompanies this
+# distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+# IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = Armada7k8kDescLib
+ FILE_GUID = c64f0048-4ca3-4573-b0a6-c2e9e6457285
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmadaSoCDescLib
+
+[Sources]
+ Armada7k8kSoCDescLib.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Marvell/Marvell.dec
+
+[LibraryClasses]
+ DebugLib
+ IoLib
+ PcdLib
+
+[FixedPcd]
+ gMarvellTokenSpaceGuid.PcdMaxCpCount
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
new file mode 100644
index 0000000..22f5c17
--- /dev/null
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -0,0 +1,33 @@
+/**
+*
+* Copyright (C) 2018, Marvell International Ltd. and its affiliates
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+#ifndef __ARMADA_SOC_DESC_LIB_H__
+#define __ARMADA_SOC_DESC_LIB_H__
+
+//
+// UTMI PHY devices SoC description
+//
+typedef struct {
+ UINT8 UtmiPhyId;
+ UINTN UtmiBaseAddress;
+ UINTN UtmiConfigAddress;
+ UINTN UsbConfigAddress;
+} MV_SOC_UTMI_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescUtmiGet (
+ IN OUT MV_SOC_UTMI_DESC **UtmiDesc,
+ IN OUT UINT8 *DescCount
+ );
+#endif /* __ARMADA_SOC_DESC_LIB_H__ */
diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
index be74b4e..2a92eff 100644
--- a/Silicon/Marvell/Marvell.dec
+++ b/Silicon/Marvell/Marvell.dec
@@ -60,6 +60,7 @@
gMarvellSpiFlashDxeGuid = { 0x49d7fb74, 0x306d, 0x42bd, { 0x94, 0xc8, 0xc0, 0xc5, 0x4b, 0x18, 0x1d, 0xd7 } }
[LibraryClasses]
+ ArmadaSoCDescLib|Include/Library/ArmadaSoCDescLib.h
SampleAtResetLib|Include/Library/SampleAtResetLib.h
[Protocols]
@@ -68,6 +69,9 @@
gMarvellPlatformInitCompleteProtocolGuid = { 0x465b8cf7, 0x016f, 0x4ba6, { 0xbe, 0x6b, 0x28, 0x0e, 0x3a, 0x7d, 0x38, 0x6f } }
[PcdsFixedAtBuild.common]
+#Board description
+ gMarvellTokenSpaceGuid.PcdMaxCpCount|0x2|UINT8|0x30000072
+
#MPP
gMarvellTokenSpaceGuid.PcdMppChipCount|0|UINT32|0x30000001
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 01/25] Marvell/Library: Introduce ArmadaSoCDescLib class
2018-06-08 15:33 ` [platforms PATCH 01/25] Marvell/Library: Introduce ArmadaSoCDescLib class Marcin Wojtas
@ 2018-06-12 15:16 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 15:16 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:33:59PM +0200, Marcin Wojtas wrote:
> From: jinghua <jinghua@marvell.com>
>
> ArmadaSoCDescLib is a per SoC family library, which provides SoC
> description, like register base of some hardware module controller,
> COMPHY/I2C/NETWORK etc., which right now is hardcoded in MvHwDescLib.h.
> There will be a new protocol, which gets SoC description from this
> library, and provides board description based on enable/disable
> values of each hardware module controller in dsc file.
>
> As a first example implement obtaining UTMI controllers information.
> Remaining interfaces will be added in follow-up commits.
> This patch introduces new library callback (ArmadaSoCDescUtmiGet ()),
> which dynamically allocates and fills MV_SOC_UTMI_DESC structure,
> SoC description of UTMI PHYs. A new PCD is introduced (PcdMaxCpCount)
> which stores maximal amount of CP110 blocks in the SoC family.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: jinghua <jinghua@marvell.com>
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 78 ++++++++++++++++++++
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf | 37 ++++++++++
> Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 33 +++++++++
> Silicon/Marvell/Marvell.dec | 4 +
> 4 files changed, 152 insertions(+)
>
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
When you send v2, can you generate it with a diff order file as per
https://github.com/tianocore/tianocore.github.io/wiki/Laszlo's-unkempt-git-guide-for-edk2-contributors-and-maintainers#contrib-10
?
You can now set this permanently for your repository with git config
diff.orderFile, so you don't need to remember it for each time you
generate a new set.
(But I agree with Laszlo that it makes completely new contributions a
lot easier to review.)
> new file mode 100644
> index 0000000..0ee943b
> --- /dev/null
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> @@ -0,0 +1,78 @@
> +/**
> +*
> +* Copyright (C) 2018, Marvell International Ltd. and its affiliates.
> +*
> +* This program and the accompanying materials are licensed and made available
> +* under the terms and conditions of the BSD License which accompanies this
> +* distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +* Glossary - abbreviations used in Marvell SampleAtReset library implementation:
> +* AP - Application Processor hardware block (Armada 7k8k incorporates AP806)
> +* CP - South Bridge hardware blocks (Armada 7k8k incorporates CP110)
> +**/
> +
> +#include <Uefi.h>
> +
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +
> +#include <Protocol/BoardDesc.h>
> +
> +//
> +// Common macros
> +//
> +#define MV_SOC_CP_BASE(Cp) (0xF2000000 + (Cp) * 0x2000000)
> +
> +//
> +// Platform description of UTMI PHY's
> +//
> +#define MV_SOC_UTMI_PER_CP_COUNT 2
> +#define MV_SOC_UTMI_ID(Utmi) (Utmi)
> +#define MV_SOC_UTMI_BASE(Utmi) (0x580000 + (Utmi) * 0x1000)
Ideally, add parentheses around ((Cp) * 0x2000000) and ((Utmi) *
0x1000). I know the evaluation order, but it's good to always be explicit.
> +#define MV_SOC_UTMI_CFG_BASE 0x440440
> +#define MV_SOC_UTMI_USB_CFG_BASE 0x440420
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescUtmiGet (
> + IN OUT MV_SOC_UTMI_DESC **UtmiDesc,
> + IN OUT UINT8 *DescCount
> + )
> +{
> + MV_SOC_UTMI_DESC *Desc;
> + UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount);
> + UINT8 Index, CpIndex, UtmiIndex = 0;
> +
> + Desc = AllocateZeroPool (CpCount * MV_SOC_UTMI_PER_CP_COUNT *
> + sizeof (MV_SOC_UTMI_DESC));
> + if (Desc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> + for (Index = 0; Index < MV_SOC_UTMI_PER_CP_COUNT; Index++) {
> + Desc[UtmiIndex].UtmiPhyId = MV_SOC_UTMI_ID (UtmiIndex);
> + Desc[UtmiIndex].UtmiBaseAddress =
> + MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_BASE (Index);
> + Desc[UtmiIndex].UtmiConfigAddress =
> + MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_CFG_BASE;
> + Desc[UtmiIndex].UsbConfigAddress =
> + MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_USB_CFG_BASE;
> + UtmiIndex++;
> + }
> + }
There is no failure condition here past the alloc, so I think this
could be cleaned up a bit as:
+ *DescCount = CpCount * MV_SOC_UTMI_PER_CP_COUNT;
+ Desc = AllocateZeroPool (*DescCount * sizeof (MV_SOC_UTMI_DESC));
... return if NULL ...
+ *UtmiDesc = Desc;
+
+ for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+ for (Index = 0; Index < MV_SOC_UTMI_PER_CP_COUNT; Index++) {
+ Desc->UtmiPhyId = MV_SOC_UTMI_ID (UtmiIndex);
+ Desc->UtmiBaseAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_BASE (Index);
+ Desc->UtmiConfigAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_CFG_BASE;
+ Desc->UsbConfigAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_USB_CFG_BASE;
+ Desc++;
+ UtmiIndex++;
+ }
+ }
+
(I don't know about Ard, but I would totally let the then very minor
line length overrun on two lines slip.)
> +
> + *UtmiDesc = Desc;
> + *DescCount = UtmiIndex;
> +
> + return EFI_SUCCESS;
> +}
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
> new file mode 100644
> index 0000000..e993878
> --- /dev/null
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
> @@ -0,0 +1,37 @@
> +## @file
> +#
> +# Copyright (C) 2018, Marvell International Ltd. and its affiliates<BR>
> +#
> +# This program and the accompanying materials are licensed and made available
> +# under the terms and conditions of the BSD License which accompanies this
> +# distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> +# IMPLIED.
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x00010019
...001A
/
Leif
> + BASE_NAME = Armada7k8kDescLib
> + FILE_GUID = c64f0048-4ca3-4573-b0a6-c2e9e6457285
> + MODULE_TYPE = BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = ArmadaSoCDescLib
> +
> +[Sources]
> + Armada7k8kSoCDescLib.c
> +
> +[Packages]
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/Marvell/Marvell.dec
> +
> +[LibraryClasses]
> + DebugLib
> + IoLib
> + PcdLib
> +
> +[FixedPcd]
> + gMarvellTokenSpaceGuid.PcdMaxCpCount
> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> new file mode 100644
> index 0000000..22f5c17
> --- /dev/null
> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> @@ -0,0 +1,33 @@
> +/**
> +*
> +* Copyright (C) 2018, Marvell International Ltd. and its affiliates
> +*
> +* This program and the accompanying materials are licensed and made available
> +* under the terms and conditions of the BSD License which accompanies this
> +* distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +#ifndef __ARMADA_SOC_DESC_LIB_H__
> +#define __ARMADA_SOC_DESC_LIB_H__
> +
> +//
> +// UTMI PHY devices SoC description
> +//
> +typedef struct {
> + UINT8 UtmiPhyId;
> + UINTN UtmiBaseAddress;
> + UINTN UtmiConfigAddress;
> + UINTN UsbConfigAddress;
> +} MV_SOC_UTMI_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescUtmiGet (
> + IN OUT MV_SOC_UTMI_DESC **UtmiDesc,
> + IN OUT UINT8 *DescCount
> + );
> +#endif /* __ARMADA_SOC_DESC_LIB_H__ */
> diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
> index be74b4e..2a92eff 100644
> --- a/Silicon/Marvell/Marvell.dec
> +++ b/Silicon/Marvell/Marvell.dec
> @@ -60,6 +60,7 @@
> gMarvellSpiFlashDxeGuid = { 0x49d7fb74, 0x306d, 0x42bd, { 0x94, 0xc8, 0xc0, 0xc5, 0x4b, 0x18, 0x1d, 0xd7 } }
>
> [LibraryClasses]
> + ArmadaSoCDescLib|Include/Library/ArmadaSoCDescLib.h
> SampleAtResetLib|Include/Library/SampleAtResetLib.h
>
> [Protocols]
> @@ -68,6 +69,9 @@
> gMarvellPlatformInitCompleteProtocolGuid = { 0x465b8cf7, 0x016f, 0x4ba6, { 0xbe, 0x6b, 0x28, 0x0e, 0x3a, 0x7d, 0x38, 0x6f } }
>
> [PcdsFixedAtBuild.common]
> +#Board description
> + gMarvellTokenSpaceGuid.PcdMaxCpCount|0x2|UINT8|0x30000072
> +
> #MPP
> gMarvellTokenSpaceGuid.PcdMppChipCount|0|UINT32|0x30000001
>
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 02/25] Marvell/Library: Introduce ArmadaBoardDescLib class
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
2018-06-08 15:33 ` [platforms PATCH 01/25] Marvell/Library: Introduce ArmadaSoCDescLib class Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 15:36 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 03/25] Marvell: Introduce MARVELL_BOARD_DESC_PROTOCOL Marcin Wojtas
` (24 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
This patch adds a new library class that will be helpful
to describe a per-board information, which will be
processed by BoardDesc protocol.
Together with ArmadaSoCDescLib data it will be a flexible
solution allowing to provide complete information to
the drivers, replacing faulty MvHwDescLib.h.
Initially ArmadaBoardDescLib defines per-board UTMI
PHYs information structure.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 27 ++++++++++++++++++++
Silicon/Marvell/Marvell.dec | 1 +
2 files changed, 28 insertions(+)
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
new file mode 100644
index 0000000..2d50067
--- /dev/null
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -0,0 +1,27 @@
+/**
+*
+* Copyright (C) 2018, Marvell International Ltd. and its affiliates
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+#ifndef __ARMADA_BOARD_DESC_LIB_H__
+#define __ARMADA_BOARD_DESC_LIB_H__
+
+#include <Library/ArmadaSoCDescLib.h>
+
+//
+// UTMI PHY devices per-board description
+//
+typedef struct {
+ MV_SOC_UTMI_DESC *SoC;
+ UINT8 UtmiDevCount;
+ UINT8 UtmiPortType;
+} MV_BOARD_UTMI_DESC;
+#endif /* __ARMADA_SOC_DESC_LIB_H__ */
diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
index 2a92eff..db49300 100644
--- a/Silicon/Marvell/Marvell.dec
+++ b/Silicon/Marvell/Marvell.dec
@@ -60,6 +60,7 @@
gMarvellSpiFlashDxeGuid = { 0x49d7fb74, 0x306d, 0x42bd, { 0x94, 0xc8, 0xc0, 0xc5, 0x4b, 0x18, 0x1d, 0xd7 } }
[LibraryClasses]
+ ArmadaBoardDescLib|Include/Library/ArmadaBoardDescLib.h
ArmadaSoCDescLib|Include/Library/ArmadaSoCDescLib.h
SampleAtResetLib|Include/Library/SampleAtResetLib.h
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 02/25] Marvell/Library: Introduce ArmadaBoardDescLib class
2018-06-08 15:34 ` [platforms PATCH 02/25] Marvell/Library: Introduce ArmadaBoardDescLib class Marcin Wojtas
@ 2018-06-12 15:36 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 15:36 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:00PM +0200, Marcin Wojtas wrote:
> This patch adds a new library class that will be helpful
> to describe a per-board information, which will be
> processed by BoardDesc protocol.
>
> Together with ArmadaSoCDescLib data it will be a flexible
> solution allowing to provide complete information to
> the drivers, replacing faulty MvHwDescLib.h.
>
> Initially ArmadaBoardDescLib defines per-board UTMI
> PHYs information structure.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
As Ard said, please drop Reviewed-by:s (but add Author: where useful,
or add internal reviewer on cc so they can review in public, where
possible).
With that
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 27 ++++++++++++++++++++
> Silicon/Marvell/Marvell.dec | 1 +
> 2 files changed, 28 insertions(+)
>
> diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> new file mode 100644
> index 0000000..2d50067
> --- /dev/null
> +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> @@ -0,0 +1,27 @@
> +/**
> +*
> +* Copyright (C) 2018, Marvell International Ltd. and its affiliates
> +*
> +* This program and the accompanying materials are licensed and made available
> +* under the terms and conditions of the BSD License which accompanies this
> +* distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +#ifndef __ARMADA_BOARD_DESC_LIB_H__
> +#define __ARMADA_BOARD_DESC_LIB_H__
> +
> +#include <Library/ArmadaSoCDescLib.h>
> +
> +//
> +// UTMI PHY devices per-board description
> +//
> +typedef struct {
> + MV_SOC_UTMI_DESC *SoC;
> + UINT8 UtmiDevCount;
> + UINT8 UtmiPortType;
> +} MV_BOARD_UTMI_DESC;
> +#endif /* __ARMADA_SOC_DESC_LIB_H__ */
> diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
> index 2a92eff..db49300 100644
> --- a/Silicon/Marvell/Marvell.dec
> +++ b/Silicon/Marvell/Marvell.dec
> @@ -60,6 +60,7 @@
> gMarvellSpiFlashDxeGuid = { 0x49d7fb74, 0x306d, 0x42bd, { 0x94, 0xc8, 0xc0, 0xc5, 0x4b, 0x18, 0x1d, 0xd7 } }
>
> [LibraryClasses]
> + ArmadaBoardDescLib|Include/Library/ArmadaBoardDescLib.h
> ArmadaSoCDescLib|Include/Library/ArmadaSoCDescLib.h
> SampleAtResetLib|Include/Library/SampleAtResetLib.h
>
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 03/25] Marvell: Introduce MARVELL_BOARD_DESC_PROTOCOL
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
2018-06-08 15:33 ` [platforms PATCH 01/25] Marvell/Library: Introduce ArmadaSoCDescLib class Marcin Wojtas
2018-06-08 15:34 ` [platforms PATCH 02/25] Marvell/Library: Introduce ArmadaBoardDescLib class Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-08 15:34 ` [platforms PATCH 04/25] Marvell/Drivers: MvBoardDescDxe: Introduce board description driver Marcin Wojtas
` (23 subsequent siblings)
26 siblings, 0 replies; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
From: jinghua <jinghua@marvell.com>
This patch introduces protocol that exposes generic API to get board
description. It uses ArmadaSoCDescLib library, which is implemented per
SoC family to get the SoC level description for hardware module controller.
Together with the information obtained from ArmadaBoardDescLib
the protocol allows the drivers to get per-board information about
used hardware and settings.
As a first usage a UTMI information obtaining is implemented.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: jinghua <jinghua@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
---
Silicon/Marvell/Include/Protocol/BoardDesc.h | 62 ++++++++++++++++++++
Silicon/Marvell/Marvell.dec | 1 +
2 files changed, 63 insertions(+)
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
new file mode 100644
index 0000000..f8a2902
--- /dev/null
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -0,0 +1,62 @@
+/*******************************************************************************
+Copyright (C) 2018 Marvell International Ltd.
+
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+* Neither the name of Marvell nor the names of its contributors may be
+ used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __MARVELL_BOARD_DESC_PROTOCOL_H__
+#define __MARVELL_BOARD_DESC_PROTOCOL_H__
+
+#include <Library/ArmadaSoCDescLib.h>
+#include <Library/ArmadaBoardDescLib.h>
+
+extern EFI_GUID gMarvellBoardDescProtocolGuid;
+
+typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
+
+typedef
+EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_UTMI_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_UTMI_DESC **UtmiDesc
+ );
+
+typedef
+VOID
+(EFIAPI *MV_BOARD_DESC_FREE) (
+ IN VOID *BoardDesc
+ );
+
+struct _MARVELL_BOARD_DESC_PROTOCOL {
+ MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet;
+ MV_BOARD_DESC_FREE BoardDescFree;
+};
+
+#endif // __MARVELL_BOARD_DESC_PROTOCOL_H__
diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
index db49300..6861cc4 100644
--- a/Silicon/Marvell/Marvell.dec
+++ b/Silicon/Marvell/Marvell.dec
@@ -212,6 +212,7 @@
gMarvellTokenSpaceGuid.PcdSecureRegionSize|0x0|UINT32|0x50000001
[Protocols]
+ gMarvellBoardDescProtocolGuid = { 0xebed8738, 0xd4a6, 0x4001, { 0xa9, 0xc9, 0x52, 0xb0, 0xcb, 0x7d, 0xdb, 0xf9 }}
gMarvellEepromProtocolGuid = { 0x71954bda, 0x60d3, 0x4ef8, { 0x8e, 0x3c, 0x0e, 0x33, 0x9f, 0x3b, 0xc2, 0x2b }}
gMarvellMdioProtocolGuid = { 0x40010b03, 0x5f08, 0x496a, { 0xa2, 0x64, 0x10, 0x5e, 0x72, 0xd3, 0x71, 0xaa }}
gMarvellPhyProtocolGuid = { 0x32f48a43, 0x37e3, 0x4acf, { 0x93, 0xc4, 0x3e, 0x57, 0xa7, 0xb0, 0xfb, 0xdc }}
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* [platforms PATCH 04/25] Marvell/Drivers: MvBoardDescDxe: Introduce board description driver
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (2 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 03/25] Marvell: Introduce MARVELL_BOARD_DESC_PROTOCOL Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 16:00 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 05/25] Marvell/Armada7k8k: Enable board description driver compilation Marcin Wojtas
` (22 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
From: jinghua <jinghua@marvell.com>
This patch introduces a producer of MARVELL_BOARD_DESC_PROTOCOL, which
gets SoC description from ArmadaSoCDescLib, then based on dsc file,
provide only enabled hardware module controllers for the consumers,
which are typically controllers' drivers. Thanks to that
there is a separation between obtaining the platform description and
the drivers. A first example of the board description callback
is information about UTMI controllers and type.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: jinghua <jinghua@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 174 ++++++++++++++++++++
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h | 59 +++++++
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 65 ++++++++
3 files changed, 298 insertions(+)
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
new file mode 100644
index 0000000..c220e58
--- /dev/null
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -0,0 +1,174 @@
+/*******************************************************************************
+Copyright (C) 2018 Marvell International Ltd.
+
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+* Neither the name of Marvell nor the names of its contributors may be
+ used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#include "MvBoardDescDxe.h"
+
+MV_BOARD_DESC *mBoardDescInstance;
+
+STATIC
+EFI_STATUS
+MvBoardDescUtmiGet (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_UTMI_DESC **UtmiDesc
+ )
+{
+ UINT8 *UtmiDeviceTable, *XhciDeviceTable, *UtmiPortType, UtmiCount;
+ UINTN UtmiDeviceTableSize, UtmiIndex, Index;
+ MV_BOARD_UTMI_DESC *BoardDesc;
+ MV_SOC_UTMI_DESC *SoCDesc;
+ EFI_STATUS Status;
+
+ /* Get SoC data about all available UTMI controllers */
+ Status = ArmadaSoCDescUtmiGet (&SoCDesc, &UtmiCount);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ /* Obtain table with enabled Utmi PHY's */
+ UtmiDeviceTable = (UINT8 *)PcdGetPtr (PcdUtmiControllersEnabled);
+ if (UtmiDeviceTable == NULL) {
+ /* No UTMI PHY on platform */
+ return EFI_SUCCESS;
+ }
+
+ /* Make sure XHCI controllers table is present */
+ XhciDeviceTable = (UINT8 *)PcdGetPtr (PcdPciEXhci);
+ if (XhciDeviceTable == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Missing PcdPciEXhci\n", __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ UtmiDeviceTableSize = PcdGetSize (PcdUtmiControllersEnabled);
+
+ /* Check if PCD with UTMI PHYs is correctly defined */
+ if (UtmiDeviceTableSize > UtmiCount ||
+ UtmiDeviceTableSize > PcdGetSize (PcdPciEXhci)) {
+ DEBUG ((DEBUG_ERROR,
+ "%a: Wrong PcdUtmiControllersEnabled format\n",
+ __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ /* Obtain port type table */
+ UtmiPortType = (UINT8 *)PcdGetPtr (PcdUtmiPortType);
+ if (UtmiPortType == NULL ||
+ PcdGetSize (PcdUtmiPortType) != UtmiDeviceTableSize) {
+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdUtmiPortType format\n", __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (UtmiDeviceTableSize * sizeof (MV_BOARD_UTMI_DESC));
+ if (BoardDesc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ UtmiIndex = 0;
+ for (Index = 0; Index < UtmiDeviceTableSize; Index++) {
+ if (!MVHW_DEV_ENABLED (Utmi, Index)) {
+ continue;
+ }
+
+ /* UTMI PHY without enabled XHCI controller is useless */
+ if (!MVHW_DEV_ENABLED (Xhci, Index)) {
+ DEBUG ((DEBUG_ERROR,
+ "%a: Disabled Xhci controller %d\n",
+ Index,
+ __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ BoardDesc[UtmiIndex].SoC = &SoCDesc[Index];
+ BoardDesc[UtmiIndex].UtmiPortType = UtmiPortType[Index];
+ UtmiIndex++;
+ }
+
+ BoardDesc->UtmiDevCount = UtmiIndex;
+
+ *UtmiDesc = BoardDesc;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+VOID
+MvBoardDescFree (
+ IN VOID *BoardDesc
+ )
+{
+ if (BoardDesc != NULL) {
+ FreePool (BoardDesc);
+ }
+}
+
+STATIC
+EFI_STATUS
+MvBoardDescInitProtocol (
+ IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
+ )
+{
+ BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
+ BoardDescProtocol->BoardDescFree = MvBoardDescFree;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+MvBoardDescEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ mBoardDescInstance = AllocateZeroPool (sizeof (MV_BOARD_DESC));
+ if (mBoardDescInstance == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ MvBoardDescInitProtocol (&mBoardDescInstance->BoardDescProtocol);
+
+ mBoardDescInstance->Signature = BOARD_DESC_SIGNATURE;
+
+ Status = gBS->InstallMultipleProtocolInterfaces (&(mBoardDescInstance->Handle),
+ &gMarvellBoardDescProtocolGuid,
+ &(mBoardDescInstance->BoardDescProtocol));
+ if (EFI_ERROR (Status)) {
+ FreePool (mBoardDescInstance);
+ return Status;
+ }
+
+ return EFI_SUCCESS;
+}
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
new file mode 100644
index 0000000..47d9a72
--- /dev/null
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
@@ -0,0 +1,59 @@
+/*******************************************************************************
+Copyright (C) 2018 Marvell International Ltd.
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+* Neither the name of Marvell nor the names of its contributors may be
+ used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __MV_BOARD_DESC_H__
+#define __MV_BOARD_DESC_H__
+
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+
+#include <Protocol/BoardDesc.h>
+
+#include <Uefi/UefiBaseType.h>
+
+#define BOARD_DESC_SIGNATURE SIGNATURE_64 ('B', 'O', 'A', 'R', 'D', 'D', 'S', 'C')
+
+typedef struct {
+ MARVELL_BOARD_DESC_PROTOCOL BoardDescProtocol;
+ UINTN Signature;
+ EFI_HANDLE Handle;
+ EFI_LOCK Lock;
+} MV_BOARD_DESC;
+
+#define MVHW_DEV_ENABLED(type, index) (type ## DeviceTable[index])
+
+#endif // __MV_BOARD_DESC_H__
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
new file mode 100644
index 0000000..9367833
--- /dev/null
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -0,0 +1,65 @@
+#
+# Marvell BSD License Option
+#
+# If you received this File from Marvell, you may opt to use, redistribute
+# and/or modify this File under the following licensing terms.
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.
+#
+# * Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# * Neither the name of Marvell nor the names of its contributors may be
+# used to endorse or promote products derived from this software without
+# specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = BoardDescDxe
+ FILE_GUID = 4ed385f9-5d2c-4774-95c5-d5d9d70b3c37
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = MvBoardDescEntryPoint
+
+[Sources]
+ MvBoardDescDxe.c
+ MvBoardDescDxe.h
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Marvell/Marvell.dec
+
+[LibraryClasses]
+ ArmadaSoCDescLib
+ DebugLib
+ MemoryAllocationLib
+ UefiDriverEntryPoint
+ UefiLib
+
+[Protocols]
+ gMarvellBoardDescProtocolGuid
+
+[Pcd]
+ gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
+ gMarvellTokenSpaceGuid.PcdUtmiPortType
+ gMarvellTokenSpaceGuid.PcdPciEXhci
+
+[Depex]
+ TRUE
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 04/25] Marvell/Drivers: MvBoardDescDxe: Introduce board description driver
2018-06-08 15:34 ` [platforms PATCH 04/25] Marvell/Drivers: MvBoardDescDxe: Introduce board description driver Marcin Wojtas
@ 2018-06-12 16:00 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 16:00 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:02PM +0200, Marcin Wojtas wrote:
> From: jinghua <jinghua@marvell.com>
>
> This patch introduces a producer of MARVELL_BOARD_DESC_PROTOCOL, which
> gets SoC description from ArmadaSoCDescLib, then based on dsc file,
> provide only enabled hardware module controllers for the consumers,
> which are typically controllers' drivers. Thanks to that
> there is a separation between obtaining the platform description and
> the drivers. A first example of the board description callback
> is information about UTMI controllers and type.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: jinghua <jinghua@marvell.com>
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 174 ++++++++++++++++++++
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h | 59 +++++++
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 65 ++++++++
> 3 files changed, 298 insertions(+)
>
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> new file mode 100644
> index 0000000..c220e58
> --- /dev/null
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> @@ -0,0 +1,174 @@
> +/*******************************************************************************
> +Copyright (C) 2018 Marvell International Ltd.
> +
> +Marvell BSD License Option
> +
> +If you received this File from Marvell, you may opt to use, redistribute and/or
> +modify this File under the following licensing terms.
> +Redistribution and use in source and binary forms, with or without modification,
> +are permitted provided that the following conditions are met:
> +
> +* Redistributions of source code must retain the above copyright notice,
> + this list of conditions and the following disclaimer.
> +
> +* Redistributions in binary form must reproduce the above copyright
> + notice, this list of conditions and the following disclaimer in the
> + documentation and/or other materials provided with the distribution.
> +
> +* Neither the name of Marvell nor the names of its contributors may be
> + used to endorse or promote products derived from this software without
> + specific prior written permission.
> +
> +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
> +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
> +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
> +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> +
> +*******************************************************************************/
> +#include "MvBoardDescDxe.h"
> +
> +MV_BOARD_DESC *mBoardDescInstance;
> +
> +STATIC
> +EFI_STATUS
> +MvBoardDescUtmiGet (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_UTMI_DESC **UtmiDesc
> + )
> +{
> + UINT8 *UtmiDeviceTable, *XhciDeviceTable, *UtmiPortType, UtmiCount;
Neither of these pointers sound like they're pointing to
character/byte strings - why are they UINT8*?
(My guess is that these should all be VOID*.)
UtmiCount should preferably be UINTN.
> + UINTN UtmiDeviceTableSize, UtmiIndex, Index;
> + MV_BOARD_UTMI_DESC *BoardDesc;
> + MV_SOC_UTMI_DESC *SoCDesc;
> + EFI_STATUS Status;
> +
> + /* Get SoC data about all available UTMI controllers */
> + Status = ArmadaSoCDescUtmiGet (&SoCDesc, &UtmiCount);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + /* Obtain table with enabled Utmi PHY's */
> + UtmiDeviceTable = (UINT8 *)PcdGetPtr (PcdUtmiControllersEnabled);
Will this (and subsequent casts) be required if the pointers are VOID*?
> + if (UtmiDeviceTable == NULL) {
> + /* No UTMI PHY on platform */
> + return EFI_SUCCESS;
> + }
> +
> + /* Make sure XHCI controllers table is present */
> + XhciDeviceTable = (UINT8 *)PcdGetPtr (PcdPciEXhci);
> + if (XhciDeviceTable == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Missing PcdPciEXhci\n", __FUNCTION__));
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + UtmiDeviceTableSize = PcdGetSize (PcdUtmiControllersEnabled);
> +
> + /* Check if PCD with UTMI PHYs is correctly defined */
> + if (UtmiDeviceTableSize > UtmiCount ||
> + UtmiDeviceTableSize > PcdGetSize (PcdPciEXhci)) {
Please add some parentheses.
> + DEBUG ((DEBUG_ERROR,
> + "%a: Wrong PcdUtmiControllersEnabled format\n",
> + __FUNCTION__));
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + /* Obtain port type table */
> + UtmiPortType = (UINT8 *)PcdGetPtr (PcdUtmiPortType);
> + if (UtmiPortType == NULL ||
> + PcdGetSize (PcdUtmiPortType) != UtmiDeviceTableSize) {
Please add some parentheses.
> + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdUtmiPortType format\n", __FUNCTION__));
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + /* Allocate and fill board description */
> + BoardDesc = AllocateZeroPool (UtmiDeviceTableSize * sizeof (MV_BOARD_UTMI_DESC));
> + if (BoardDesc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + UtmiIndex = 0;
> + for (Index = 0; Index < UtmiDeviceTableSize; Index++) {
> + if (!MVHW_DEV_ENABLED (Utmi, Index)) {
if (UtmiDeviceTable[Index] != MVHW_DEV_ENABLED)
would read a lot better.
> + continue;
> + }
> +
> + /* UTMI PHY without enabled XHCI controller is useless */
> + if (!MVHW_DEV_ENABLED (Xhci, Index)) {
Similarly,
if (XhciDeviceTable[Index] != MVHW_DEV_ENABLED)
> + DEBUG ((DEBUG_ERROR,
> + "%a: Disabled Xhci controller %d\n",
> + Index,
> + __FUNCTION__));
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + BoardDesc[UtmiIndex].SoC = &SoCDesc[Index];
> + BoardDesc[UtmiIndex].UtmiPortType = UtmiPortType[Index];
> + UtmiIndex++;
> + }
> +
> + BoardDesc->UtmiDevCount = UtmiIndex;
> +
> + *UtmiDesc = BoardDesc;
> +
> + return EFI_SUCCESS;
> +}
> +
> +STATIC
> +VOID
> +MvBoardDescFree (
> + IN VOID *BoardDesc
> + )
> +{
> + if (BoardDesc != NULL) {
Do we really want this test?
What it ends up doing is getting rid of an assert if the function is
called with a NULL pointer. And if so, why did we call it?
> + FreePool (BoardDesc);
> + }
> +}
> +
> +STATIC
> +EFI_STATUS
> +MvBoardDescInitProtocol (
> + IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
> + )
> +{
> + BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
> + BoardDescProtocol->BoardDescFree = MvBoardDescFree;
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +EFIAPI
> +MvBoardDescEntryPoint (
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + EFI_STATUS Status;
> +
> + mBoardDescInstance = AllocateZeroPool (sizeof (MV_BOARD_DESC));
> + if (mBoardDescInstance == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + MvBoardDescInitProtocol (&mBoardDescInstance->BoardDescProtocol);
> +
> + mBoardDescInstance->Signature = BOARD_DESC_SIGNATURE;
> +
> + Status = gBS->InstallMultipleProtocolInterfaces (&(mBoardDescInstance->Handle),
> + &gMarvellBoardDescProtocolGuid,
> + &(mBoardDescInstance->BoardDescProtocol));
> + if (EFI_ERROR (Status)) {
> + FreePool (mBoardDescInstance);
> + return Status;
> + }
> +
> + return EFI_SUCCESS;
> +}
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
> new file mode 100644
> index 0000000..47d9a72
> --- /dev/null
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
> @@ -0,0 +1,59 @@
> +/*******************************************************************************
> +Copyright (C) 2018 Marvell International Ltd.
> +Marvell BSD License Option
> +
> +If you received this File from Marvell, you may opt to use, redistribute and/or
> +modify this File under the following licensing terms.
> +Redistribution and use in source and binary forms, with or without modification,
> +are permitted provided that the following conditions are met:
> +
> +* Redistributions of source code must retain the above copyright notice,
> + this list of conditions and the following disclaimer.
> +
> +* Redistributions in binary form must reproduce the above copyright
> + notice, this list of conditions and the following disclaimer in the
> + documentation and/or other materials provided with the distribution.
> +
> +* Neither the name of Marvell nor the names of its contributors may be
> + used to endorse or promote products derived from this software without
> + specific prior written permission.
> +
> +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
> +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
> +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
> +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> +
> +*******************************************************************************/
> +#ifndef __MV_BOARD_DESC_H__
> +#define __MV_BOARD_DESC_H__
> +
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiLib.h>
> +
> +#include <Protocol/BoardDesc.h>
> +
> +#include <Uefi/UefiBaseType.h>
> +
> +#define BOARD_DESC_SIGNATURE SIGNATURE_64 ('B', 'O', 'A', 'R', 'D', 'D', 'S', 'C')
Very generic sig for something that is still very specific.
I'd be happier of the first two letters were 'M' and 'V'.
> +
> +typedef struct {
> + MARVELL_BOARD_DESC_PROTOCOL BoardDescProtocol;
> + UINTN Signature;
> + EFI_HANDLE Handle;
> + EFI_LOCK Lock;
> +} MV_BOARD_DESC;
> +
> +#define MVHW_DEV_ENABLED(type, index) (type ## DeviceTable[index])
This macro obscures what's going on. Please get rid of it as per
earlier comments (added after I got here).
> +
> +#endif // __MV_BOARD_DESC_H__
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> new file mode 100644
> index 0000000..9367833
> --- /dev/null
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> @@ -0,0 +1,65 @@
> +#
> +# Marvell BSD License Option
> +#
> +# If you received this File from Marvell, you may opt to use, redistribute
> +# and/or modify this File under the following licensing terms.
> +# Redistribution and use in source and binary forms, with or without
> +# modification, are permitted provided that the following conditions are met:
> +#
> +# * Redistributions of source code must retain the above copyright notice,
> +# this list of conditions and the following disclaimer.
> +#
> +# * Redistributions in binary form must reproduce the above copyright
> +# notice, this list of conditions and the following disclaimer in the
> +# documentation and/or other materials provided with the distribution.
> +#
> +# * Neither the name of Marvell nor the names of its contributors may be
> +# used to endorse or promote products derived from this software without
> +# specific prior written permission.
> +#
> +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
> +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
> +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
> +# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
> +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
> +# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
> +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> +#
> +
> +[Defines]
> + INF_VERSION = 0x00010019
...001A (just apply throughout before reposting).
> + BASE_NAME = BoardDescDxe
> + FILE_GUID = 4ed385f9-5d2c-4774-95c5-d5d9d70b3c37
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + ENTRY_POINT = MvBoardDescEntryPoint
> +
> +[Sources]
> + MvBoardDescDxe.c
> + MvBoardDescDxe.h
> +
> +[Packages]
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/Marvell/Marvell.dec
> +
> +[LibraryClasses]
> + ArmadaSoCDescLib
> + DebugLib
> + MemoryAllocationLib
> + UefiDriverEntryPoint
> + UefiLib
> +
> +[Protocols]
> + gMarvellBoardDescProtocolGuid
> +
> +[Pcd]
> + gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
> + gMarvellTokenSpaceGuid.PcdUtmiPortType
> + gMarvellTokenSpaceGuid.PcdPciEXhci
PcdP before PcdU.
/
Leif
> +
> +[Depex]
> + TRUE
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 05/25] Marvell/Armada7k8k: Enable board description driver compilation
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (3 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 04/25] Marvell/Drivers: MvBoardDescDxe: Introduce board description driver Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-08 15:34 ` [platforms PATCH 06/25] Marvell/Library: UtmiPhyLib: Switch to use MARVELL_BOARD_DESC protocol Marcin Wojtas
` (21 subsequent siblings)
26 siblings, 0 replies; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
From: jinghua <jinghua@marvell.com>
This patch enables compilation of MvBoardDescDxe driver for
Armada70x0-DB, Armada80x0-DB and Armada80x0McBin.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: jinghua <jinghua@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
---
Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 1 +
Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 2 ++
2 files changed, 3 insertions(+)
diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf
index e5e5443..15c2778 100644
--- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf
+++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf
@@ -106,6 +106,7 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
#
# Platform Initialization
#
+ INF Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
INF Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf
# PI DXE Drivers producing Architectural Protocols (EFI Services)
diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
index 75fa3d4..a9d67a2 100644
--- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
+++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
@@ -32,6 +32,7 @@
#SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
[LibraryClasses.common]
+ ArmadaSoCDescLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
ArmPlatformLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
ComPhyLib|Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
MppLib|Silicon/Marvell/Library/MppLib/MppLib.inf
@@ -449,6 +450,7 @@
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
# Platform Initialization
+ Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf
# Platform drivers
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* [platforms PATCH 06/25] Marvell/Library: UtmiPhyLib: Switch to use MARVELL_BOARD_DESC protocol
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (4 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 05/25] Marvell/Armada7k8k: Enable board description driver compilation Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-08 15:34 ` [platforms PATCH 07/25] Marvell/Library: RealTimeClockLib: Simplify obtaining base address Marcin Wojtas
` (20 subsequent siblings)
26 siblings, 0 replies; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
UTMI driver used to get Armada7k8k UTMI controller description from
hardcoded values stored in the header file MvHwDescLib.h.
As a result it is very hard to support other Armada SoC families
with this driver.
This patch updates the driver to get UTMI controller description from
newly introduced MARVELL_BOARD_DESC protocol, and removes the dependency
on the hardcoded structures. Use the protocol and pass information to
further to the library init routine.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 1 -
Silicon/Marvell/Include/Library/MvHwDescLib.h | 47 --------------
Silicon/Marvell/Include/Library/UtmiPhyLib.h | 2 +
Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c | 65 +++++++-------------
Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h | 5 ++
Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf | 9 ++-
6 files changed, 32 insertions(+), 97 deletions(-)
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
index d38b467..f2c173c 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
@@ -51,7 +51,6 @@
DebugLib
MemoryAllocationLib
MppLib
- UtmiPhyLib
[Sources.common]
Armada7k8kLib.c
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 9ae03d0..e13814a 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -127,19 +127,6 @@ typedef struct {
} MVHW_RTC_DESC;
//
-// UTMI PHY's description template definition
-//
-
-typedef struct {
- UINT8 UtmiDevCount;
- UINT32 UtmiPhyId[MVHW_MAX_XHCI_DEVS];
- UINTN UtmiBaseAddresses[MVHW_MAX_XHCI_DEVS];
- UINTN UtmiConfigAddresses[MVHW_MAX_XHCI_DEVS];
- UINTN UtmiUsbConfigAddresses[MVHW_MAX_XHCI_DEVS];
- UINTN UtmiMuxBitCount[MVHW_MAX_XHCI_DEVS];
-} MVHW_UTMI_DESC;
-
-//
// Platform description of CommonPhy devices
//
#define MVHW_CP0_COMPHY_BASE 0xF2441000
@@ -253,38 +240,4 @@ MVHW_RTC_DESC mA7k8kRtcDescTemplate = {\
{ SIZE_4KB, SIZE_4KB }\
}
-//
-// Platform description of UTMI PHY's
-//
-#define MVHW_CP0_UTMI0_BASE 0xF2580000
-#define MVHW_CP0_UTMI0_CFG_BASE 0xF2440440
-#define MVHW_CP0_UTMI0_USB_CFG_BASE 0xF2440420
-#define MVHW_CP0_UTMI0_ID 0x0
-#define MVHW_CP0_UTMI1_BASE 0xF2581000
-#define MVHW_CP0_UTMI1_CFG_BASE 0xF2440444
-#define MVHW_CP0_UTMI1_USB_CFG_BASE 0xF2440420
-#define MVHW_CP0_UTMI1_ID 0x1
-#define MVHW_CP1_UTMI0_BASE 0xF4580000
-#define MVHW_CP1_UTMI0_CFG_BASE 0xF4440440
-#define MVHW_CP1_UTMI0_USB_CFG_BASE 0xF4440420
-#define MVHW_CP1_UTMI0_ID 0x0
-#define MVHW_CP1_UTMI1_BASE 0xF4581000
-#define MVHW_CP1_UTMI1_CFG_BASE 0xF4440444
-#define MVHW_CP1_UTMI1_USB_CFG_BASE 0xF4440420
-#define MVHW_CP1_UTMI1_ID 0x1
-
-#define DECLARE_A7K8K_UTMI_TEMPLATE \
-STATIC \
-MVHW_UTMI_DESC mA7k8kUtmiDescTemplate = {\
- 4,\
- { MVHW_CP0_UTMI0_ID, MVHW_CP0_UTMI1_ID,\
- MVHW_CP1_UTMI0_ID, MVHW_CP1_UTMI1_ID },\
- { MVHW_CP0_UTMI0_BASE, MVHW_CP0_UTMI1_BASE,\
- MVHW_CP1_UTMI0_BASE, MVHW_CP1_UTMI1_BASE },\
- { MVHW_CP0_UTMI0_CFG_BASE, MVHW_CP0_UTMI1_CFG_BASE,\
- MVHW_CP1_UTMI0_CFG_BASE, MVHW_CP1_UTMI1_CFG_BASE },\
- { MVHW_CP0_UTMI0_USB_CFG_BASE, MVHW_CP0_UTMI1_USB_CFG_BASE,\
- MVHW_CP1_UTMI0_USB_CFG_BASE, MVHW_CP1_UTMI1_USB_CFG_BASE }\
-}
-
#endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Include/Library/UtmiPhyLib.h b/Silicon/Marvell/Include/Library/UtmiPhyLib.h
index 7c62cba..6f4e355 100644
--- a/Silicon/Marvell/Include/Library/UtmiPhyLib.h
+++ b/Silicon/Marvell/Include/Library/UtmiPhyLib.h
@@ -35,6 +35,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#ifndef __UTMIPHYLIB_H__
#define __UTMIPHYLIB_H__
+#include <Library/ArmadaBoardDescLib.h>
+
EFI_STATUS
UtmiPhyInit (
VOID
diff --git a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c
index 2cd9cfa..cef1279 100644
--- a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c
+++ b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c
@@ -33,9 +33,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#include "UtmiPhyLib.h"
-#include <Library/MvHwDescLib.h>
-
-DECLARE_A7K8K_UTMI_TEMPLATE;
typedef struct {
EFI_PHYSICAL_ADDRESS UtmiBaseAddr;
@@ -288,67 +285,47 @@ UtmiPhyInit (
VOID
)
{
+ MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+ MV_BOARD_UTMI_DESC *BoardDesc;
UTMI_PHY_DATA UtmiData;
- UINT8 *UtmiDeviceTable, *XhciDeviceTable, *UtmiPortType, Index;
- MVHW_UTMI_DESC *Desc = &mA7k8kUtmiDescTemplate;
-
- /* Obtain table with enabled Utmi PHY's*/
- UtmiDeviceTable = (UINT8 *)PcdGetPtr (PcdUtmiControllersEnabled);
- if (UtmiDeviceTable == NULL) {
- /* No UTMI PHY on platform */
- return EFI_SUCCESS;
- }
-
- if (PcdGetSize (PcdUtmiControllersEnabled) > MVHW_MAX_XHCI_DEVS) {
- DEBUG ((DEBUG_ERROR, "UTMI: Wrong PcdUtmiControllersEnabled format\n"));
- return EFI_INVALID_PARAMETER;
- }
+ EFI_STATUS Status;
+ UINTN Index;
- /* Make sure XHCI controllers table is present */
- XhciDeviceTable = (UINT8 *)PcdGetPtr (PcdPciEXhci);
- if (XhciDeviceTable == NULL) {
- DEBUG ((DEBUG_ERROR, "UTMI: Missing PcdPciEXhci\n"));
- return EFI_INVALID_PARAMETER;
+ /* Obtain board description */
+ Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+ NULL,
+ (VOID **)&BoardDescProtocol);
+ if (EFI_ERROR (Status)) {
+ return Status;
}
- /* Obtain port type table */
- UtmiPortType = (UINT8 *)PcdGetPtr (PcdUtmiPortType);
- if (UtmiPortType == NULL ||
- PcdGetSize (PcdUtmiPortType) != PcdGetSize (PcdUtmiControllersEnabled)) {
- DEBUG ((DEBUG_ERROR, "UTMI: Wrong PcdUtmiPortType format\n"));
- return EFI_INVALID_PARAMETER;
+ Status = BoardDescProtocol->BoardDescUtmiGet (BoardDescProtocol, &BoardDesc);
+ if (EFI_ERROR (Status)) {
+ return Status;
}
/* Initialize enabled chips */
- for (Index = 0; Index < PcdGetSize (PcdUtmiControllersEnabled); Index++) {
- if (!MVHW_DEV_ENABLED (Utmi, Index)) {
- continue;
- }
-
- /* UTMI PHY without enabled XHCI controller is useless */
- if (!MVHW_DEV_ENABLED (Xhci, Index)) {
- DEBUG ((DEBUG_ERROR, "UTMI: Disabled Xhci controller %d\n", Index));
- return EFI_INVALID_PARAMETER;
- }
-
+ for (Index = 0; Index < BoardDesc->UtmiDevCount; Index++) {
/* Get base address of UTMI phy */
- UtmiData.UtmiBaseAddr = Desc->UtmiBaseAddresses[Index];
+ UtmiData.UtmiBaseAddr = BoardDesc[Index].SoC->UtmiBaseAddress;
/* Get usb config address */
- UtmiData.UsbCfgAddr = Desc->UtmiUsbConfigAddresses[Index];
+ UtmiData.UsbCfgAddr = BoardDesc[Index].SoC->UsbConfigAddress;
/* Get UTMI config address */
- UtmiData.UtmiCfgAddr = Desc->UtmiConfigAddresses[Index];
+ UtmiData.UtmiCfgAddr = BoardDesc[Index].SoC->UtmiConfigAddress;
/* Get UTMI PHY ID */
- UtmiData.PhyId = Desc->UtmiPhyId[Index];
+ UtmiData.PhyId = BoardDesc[Index].SoC->UtmiPhyId;
/* Get the usb port type */
- UtmiData.UtmiPhyPort = UtmiPortType[Index];
+ UtmiData.UtmiPhyPort = BoardDesc[Index].UtmiPortType;
/* Currently only Cp110 is supported */
Cp110UtmiPhyInit (&UtmiData);
}
+ BoardDescProtocol->BoardDescFree (BoardDesc);
+
return EFI_SUCCESS;
}
diff --git a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h
index 0d7d72e..7e56f1a 100644
--- a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h
+++ b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h
@@ -35,6 +35,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#ifndef __UTMIPHY_H__
#define __UTMIPHY_H__
+#include <Uefi.h>
+
#include <Library/ArmLib.h>
#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
@@ -42,6 +44,9 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include <Library/MemoryAllocationLib.h>
#include <Library/IoLib.h>
#include <Library/TimerLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#include <Protocol/BoardDesc.h>
#define UTMI_USB_CFG_DEVICE_EN_OFFSET 0
#define UTMI_USB_CFG_DEVICE_EN_MASK (0x1 << UTMI_USB_CFG_DEVICE_EN_OFFSET)
diff --git a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf
index 0876879..e2381f4 100644
--- a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf
+++ b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf
@@ -51,11 +51,10 @@
IoLib
MemoryAllocationLib
PcdLib
+ UefiBootServicesTableLib
+
+[Protocols]
+ gMarvellBoardDescProtocolGuid ## CONSUMES
[Sources.common]
UtmiPhyLib.c
-
-[Pcd]
- gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
- gMarvellTokenSpaceGuid.PcdUtmiPortType
- gMarvellTokenSpaceGuid.PcdPciEXhci
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* [platforms PATCH 07/25] Marvell/Library: RealTimeClockLib: Simplify obtaining base address
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (5 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 06/25] Marvell/Library: UtmiPhyLib: Switch to use MARVELL_BOARD_DESC protocol Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-08 15:34 ` [platforms PATCH 08/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information Marcin Wojtas
` (19 subsequent siblings)
26 siblings, 0 replies; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
Hitherto mechanism of obtaining RTC base address proved
to be not flexible enough to support more than one SoC
family. Because there can be a single controller in use
anyway, this patch drops utilization of MvHwDescLib
header with hardcoded structure and replace it with
simple UINT64 PCD.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 2 +-
Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c | 29 ++++----------------
Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf | 2 +-
Silicon/Marvell/Include/Library/MvHwDescLib.h | 25 -----------------
Silicon/Marvell/Marvell.dec | 2 +-
5 files changed, 9 insertions(+), 51 deletions(-)
diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
index 46a1ea9..b51b6fb 100644
--- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
+++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
@@ -134,4 +134,4 @@
gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x1, 0x1 }
#RTC
- gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x1 }
+ gMarvellTokenSpaceGuid.PcdRtcBaseAddress|0xF2284000
diff --git a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
index d671b6a..087bd9a 100644
--- a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
@@ -26,7 +26,6 @@
#include <Library/DxeServicesTableLib.h>
#include <Library/TimeBaseLib.h>
#include <Library/IoLib.h>
-#include <Library/MvHwDescLib.h>
#include <Library/RealTimeClockLib.h>
#include <Library/TimerLib.h>
#include <Library/UefiBootServicesTableLib.h>
@@ -34,7 +33,6 @@
#include <Protocol/RealTimeClock.h>
#include "RealTimeClockLib.h"
-DECLARE_A7K8K_RTC_TEMPLATE;
STATIC EFI_EVENT mRtcVirtualAddrChangeEvent;
STATIC UINTN mArmadaRtcBase;
@@ -216,28 +214,13 @@ LibRtcInitialize (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
- MVHW_RTC_DESC *Desc = &mA7k8kRtcDescTemplate;
- UINT8 *RtcDeviceTable, Index;
EFI_HANDLE Handle;
EFI_STATUS Status;
- // Pick RTC device and initialize its data
- RtcDeviceTable = (UINT8 *) PcdGetPtr (PcdRtcEnabled);
- if (RtcDeviceTable == NULL) {
- DEBUG ((DEBUG_ERROR, "RTC: Missing PcdRtcEnabled\n"));
- return EFI_INVALID_PARAMETER;
- }
-
- // Initialize only first of enabled controllers
- for (Index = 0; Index < PcdGetSize (PcdRtcEnabled); Index++) {
- if (MVHW_DEV_ENABLED (Rtc, Index)) {
- DEBUG ((DEBUG_ERROR, "RTC: Initialize controller %d\n", Index));
- mArmadaRtcBase = Desc->RtcBaseAddresses[Index];
- break;
- }
- }
+ // Obtain RTC device base address
+ mArmadaRtcBase = PcdGet64 (PcdRtcBaseAddress);
- // Check if any of the controllers can be initialized
+ // Check if the controller can be initialized
if (mArmadaRtcBase == 0) {
DEBUG ((DEBUG_ERROR, "RTC: None of controllers enabled\n"));
return EFI_INVALID_PARAMETER;
@@ -247,7 +230,7 @@ LibRtcInitialize (
Status = gDS->AddMemorySpace (
EfiGcdMemoryTypeMemoryMappedIo,
mArmadaRtcBase,
- Desc->RtcMemSize[Index],
+ SIZE_4KB,
EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
);
if (EFI_ERROR (Status)) {
@@ -257,7 +240,7 @@ LibRtcInitialize (
Status = gDS->SetMemorySpaceAttributes (
mArmadaRtcBase,
- Desc->RtcMemSize[Index],
+ SIZE_4KB,
EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
);
if (EFI_ERROR (Status)) {
@@ -304,7 +287,7 @@ LibRtcInitialize (
ErrEvent:
gBS->UninstallProtocolInterface (Handle, &gEfiRealTimeClockArchProtocolGuid, NULL);
ErrSetMem:
- gDS->RemoveMemorySpace (mArmadaRtcBase, Desc->RtcMemSize[Index]);
+ gDS->RemoveMemorySpace (mArmadaRtcBase, SIZE_4KB);
return Status;
}
diff --git a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf
index 59c71c4..1ecd444 100644
--- a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf
+++ b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf
@@ -49,7 +49,7 @@
gEfiEventVirtualAddressChangeGuid
[Pcd]
- gMarvellTokenSpaceGuid.PcdRtcEnabled
+ gMarvellTokenSpaceGuid.PcdRtcBaseAddress
[Depex.common.DXE_RUNTIME_DRIVER]
gEfiCpuArchProtocolGuid
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index e13814a..34d03d4 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -116,17 +116,6 @@ typedef struct {
} MVHW_PP2_DESC;
//
-// RealTimeClock devices description template definition
-//
-#define MVHW_MAX_RTC_DEVS 2
-
-typedef struct {
- UINT8 RtcDevCount;
- UINTN RtcBaseAddresses[MVHW_MAX_RTC_DEVS];
- UINTN RtcMemSize[MVHW_MAX_RTC_DEVS];
-} MVHW_RTC_DESC;
-
-//
// Platform description of CommonPhy devices
//
#define MVHW_CP0_COMPHY_BASE 0xF2441000
@@ -226,18 +215,4 @@ MVHW_PP2_DESC mA7k8kPp2DescTemplate = {\
{ MVHW_PP2_CLK_FREQ, MVHW_PP2_CLK_FREQ } \
}
-//
-// Platform description of RealTimeClock devices
-//
-#define MVHW_CP0_RTC0_BASE 0xF2284000
-#define MVHW_CP1_RTC0_BASE 0xF4284000
-
-#define DECLARE_A7K8K_RTC_TEMPLATE \
-STATIC \
-MVHW_RTC_DESC mA7k8kRtcDescTemplate = {\
- 2,\
- { MVHW_CP0_RTC0_BASE, MVHW_CP1_RTC0_BASE },\
- { SIZE_4KB, SIZE_4KB }\
-}
-
#endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
index 6861cc4..4def897 100644
--- a/Silicon/Marvell/Marvell.dec
+++ b/Silicon/Marvell/Marvell.dec
@@ -195,7 +195,7 @@
gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x0 }|VOID*|0x3000035
#RTC
- gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x0 }|VOID*|0x40000052
+ gMarvellTokenSpaceGuid.PcdRtcBaseAddress|0x0|UINT64|0x40000052
#TRNG
gMarvellTokenSpaceGuid.PcdEip76TrngBaseAddress|0x0|UINT64|0x50000053
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* [platforms PATCH 08/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (6 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 07/25] Marvell/Library: RealTimeClockLib: Simplify obtaining base address Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 18:21 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 09/25] Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support Marcin Wojtas
` (18 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
This patch introduces new library callback (ArmadaSoCDescPp2Get ()),
which dynamically allocates and fills MV_SOC_PP2_DESC structure with
the SoC description of PP2 NICs.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 34 ++++++++++++++++++++
Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 15 +++++++++
2 files changed, 49 insertions(+)
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index 0ee943b..36b445e 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -32,6 +32,40 @@
#define MV_SOC_CP_BASE(Cp) (0xF2000000 + (Cp) * 0x2000000)
//
+// Platform description of PP2 NIC
+//
+#define MV_SOC_PP2_BASE(Cp) MV_SOC_CP_BASE ((Cp))
+#define MV_SOC_PP2_CLK_FREQ 333333333
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescPp2Get (
+ IN OUT MV_SOC_PP2_DESC **Pp2Desc,
+ IN OUT UINT8 *DescCount
+ )
+{
+ MV_SOC_PP2_DESC *Desc;
+ UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount);
+ UINT8 CpIndex;
+
+ Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_PP2_DESC));
+ if (Desc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+ Desc[CpIndex].Pp2BaseAddress = MV_SOC_PP2_BASE (CpIndex);
+ Desc[CpIndex].Pp2ClockFrequency = MV_SOC_PP2_CLK_FREQ;
+ }
+
+ *Pp2Desc = Desc;
+ *DescCount = CpCount;
+
+ return EFI_SUCCESS;
+}
+
+//
// Platform description of UTMI PHY's
//
#define MV_SOC_UTMI_PER_CP_COUNT 2
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
index 22f5c17..559642b 100644
--- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -15,6 +15,21 @@
#define __ARMADA_SOC_DESC_LIB_H__
//
+// PP2 NIC devices SoC description
+//
+typedef struct {
+ UINTN Pp2BaseAddress;
+ UINTN Pp2ClockFrequency;
+} MV_SOC_PP2_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescPp2Get (
+ IN OUT MV_SOC_PP2_DESC **Pp2Desc,
+ IN OUT UINT8 *DescCount
+ );
+
+//
// UTMI PHY devices SoC description
//
typedef struct {
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 08/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information
2018-06-08 15:34 ` [platforms PATCH 08/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information Marcin Wojtas
@ 2018-06-12 18:21 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 18:21 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:06PM +0200, Marcin Wojtas wrote:
> This patch introduces new library callback (ArmadaSoCDescPp2Get ()),
> which dynamically allocates and fills MV_SOC_PP2_DESC structure with
> the SoC description of PP2 NICs.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 34 ++++++++++++++++++++
> Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 15 +++++++++
> 2 files changed, 49 insertions(+)
>
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> index 0ee943b..36b445e 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> @@ -32,6 +32,40 @@
> #define MV_SOC_CP_BASE(Cp) (0xF2000000 + (Cp) * 0x2000000)
>
> //
> +// Platform description of PP2 NIC
> +//
> +#define MV_SOC_PP2_BASE(Cp) MV_SOC_CP_BASE ((Cp))
> +#define MV_SOC_PP2_CLK_FREQ 333333333
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescPp2Get (
> + IN OUT MV_SOC_PP2_DESC **Pp2Desc,
> + IN OUT UINT8 *DescCount
> + )
> +{
> + MV_SOC_PP2_DESC *Desc;
> + UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount);
Please use UINTN for counters.
/
Leif
> + UINT8 CpIndex;
> +
> + Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_PP2_DESC));
> + if (Desc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> + Desc[CpIndex].Pp2BaseAddress = MV_SOC_PP2_BASE (CpIndex);
> + Desc[CpIndex].Pp2ClockFrequency = MV_SOC_PP2_CLK_FREQ;
> + }
> +
> + *Pp2Desc = Desc;
> + *DescCount = CpCount;
> +
> + return EFI_SUCCESS;
> +}
> +
> +//
> // Platform description of UTMI PHY's
> //
> #define MV_SOC_UTMI_PER_CP_COUNT 2
> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> index 22f5c17..559642b 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> @@ -15,6 +15,21 @@
> #define __ARMADA_SOC_DESC_LIB_H__
>
> //
> +// PP2 NIC devices SoC description
> +//
> +typedef struct {
> + UINTN Pp2BaseAddress;
> + UINTN Pp2ClockFrequency;
> +} MV_SOC_PP2_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescPp2Get (
> + IN OUT MV_SOC_PP2_DESC **Pp2Desc,
> + IN OUT UINT8 *DescCount
> + );
> +
> +//
> // UTMI PHY devices SoC description
> //
> typedef struct {
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 09/25] Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (7 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 08/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 18:24 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 10/25] Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol Marcin Wojtas
` (17 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
Introduce new callback that can provide information
about PP2 NICs to the Pp2Dxe driver.
Extend ArmadaBoardDescLib with new structure MV_BOARD_PP2_DESC,
for holding board specific data. In further steps it should
be extended and replace PCD port's representation with the
appropriate structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 60 ++++++++++++++++++++
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 +
Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 11 ++++
Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++
4 files changed, 80 insertions(+)
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index c220e58..86bddad 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -37,6 +37,65 @@ MV_BOARD_DESC *mBoardDescInstance;
STATIC
EFI_STATUS
+MvBoardDescPp2Get (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_PP2_DESC **Pp2Desc
+ )
+{
+ UINT8 *Pp2DeviceTable, Pp2Count;
+ UINTN Pp2DeviceTableSize, Pp2Index, Index;
+ MV_BOARD_PP2_DESC *BoardDesc;
+ MV_SOC_PP2_DESC *SoCDesc;
+ EFI_STATUS Status;
+
+ /* Get SoC data about all available PP2 controllers */
+ Status = ArmadaSoCDescPp2Get (&SoCDesc, &Pp2Count);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ /* Obtain table with enabled PP2 NICs */
+ Pp2DeviceTable = (UINT8 *)PcdGetPtr (PcdPp2Controllers);
+ if (Pp2DeviceTable == NULL) {
+ /* No PP2 NIC on platform */
+ return EFI_SUCCESS;
+ }
+
+ Pp2DeviceTableSize = PcdGetSize (PcdPp2Controllers);
+
+ /* Check if PCD with PP2 NICs is correctly defined */
+ if (Pp2DeviceTableSize > Pp2Count) {
+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPp2Controllers format\n", __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (Pp2DeviceTableSize * sizeof (MV_BOARD_PP2_DESC));
+ if (BoardDesc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ Pp2Index = 0;
+ for (Index = 0; Index < Pp2DeviceTableSize; Index++) {
+ if (!MVHW_DEV_ENABLED (Pp2, Index)) {
+ DEBUG ((DEBUG_ERROR, "%a: Skip Pp2 controller %d\n", __FUNCTION__, Index));
+ continue;
+ }
+
+ BoardDesc[Pp2Index].SoC = &SoCDesc[Index];
+ Pp2Index++;
+ }
+
+ BoardDesc->Pp2DevCount = Pp2Index;
+
+ *Pp2Desc = BoardDesc;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
MvBoardDescUtmiGet (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_UTMI_DESC **UtmiDesc
@@ -138,6 +197,7 @@ MvBoardDescInitProtocol (
IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
)
{
+ BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
BoardDescProtocol->BoardDescFree = MvBoardDescFree;
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
index 9367833..c7d5fe2 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -57,6 +57,7 @@
gMarvellBoardDescProtocolGuid
[Pcd]
+ gMarvellTokenSpaceGuid.PcdPp2Controllers
gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
gMarvellTokenSpaceGuid.PcdUtmiPortType
gMarvellTokenSpaceGuid.PcdPciEXhci
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index 2d50067..78cf698 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -17,6 +17,17 @@
#include <Library/ArmadaSoCDescLib.h>
//
+// PP2 NIC devices per-board description
+//
+// TODO - Extend structure with entire
+// ports description instead of PCDs.
+//
+typedef struct {
+ MV_SOC_PP2_DESC *SoC;
+ UINT8 Pp2DevCount;
+} MV_BOARD_PP2_DESC;
+
+//
// UTMI PHY devices per-board description
//
typedef struct {
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index f8a2902..114a0ec 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
typedef
EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_PP2_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_PP2_DESC **Pp2Desc
+ );
+
+typedef
+EFI_STATUS
(EFIAPI *MV_BOARD_DESC_UTMI_GET) (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_UTMI_DESC **UtmiDesc
@@ -55,6 +62,7 @@ VOID
);
struct _MARVELL_BOARD_DESC_PROTOCOL {
+ MV_BOARD_DESC_PP2_GET BoardDescPp2Get;
MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet;
MV_BOARD_DESC_FREE BoardDescFree;
};
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 09/25] Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support
2018-06-08 15:34 ` [platforms PATCH 09/25] Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support Marcin Wojtas
@ 2018-06-12 18:24 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 18:24 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:07PM +0200, Marcin Wojtas wrote:
> Introduce new callback that can provide information
> about PP2 NICs to the Pp2Dxe driver.
>
> Extend ArmadaBoardDescLib with new structure MV_BOARD_PP2_DESC,
> for holding board specific data. In further steps it should
> be extended and replace PCD port's representation with the
> appropriate structures.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 60 ++++++++++++++++++++
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 +
> Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 11 ++++
> Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++
> 4 files changed, 80 insertions(+)
>
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> index c220e58..86bddad 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> @@ -37,6 +37,65 @@ MV_BOARD_DESC *mBoardDescInstance;
>
> STATIC
> EFI_STATUS
> +MvBoardDescPp2Get (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_PP2_DESC **Pp2Desc
> + )
> +{
> + UINT8 *Pp2DeviceTable, Pp2Count;
Please use UINTN for counter.
> + UINTN Pp2DeviceTableSize, Pp2Index, Index;
> + MV_BOARD_PP2_DESC *BoardDesc;
> + MV_SOC_PP2_DESC *SoCDesc;
> + EFI_STATUS Status;
> +
> + /* Get SoC data about all available PP2 controllers */
> + Status = ArmadaSoCDescPp2Get (&SoCDesc, &Pp2Count);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + /* Obtain table with enabled PP2 NICs */
> + Pp2DeviceTable = (UINT8 *)PcdGetPtr (PcdPp2Controllers);
> + if (Pp2DeviceTable == NULL) {
> + /* No PP2 NIC on platform */
> + return EFI_SUCCESS;
> + }
> +
> + Pp2DeviceTableSize = PcdGetSize (PcdPp2Controllers);
> +
> + /* Check if PCD with PP2 NICs is correctly defined */
> + if (Pp2DeviceTableSize > Pp2Count) {
> + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPp2Controllers format\n", __FUNCTION__));
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + /* Allocate and fill board description */
> + BoardDesc = AllocateZeroPool (Pp2DeviceTableSize * sizeof (MV_BOARD_PP2_DESC));
> + if (BoardDesc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + Pp2Index = 0;
> + for (Index = 0; Index < Pp2DeviceTableSize; Index++) {
> + if (!MVHW_DEV_ENABLED (Pp2, Index)) {
if (Pp2DeviceTable[Index] != MVHW_DEV_ENABLED) {
> + DEBUG ((DEBUG_ERROR, "%a: Skip Pp2 controller %d\n", __FUNCTION__, Index));
> + continue;
> + }
> +
> + BoardDesc[Pp2Index].SoC = &SoCDesc[Index];
> + Pp2Index++;
> + }
> +
> + BoardDesc->Pp2DevCount = Pp2Index;
> +
> + *Pp2Desc = BoardDesc;
> +
> + return EFI_SUCCESS;
> +}
> +
> +STATIC
> +EFI_STATUS
> MvBoardDescUtmiGet (
> IN MARVELL_BOARD_DESC_PROTOCOL *This,
> IN OUT MV_BOARD_UTMI_DESC **UtmiDesc
> @@ -138,6 +197,7 @@ MvBoardDescInitProtocol (
> IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
> )
> {
> + BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
> BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
> BoardDescProtocol->BoardDescFree = MvBoardDescFree;
>
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> index 9367833..c7d5fe2 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> @@ -57,6 +57,7 @@
> gMarvellBoardDescProtocolGuid
>
> [Pcd]
> + gMarvellTokenSpaceGuid.PcdPp2Controllers
> gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
> gMarvellTokenSpaceGuid.PcdUtmiPortType
> gMarvellTokenSpaceGuid.PcdPciEXhci
> diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> index 2d50067..78cf698 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> @@ -17,6 +17,17 @@
> #include <Library/ArmadaSoCDescLib.h>
>
> //
> +// PP2 NIC devices per-board description
> +//
> +// TODO - Extend structure with entire
> +// ports description instead of PCDs.
Drop the TODO.
/
Leif
> +//
> +typedef struct {
> + MV_SOC_PP2_DESC *SoC;
> + UINT8 Pp2DevCount;
> +} MV_BOARD_PP2_DESC;
> +
> +//
> // UTMI PHY devices per-board description
> //
> typedef struct {
> diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> index f8a2902..114a0ec 100644
> --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
> +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> @@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
>
> typedef
> EFI_STATUS
> +(EFIAPI *MV_BOARD_DESC_PP2_GET) (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_PP2_DESC **Pp2Desc
> + );
> +
> +typedef
> +EFI_STATUS
> (EFIAPI *MV_BOARD_DESC_UTMI_GET) (
> IN MARVELL_BOARD_DESC_PROTOCOL *This,
> IN OUT MV_BOARD_UTMI_DESC **UtmiDesc
> @@ -55,6 +62,7 @@ VOID
> );
>
> struct _MARVELL_BOARD_DESC_PROTOCOL {
> + MV_BOARD_DESC_PP2_GET BoardDescPp2Get;
> MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet;
> MV_BOARD_DESC_FREE BoardDescFree;
> };
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 10/25] Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (8 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 09/25] Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 20:25 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 11/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI Marcin Wojtas
` (16 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
Pp2Dxe driver used to get Armada7k8k PP2 controller description from
hardcoded values stored in the header file MvHwDescLib.h.
As a result it is very hard to support other Armada SoC families
with this driver.
This patch updates the driver to get PP2 controller description from
newly introduced MARVELL_BOARD_DESC protocol, and removes the dependency
on the hardcoded structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 43 ++++++++------------
Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 2 +-
Silicon/Marvell/Include/Library/MvHwDescLib.h | 26 ------------
3 files changed, 19 insertions(+), 52 deletions(-)
diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
index 3ed10f6..4ddce22 100644
--- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
+++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
@@ -32,6 +32,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
+#include <Protocol/BoardDesc.h>
#include <Protocol/DevicePath.h>
#include <Protocol/DriverBinding.h>
#include <Protocol/SimpleNetwork.h>
@@ -42,7 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>
-#include <Library/MvHwDescLib.h>
#include <Library/NetLib.h>
#include <Library/PcdLib.h>
#include <Library/UefiBootServicesTableLib.h>
@@ -54,8 +54,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define ReturnUnlock(tpl, status) do { gBS->RestoreTPL (tpl); return (status); } while(0)
-DECLARE_A7K8K_PP2_TEMPLATE;
-
STATIC PP2_DEVICE_PATH Pp2DevicePathTemplate = {
{
{
@@ -1343,35 +1341,28 @@ Pp2DxeInitialise (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
- MVHW_PP2_DESC *Desc = &mA7k8kPp2DescTemplate;
- UINT8 *Pp2DeviceTable, Index;
+ MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+ MV_BOARD_PP2_DESC *Pp2BoardDesc;
MVPP2_SHARED *Mvpp2Shared;
EFI_STATUS Status;
+ UINT8 Index;
/* Obtain table with enabled Pp2 devices */
- Pp2DeviceTable = (UINT8 *)PcdGetPtr (PcdPp2Controllers);
- if (Pp2DeviceTable == NULL) {
- DEBUG ((DEBUG_ERROR, "Missing PcdPp2Controllers\n"));
- return EFI_INVALID_PARAMETER;
- }
-
- if (PcdGetSize (PcdPp2Controllers) > MVHW_MAX_PP2_DEVS) {
- DEBUG ((DEBUG_ERROR, "Wrong PcdPp2Controllers format\n"));
- return EFI_INVALID_PARAMETER;
+ Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+ NULL,
+ (VOID **)&BoardDescProtocol);
+ if (EFI_ERROR (Status)) {
+ return Status;
}
- /* Check amount of declared ports */
- if (PcdGetSize (PcdPp2Port2Controller) > Desc->Pp2DevCount * MVPP2_MAX_PORT) {
- DEBUG ((DEBUG_ERROR, "Pp2Dxe: Wrong too many ports declared\n"));
- return EFI_INVALID_PARAMETER;
+ Status = BoardDescProtocol->BoardDescPp2Get (BoardDescProtocol,
+ &Pp2BoardDesc);
+ if (EFI_ERROR (Status)) {
+ return Status;
}
/* Initialize enabled chips */
- for (Index = 0; Index < PcdGetSize (PcdPp2Controllers); Index++) {
- if (!MVHW_DEV_ENABLED (Pp2, Index)) {
- DEBUG ((DEBUG_ERROR, "Skip Pp2 controller %d\n", Index));
- continue;
- }
+ for (Index = 0; Index < Pp2BoardDesc->Pp2DevCount; Index++) {
/* Initialize private data */
Mvpp2Shared = AllocateZeroPool (sizeof (MVPP2_SHARED));
@@ -1383,8 +1374,8 @@ Pp2DxeInitialise (
Status = Pp2DxeInitialiseController (
Index,
Mvpp2Shared,
- Desc->Pp2BaseAddresses[Index],
- Desc->Pp2ClockFrequency[Index]
+ Pp2BoardDesc[Index].SoC->Pp2BaseAddress,
+ Pp2BoardDesc[Index].SoC->Pp2ClockFrequency
);
if (EFI_ERROR(Status)) {
FreePool (Mvpp2Shared);
@@ -1393,5 +1384,7 @@ Pp2DxeInitialise (
}
}
+ BoardDescProtocol->BoardDescFree (Pp2BoardDesc);
+
return EFI_SUCCESS;
}
diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
index fcd0611..be536ab 100644
--- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
+++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
@@ -67,11 +67,11 @@
gEfiSimpleNetworkProtocolGuid
gEfiDevicePathProtocolGuid
gEfiCpuArchProtocolGuid
+ gMarvellBoardDescProtocolGuid
gMarvellMdioProtocolGuid
gMarvellPhyProtocolGuid
[Pcd]
- gMarvellTokenSpaceGuid.PcdPp2Controllers
gMarvellTokenSpaceGuid.PcdPp2GopIndexes
gMarvellTokenSpaceGuid.PcdPp2InterfaceAlwaysUp
gMarvellTokenSpaceGuid.PcdPp2InterfaceSpeed
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 34d03d4..5fd514c 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -105,17 +105,6 @@ typedef struct {
} MVHW_NONDISCOVERABLE_DESC;
//
-// PP2 NIC devices description template definition
-//
-#define MVHW_MAX_PP2_DEVS 4
-
-typedef struct {
- UINT8 Pp2DevCount;
- UINTN Pp2BaseAddresses[MVHW_MAX_PP2_DEVS];
- UINTN Pp2ClockFrequency[MVHW_MAX_PP2_DEVS];
-} MVHW_PP2_DESC;
-
-//
// Platform description of CommonPhy devices
//
#define MVHW_CP0_COMPHY_BASE 0xF2441000
@@ -200,19 +189,4 @@ MVHW_NONDISCOVERABLE_DESC mA7k8kNonDiscoverableDescTemplate = {\
{ NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent }\
}
-//
-// Platform description of Pp2 NIC devices
-//
-#define MVHW_CP0_PP2_BASE 0xF2000000
-#define MVHW_CP1_PP2_BASE 0xF4000000
-#define MVHW_PP2_CLK_FREQ 333333333
-
-#define DECLARE_A7K8K_PP2_TEMPLATE \
-STATIC \
-MVHW_PP2_DESC mA7k8kPp2DescTemplate = {\
- 2,\
- { MVHW_CP0_PP2_BASE, MVHW_CP1_PP2_BASE },\
- { MVHW_PP2_CLK_FREQ, MVHW_PP2_CLK_FREQ } \
-}
-
#endif /* __MVHWDESCLIB_H__ */
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 10/25] Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol
2018-06-08 15:34 ` [platforms PATCH 10/25] Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol Marcin Wojtas
@ 2018-06-12 20:25 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 20:25 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:08PM +0200, Marcin Wojtas wrote:
> Pp2Dxe driver used to get Armada7k8k PP2 controller description from
> hardcoded values stored in the header file MvHwDescLib.h.
> As a result it is very hard to support other Armada SoC families
> with this driver.
>
> This patch updates the driver to get PP2 controller description from
> newly introduced MARVELL_BOARD_DESC protocol, and removes the dependency
> on the hardcoded structures.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 43 ++++++++------------
> Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 2 +-
> Silicon/Marvell/Include/Library/MvHwDescLib.h | 26 ------------
> 3 files changed, 19 insertions(+), 52 deletions(-)
>
> diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
> index 3ed10f6..4ddce22 100644
> --- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
> +++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
> @@ -32,6 +32,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>
> *******************************************************************************/
>
> +#include <Protocol/BoardDesc.h>
> #include <Protocol/DevicePath.h>
> #include <Protocol/DriverBinding.h>
> #include <Protocol/SimpleNetwork.h>
> @@ -42,7 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> #include <Library/DebugLib.h>
> #include <Library/IoLib.h>
> #include <Library/MemoryAllocationLib.h>
> -#include <Library/MvHwDescLib.h>
> #include <Library/NetLib.h>
> #include <Library/PcdLib.h>
> #include <Library/UefiBootServicesTableLib.h>
> @@ -54,8 +54,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>
> #define ReturnUnlock(tpl, status) do { gBS->RestoreTPL (tpl); return (status); } while(0)
>
> -DECLARE_A7K8K_PP2_TEMPLATE;
> -
> STATIC PP2_DEVICE_PATH Pp2DevicePathTemplate = {
> {
> {
> @@ -1343,35 +1341,28 @@ Pp2DxeInitialise (
> IN EFI_SYSTEM_TABLE *SystemTable
> )
> {
> - MVHW_PP2_DESC *Desc = &mA7k8kPp2DescTemplate;
> - UINT8 *Pp2DeviceTable, Index;
> + MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
> + MV_BOARD_PP2_DESC *Pp2BoardDesc;
> MVPP2_SHARED *Mvpp2Shared;
> EFI_STATUS Status;
> + UINT8 Index;
UINTN please (if we're already changing things).
/
Leif
>
> /* Obtain table with enabled Pp2 devices */
> - Pp2DeviceTable = (UINT8 *)PcdGetPtr (PcdPp2Controllers);
> - if (Pp2DeviceTable == NULL) {
> - DEBUG ((DEBUG_ERROR, "Missing PcdPp2Controllers\n"));
> - return EFI_INVALID_PARAMETER;
> - }
> -
> - if (PcdGetSize (PcdPp2Controllers) > MVHW_MAX_PP2_DEVS) {
> - DEBUG ((DEBUG_ERROR, "Wrong PcdPp2Controllers format\n"));
> - return EFI_INVALID_PARAMETER;
> + Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
> + NULL,
> + (VOID **)&BoardDescProtocol);
> + if (EFI_ERROR (Status)) {
> + return Status;
> }
>
> - /* Check amount of declared ports */
> - if (PcdGetSize (PcdPp2Port2Controller) > Desc->Pp2DevCount * MVPP2_MAX_PORT) {
> - DEBUG ((DEBUG_ERROR, "Pp2Dxe: Wrong too many ports declared\n"));
> - return EFI_INVALID_PARAMETER;
> + Status = BoardDescProtocol->BoardDescPp2Get (BoardDescProtocol,
> + &Pp2BoardDesc);
> + if (EFI_ERROR (Status)) {
> + return Status;
> }
>
> /* Initialize enabled chips */
> - for (Index = 0; Index < PcdGetSize (PcdPp2Controllers); Index++) {
> - if (!MVHW_DEV_ENABLED (Pp2, Index)) {
> - DEBUG ((DEBUG_ERROR, "Skip Pp2 controller %d\n", Index));
> - continue;
> - }
> + for (Index = 0; Index < Pp2BoardDesc->Pp2DevCount; Index++) {
>
> /* Initialize private data */
> Mvpp2Shared = AllocateZeroPool (sizeof (MVPP2_SHARED));
> @@ -1383,8 +1374,8 @@ Pp2DxeInitialise (
> Status = Pp2DxeInitialiseController (
> Index,
> Mvpp2Shared,
> - Desc->Pp2BaseAddresses[Index],
> - Desc->Pp2ClockFrequency[Index]
> + Pp2BoardDesc[Index].SoC->Pp2BaseAddress,
> + Pp2BoardDesc[Index].SoC->Pp2ClockFrequency
> );
> if (EFI_ERROR(Status)) {
> FreePool (Mvpp2Shared);
> @@ -1393,5 +1384,7 @@ Pp2DxeInitialise (
> }
> }
>
> + BoardDescProtocol->BoardDescFree (Pp2BoardDesc);
> +
> return EFI_SUCCESS;
> }
> diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
> index fcd0611..be536ab 100644
> --- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
> +++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
> @@ -67,11 +67,11 @@
> gEfiSimpleNetworkProtocolGuid
> gEfiDevicePathProtocolGuid
> gEfiCpuArchProtocolGuid
> + gMarvellBoardDescProtocolGuid
> gMarvellMdioProtocolGuid
> gMarvellPhyProtocolGuid
>
> [Pcd]
> - gMarvellTokenSpaceGuid.PcdPp2Controllers
> gMarvellTokenSpaceGuid.PcdPp2GopIndexes
> gMarvellTokenSpaceGuid.PcdPp2InterfaceAlwaysUp
> gMarvellTokenSpaceGuid.PcdPp2InterfaceSpeed
> diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
> index 34d03d4..5fd514c 100644
> --- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
> +++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
> @@ -105,17 +105,6 @@ typedef struct {
> } MVHW_NONDISCOVERABLE_DESC;
>
> //
> -// PP2 NIC devices description template definition
> -//
> -#define MVHW_MAX_PP2_DEVS 4
> -
> -typedef struct {
> - UINT8 Pp2DevCount;
> - UINTN Pp2BaseAddresses[MVHW_MAX_PP2_DEVS];
> - UINTN Pp2ClockFrequency[MVHW_MAX_PP2_DEVS];
> -} MVHW_PP2_DESC;
> -
> -//
> // Platform description of CommonPhy devices
> //
> #define MVHW_CP0_COMPHY_BASE 0xF2441000
> @@ -200,19 +189,4 @@ MVHW_NONDISCOVERABLE_DESC mA7k8kNonDiscoverableDescTemplate = {\
> { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent }\
> }
>
> -//
> -// Platform description of Pp2 NIC devices
> -//
> -#define MVHW_CP0_PP2_BASE 0xF2000000
> -#define MVHW_CP1_PP2_BASE 0xF4000000
> -#define MVHW_PP2_CLK_FREQ 333333333
> -
> -#define DECLARE_A7K8K_PP2_TEMPLATE \
> -STATIC \
> -MVHW_PP2_DESC mA7k8kPp2DescTemplate = {\
> - 2,\
> - { MVHW_CP0_PP2_BASE, MVHW_CP1_PP2_BASE },\
> - { MVHW_PP2_CLK_FREQ, MVHW_PP2_CLK_FREQ } \
> -}
> -
> #endif /* __MVHWDESCLIB_H__ */
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 11/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (9 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 10/25] Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 18:37 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 12/25] Marvell/Drivers: MvBoardDesc: Extend protocol " Marcin Wojtas
` (15 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
This patch introduces new library callbacks for NonDiscoverable devices
i.e. AHCI/XHCI/SDMMC. They dynamically allocate and fill according
structures with the SoC description of the devices.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 114 ++++++++++++++++++++
Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 48 +++++++++
2 files changed, 162 insertions(+)
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index 36b445e..de57b47 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -32,6 +32,120 @@
#define MV_SOC_CP_BASE(Cp) (0xF2000000 + (Cp) * 0x2000000)
//
+// Platform description of NonDiscoverableDevices
+//
+
+//
+// Platform description of AHCI controllers
+//
+#define MV_SOC_AHCI_BASE(Cp) MV_SOC_CP_BASE ((Cp)) + 0x540000
+#define MV_SOC_AHCI_ID(Cp) ((Cp) % 2)
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescAhciGet (
+ IN OUT MV_SOC_AHCI_DESC **AhciDesc,
+ IN OUT UINT8 *DescCount
+ )
+{
+ MV_SOC_AHCI_DESC *Desc;
+ UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount);
+ UINT8 CpIndex;
+
+ Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_AHCI_DESC));
+ if (Desc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+ Desc[CpIndex].AhciId = MV_SOC_AHCI_ID (CpIndex);
+ Desc[CpIndex].AhciBaseAddress = MV_SOC_AHCI_BASE (CpIndex);
+ Desc[CpIndex].AhciMemSize = SIZE_8KB;
+ Desc[CpIndex].AhciDmaType = NonDiscoverableDeviceDmaTypeCoherent;
+ }
+
+ *AhciDesc = Desc;
+ *DescCount = CpCount;
+
+ return EFI_SUCCESS;
+}
+
+//
+// Platform description of SDMMC controllers
+//
+#define MV_SOC_MAX_SDMMC_COUNT 2
+#define MV_SOC_SDMMC_BASE(Index) ((Index) == 0 ? 0xF06E0000 : 0xF2780000)
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescSdMmcGet (
+ IN OUT MV_SOC_SDMMC_DESC **SdMmcDesc,
+ IN OUT UINT8 *DescCount
+ )
+{
+ MV_SOC_SDMMC_DESC *Desc;
+ UINT8 Index;
+
+ Desc = AllocateZeroPool (MV_SOC_MAX_SDMMC_COUNT * sizeof (MV_SOC_SDMMC_DESC));
+ if (Desc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ for (Index = 0; Index < MV_SOC_MAX_SDMMC_COUNT; Index++) {
+ Desc[Index].SdMmcBaseAddress = MV_SOC_SDMMC_BASE (Index);
+ Desc[Index].SdMmcMemSize = SIZE_1KB;
+ Desc[Index].SdMmcDmaType = NonDiscoverableDeviceDmaTypeCoherent;
+ }
+
+ *SdMmcDesc = Desc;
+ *DescCount = MV_SOC_MAX_SDMMC_COUNT;
+
+ return EFI_SUCCESS;
+}
+
+//
+// Platform description of XHCI controllers
+//
+#define MV_SOC_XHCI_PER_CP_COUNT 2
+#define MV_SOC_XHCI_BASE(Xhci) (0x500000 + (Xhci) * 0x10000)
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescXhciGet (
+ IN OUT MV_SOC_XHCI_DESC **XhciDesc,
+ IN OUT UINT8 *DescCount
+ )
+{
+ MV_SOC_XHCI_DESC *Desc;
+ UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount);
+ UINT8 Index, CpIndex, XhciIndex = 0;
+
+ Desc = AllocateZeroPool (CpCount * MV_SOC_XHCI_PER_CP_COUNT *
+ sizeof (MV_SOC_XHCI_DESC));
+ if (Desc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+ for (Index = 0; Index < MV_SOC_XHCI_PER_CP_COUNT; Index++) {
+ Desc[XhciIndex].XhciBaseAddress =
+ MV_SOC_CP_BASE (CpIndex) + MV_SOC_XHCI_BASE (Index);
+ Desc[XhciIndex].XhciMemSize = SIZE_16KB;
+ Desc[XhciIndex].XhciDmaType = NonDiscoverableDeviceDmaTypeCoherent;
+ XhciIndex++;
+ }
+ }
+
+ *XhciDesc = Desc;
+ *DescCount = XhciIndex;
+
+ return EFI_SUCCESS;
+}
+
+//
// Platform description of PP2 NIC
//
#define MV_SOC_PP2_BASE(Cp) MV_SOC_CP_BASE ((Cp))
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
index 559642b..438f838 100644
--- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -14,6 +14,54 @@
#ifndef __ARMADA_SOC_DESC_LIB_H__
#define __ARMADA_SOC_DESC_LIB_H__
+#include <Library/NonDiscoverableDeviceRegistrationLib.h>
+
+//
+// NonDiscoverable devices SoC description
+//
+// AHCI
+typedef struct {
+ UINT8 AhciId;
+ UINTN AhciBaseAddress;
+ UINTN AhciMemSize;
+ NON_DISCOVERABLE_DEVICE_DMA_TYPE AhciDmaType;
+} MV_SOC_AHCI_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescAhciGet (
+ IN OUT MV_SOC_AHCI_DESC **AhciDesc,
+ IN OUT UINT8 *DescCount
+ );
+
+// SDMMC
+typedef struct {
+ UINTN SdMmcBaseAddress;
+ UINTN SdMmcMemSize;
+ NON_DISCOVERABLE_DEVICE_DMA_TYPE SdMmcDmaType;
+} MV_SOC_SDMMC_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescSdMmcGet (
+ IN OUT MV_SOC_SDMMC_DESC **SdMmcDesc,
+ IN OUT UINT8 *DescCount
+ );
+
+// XHCI
+typedef struct {
+ UINTN XhciBaseAddress;
+ UINTN XhciMemSize;
+ NON_DISCOVERABLE_DEVICE_DMA_TYPE XhciDmaType;
+} MV_SOC_XHCI_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescXhciGet (
+ IN OUT MV_SOC_XHCI_DESC **XhciDesc,
+ IN OUT UINT8 *DescCount
+ );
+
//
// PP2 NIC devices SoC description
//
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 11/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI
2018-06-08 15:34 ` [platforms PATCH 11/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI Marcin Wojtas
@ 2018-06-12 18:37 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 18:37 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:09PM +0200, Marcin Wojtas wrote:
> This patch introduces new library callbacks for NonDiscoverable devices
> i.e. AHCI/XHCI/SDMMC. They dynamically allocate and fill according
> structures with the SoC description of the devices.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 114 ++++++++++++++++++++
> Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 48 +++++++++
> 2 files changed, 162 insertions(+)
>
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> index 36b445e..de57b47 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> @@ -32,6 +32,120 @@
> #define MV_SOC_CP_BASE(Cp) (0xF2000000 + (Cp) * 0x2000000)
>
> //
> +// Platform description of NonDiscoverableDevices
> +//
> +
> +//
> +// Platform description of AHCI controllers
> +//
> +#define MV_SOC_AHCI_BASE(Cp) MV_SOC_CP_BASE ((Cp)) + 0x540000
> +#define MV_SOC_AHCI_ID(Cp) ((Cp) % 2)
I know I didn't comment on this before, but can you please move all of
these #defines (at least the added ones) into a .h file?
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescAhciGet (
> + IN OUT MV_SOC_AHCI_DESC **AhciDesc,
> + IN OUT UINT8 *DescCount
> + )
> +{
> + MV_SOC_AHCI_DESC *Desc;
> + UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount);
> + UINT8 CpIndex;
UINTN for Count and Index please.
> +
> + Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_AHCI_DESC));
> + if (Desc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> + Desc[CpIndex].AhciId = MV_SOC_AHCI_ID (CpIndex);
> + Desc[CpIndex].AhciBaseAddress = MV_SOC_AHCI_BASE (CpIndex);
> + Desc[CpIndex].AhciMemSize = SIZE_8KB;
> + Desc[CpIndex].AhciDmaType = NonDiscoverableDeviceDmaTypeCoherent;
> + }
> +
> + *AhciDesc = Desc;
> + *DescCount = CpCount;
> +
> + return EFI_SUCCESS;
> +}
> +
> +//
> +// Platform description of SDMMC controllers
> +//
> +#define MV_SOC_MAX_SDMMC_COUNT 2
> +#define MV_SOC_SDMMC_BASE(Index) ((Index) == 0 ? 0xF06E0000 : 0xF2780000)
Separate .h please.
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescSdMmcGet (
> + IN OUT MV_SOC_SDMMC_DESC **SdMmcDesc,
> + IN OUT UINT8 *DescCount
> + )
> +{
> + MV_SOC_SDMMC_DESC *Desc;
> + UINT8 Index;
UINTN Index.
> +
> + Desc = AllocateZeroPool (MV_SOC_MAX_SDMMC_COUNT * sizeof (MV_SOC_SDMMC_DESC));
> + if (Desc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + for (Index = 0; Index < MV_SOC_MAX_SDMMC_COUNT; Index++) {
> + Desc[Index].SdMmcBaseAddress = MV_SOC_SDMMC_BASE (Index);
> + Desc[Index].SdMmcMemSize = SIZE_1KB;
> + Desc[Index].SdMmcDmaType = NonDiscoverableDeviceDmaTypeCoherent;
> + }
> +
> + *SdMmcDesc = Desc;
> + *DescCount = MV_SOC_MAX_SDMMC_COUNT;
> +
> + return EFI_SUCCESS;
> +}
> +
> +//
> +// Platform description of XHCI controllers
> +//
> +#define MV_SOC_XHCI_PER_CP_COUNT 2
> +#define MV_SOC_XHCI_BASE(Xhci) (0x500000 + (Xhci) * 0x10000)
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescXhciGet (
> + IN OUT MV_SOC_XHCI_DESC **XhciDesc,
> + IN OUT UINT8 *DescCount
> + )
> +{
> + MV_SOC_XHCI_DESC *Desc;
> + UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount);
> + UINT8 Index, CpIndex, XhciIndex = 0;
UINTN x4.
> +
> + Desc = AllocateZeroPool (CpCount * MV_SOC_XHCI_PER_CP_COUNT *
> + sizeof (MV_SOC_XHCI_DESC));
> + if (Desc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> + for (Index = 0; Index < MV_SOC_XHCI_PER_CP_COUNT; Index++) {
> + Desc[XhciIndex].XhciBaseAddress =
> + MV_SOC_CP_BASE (CpIndex) + MV_SOC_XHCI_BASE (Index);
> + Desc[XhciIndex].XhciMemSize = SIZE_16KB;
> + Desc[XhciIndex].XhciDmaType = NonDiscoverableDeviceDmaTypeCoherent;
> + XhciIndex++;
> + }
> + }
> +
> + *XhciDesc = Desc;
> + *DescCount = XhciIndex;
Can you do the same shuffle I suggested to an earlier patch?
It isn't needed for the line length inside the inner loop as badly
here, but I really don't like the last line above here (it suggests
the number of descriptors isn't known until after loop traversation).
And you could get the allocate statement down to one line as well.
/
Leif
> +
> + return EFI_SUCCESS;
> +}
> +
> +//
> // Platform description of PP2 NIC
> //
> #define MV_SOC_PP2_BASE(Cp) MV_SOC_CP_BASE ((Cp))
> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> index 559642b..438f838 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> @@ -14,6 +14,54 @@
> #ifndef __ARMADA_SOC_DESC_LIB_H__
> #define __ARMADA_SOC_DESC_LIB_H__
>
> +#include <Library/NonDiscoverableDeviceRegistrationLib.h>
> +
> +//
> +// NonDiscoverable devices SoC description
> +//
> +// AHCI
> +typedef struct {
> + UINT8 AhciId;
> + UINTN AhciBaseAddress;
> + UINTN AhciMemSize;
> + NON_DISCOVERABLE_DEVICE_DMA_TYPE AhciDmaType;
> +} MV_SOC_AHCI_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescAhciGet (
> + IN OUT MV_SOC_AHCI_DESC **AhciDesc,
> + IN OUT UINT8 *DescCount
> + );
> +
> +// SDMMC
> +typedef struct {
> + UINTN SdMmcBaseAddress;
> + UINTN SdMmcMemSize;
> + NON_DISCOVERABLE_DEVICE_DMA_TYPE SdMmcDmaType;
> +} MV_SOC_SDMMC_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescSdMmcGet (
> + IN OUT MV_SOC_SDMMC_DESC **SdMmcDesc,
> + IN OUT UINT8 *DescCount
> + );
> +
> +// XHCI
> +typedef struct {
> + UINTN XhciBaseAddress;
> + UINTN XhciMemSize;
> + NON_DISCOVERABLE_DEVICE_DMA_TYPE XhciDmaType;
> +} MV_SOC_XHCI_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescXhciGet (
> + IN OUT MV_SOC_XHCI_DESC **XhciDesc,
> + IN OUT UINT8 *DescCount
> + );
> +
> //
> // PP2 NIC devices SoC description
> //
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 12/25] Marvell/Drivers: MvBoardDesc: Extend protocol with AHCI/SDMMC/XHCI
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (10 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 11/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 20:39 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 13/25] Marvell/Drivers: NonDiscoverable: Switch to use MARVELL_BOARD_DESC Marcin Wojtas
` (14 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
Introduce new callback that can provide information
about NonDiscoverableDevices to the relevant drivers and libraries.
Extend ArmadaBoardDescLib with new structures (MV_BOARD_AHCI_DESC/
MV_BOARD_SDMMC_DESC/MV_BOARD_XHCI_DESC) for holding board specific
data.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 180 ++++++++++++++++++++
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 2 +
Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 31 ++++
Silicon/Marvell/Include/Protocol/BoardDesc.h | 24 +++
4 files changed, 237 insertions(+)
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index 86bddad..44d159e 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -37,6 +37,183 @@ MV_BOARD_DESC *mBoardDescInstance;
STATIC
EFI_STATUS
+MvBoardDescAhciGet (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_AHCI_DESC **AhciDesc
+ )
+{
+ UINT8 *AhciDeviceTable, AhciCount;
+ UINTN AhciDeviceTableSize, AhciIndex, Index;
+ MV_BOARD_AHCI_DESC *BoardDesc;
+ MV_SOC_AHCI_DESC *SoCDesc;
+ EFI_STATUS Status;
+
+ /* Get SoC data about all available AHCI controllers */
+ Status = ArmadaSoCDescAhciGet (&SoCDesc, &AhciCount);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ /* Obtain table with enabled AHCI controllers */
+ AhciDeviceTable = (UINT8 *)PcdGetPtr (PcdPciEAhci);
+ if (AhciDeviceTable == NULL) {
+ /* No AHCI on platform */
+ return EFI_SUCCESS;
+ }
+
+ AhciDeviceTableSize = PcdGetSize (PcdPciEAhci);
+
+ /* Check if PCD with AHCI controllers is correctly defined */
+ if (AhciDeviceTableSize > AhciCount) {
+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEAhci format\n", __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (AhciDeviceTableSize * sizeof (MV_BOARD_AHCI_DESC));
+ if (BoardDesc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ AhciIndex = 0;
+ for (Index = 0; Index < AhciDeviceTableSize; Index++) {
+ if (!MVHW_DEV_ENABLED (Ahci, Index)) {
+ DEBUG ((DEBUG_INFO, "%a: Skip Ahci controller %d\n", __FUNCTION__, Index));
+ continue;
+ }
+
+ BoardDesc[AhciIndex].SoC = &SoCDesc[Index];
+ AhciIndex++;
+ }
+
+ BoardDesc->AhciDevCount = AhciIndex;
+
+ *AhciDesc = BoardDesc;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+MvBoardDescSdMmcGet (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
+ )
+{
+ UINT8 *SdMmcDeviceTable, SdMmcCount;
+ UINTN SdMmcDeviceTableSize, SdMmcIndex, Index;
+ MV_BOARD_SDMMC_DESC *BoardDesc;
+ MV_SOC_SDMMC_DESC *SoCDesc;
+ EFI_STATUS Status;
+
+ /* Get SoC data about all available SDMMC controllers */
+ Status = ArmadaSoCDescSdMmcGet (&SoCDesc, &SdMmcCount);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ /* Obtain table with enabled SDMMC controllers */
+ SdMmcDeviceTable = (UINT8 *)PcdGetPtr (PcdPciESdhci);
+ if (SdMmcDeviceTable == NULL) {
+ /* No SDMMC on platform */
+ return EFI_SUCCESS;
+ }
+
+ SdMmcDeviceTableSize = PcdGetSize (PcdPciESdhci);
+
+ /* Check if PCD with SDMMC controllers is correctly defined */
+ if (SdMmcDeviceTableSize > SdMmcCount) {
+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciESdhci format\n", __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (SdMmcDeviceTableSize * sizeof (MV_BOARD_SDMMC_DESC));
+ if (BoardDesc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ SdMmcIndex = 0;
+ for (Index = 0; Index < SdMmcDeviceTableSize; Index++) {
+ if (!MVHW_DEV_ENABLED (SdMmc, Index)) {
+ DEBUG ((DEBUG_INFO, "%a: Skip SdMmc controller %d\n", __FUNCTION__, Index));
+ continue;
+ }
+
+ BoardDesc[SdMmcIndex].SoC = &SoCDesc[Index];
+ SdMmcIndex++;
+ }
+
+ BoardDesc->SdMmcDevCount = SdMmcIndex;
+
+ *SdMmcDesc = BoardDesc;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+MvBoardDescXhciGet (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_XHCI_DESC **XhciDesc
+ )
+{
+ UINT8 *XhciDeviceTable, XhciCount;
+ UINTN XhciDeviceTableSize, XhciIndex, Index;
+ MV_BOARD_XHCI_DESC *BoardDesc;
+ MV_SOC_XHCI_DESC *SoCDesc;
+ EFI_STATUS Status;
+
+ /* Get SoC data about all available XHCI controllers */
+ Status = ArmadaSoCDescXhciGet (&SoCDesc, &XhciCount);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ /* Obtain table with enabled XHCI controllers */
+ XhciDeviceTable = (UINT8 *)PcdGetPtr (PcdPciEXhci);
+ if (XhciDeviceTable == NULL) {
+ /* No XHCI on platform */
+ return EFI_SUCCESS;
+ }
+
+ XhciDeviceTableSize = PcdGetSize (PcdPciEXhci);
+
+ /* Check if PCD with XHCI controllers is correctly defined */
+ if (XhciDeviceTableSize > XhciCount) {
+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEXhci format\n", __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (XhciDeviceTableSize * sizeof (MV_BOARD_XHCI_DESC));
+ if (BoardDesc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ XhciIndex = 0;
+ for (Index = 0; Index < XhciDeviceTableSize; Index++) {
+ if (!MVHW_DEV_ENABLED (Xhci, Index)) {
+ DEBUG ((DEBUG_INFO, "%a: Skip Xhci controller %d\n", __FUNCTION__, Index));
+ continue;
+ }
+
+ BoardDesc[XhciIndex].SoC = &SoCDesc[Index];
+ XhciIndex++;
+ }
+
+ BoardDesc->XhciDevCount = XhciIndex;
+
+ *XhciDesc = BoardDesc;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
MvBoardDescPp2Get (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_PP2_DESC **Pp2Desc
@@ -197,6 +374,9 @@ MvBoardDescInitProtocol (
IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
)
{
+ BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
+ BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
+ BoardDescProtocol->BoardDescXhciGet = MvBoardDescXhciGet;
BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
BoardDescProtocol->BoardDescFree = MvBoardDescFree;
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
index c7d5fe2..fe819ac 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -60,6 +60,8 @@
gMarvellTokenSpaceGuid.PcdPp2Controllers
gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
gMarvellTokenSpaceGuid.PcdUtmiPortType
+ gMarvellTokenSpaceGuid.PcdPciEAhci
+ gMarvellTokenSpaceGuid.PcdPciESdhci
gMarvellTokenSpaceGuid.PcdPciEXhci
[Depex]
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index 78cf698..938d283 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -17,6 +17,37 @@
#include <Library/ArmadaSoCDescLib.h>
//
+// NonDiscoverableDevices per-board description
+//
+
+//
+// AHCI devices per-board description
+//
+typedef struct {
+ MV_SOC_AHCI_DESC *SoC;
+ UINT8 AhciDevCount;
+} MV_BOARD_AHCI_DESC;
+
+//
+// SDMMC devices per-board description
+//
+// TODO - Extend structure with entire
+// ports description instead of PCDs.
+//
+typedef struct {
+ MV_SOC_SDMMC_DESC *SoC;
+ UINT8 SdMmcDevCount;
+} MV_BOARD_SDMMC_DESC;
+
+//
+// XHCI devices per-board description
+//
+typedef struct {
+ MV_SOC_XHCI_DESC *SoC;
+ UINT8 XhciDevCount;
+} MV_BOARD_XHCI_DESC;
+
+//
// PP2 NIC devices per-board description
//
// TODO - Extend structure with entire
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index 114a0ec..a59ade5 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -43,6 +43,27 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
typedef
EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_AHCI_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_AHCI_DESC **AhciDesc
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_SDMMC_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_XHCI_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_XHCI_DESC **XhciDesc
+ );
+
+typedef
+EFI_STATUS
(EFIAPI *MV_BOARD_DESC_PP2_GET) (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_PP2_DESC **Pp2Desc
@@ -62,6 +83,9 @@ VOID
);
struct _MARVELL_BOARD_DESC_PROTOCOL {
+ MV_BOARD_DESC_AHCI_GET BoardDescAhciGet;
+ MV_BOARD_DESC_SDMMC_GET BoardDescSdMmcGet;
+ MV_BOARD_DESC_XHCI_GET BoardDescXhciGet;
MV_BOARD_DESC_PP2_GET BoardDescPp2Get;
MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet;
MV_BOARD_DESC_FREE BoardDescFree;
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 12/25] Marvell/Drivers: MvBoardDesc: Extend protocol with AHCI/SDMMC/XHCI
2018-06-08 15:34 ` [platforms PATCH 12/25] Marvell/Drivers: MvBoardDesc: Extend protocol " Marcin Wojtas
@ 2018-06-12 20:39 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 20:39 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:10PM +0200, Marcin Wojtas wrote:
> Introduce new callback that can provide information
> about NonDiscoverableDevices to the relevant drivers and libraries.
>
> Extend ArmadaBoardDescLib with new structures (MV_BOARD_AHCI_DESC/
> MV_BOARD_SDMMC_DESC/MV_BOARD_XHCI_DESC) for holding board specific
> data.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 180 ++++++++++++++++++++
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 2 +
> Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 31 ++++
> Silicon/Marvell/Include/Protocol/BoardDesc.h | 24 +++
> 4 files changed, 237 insertions(+)
>
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> index 86bddad..44d159e 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> @@ -37,6 +37,183 @@ MV_BOARD_DESC *mBoardDescInstance;
>
> STATIC
> EFI_STATUS
> +MvBoardDescAhciGet (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_AHCI_DESC **AhciDesc
> + )
> +{
> + UINT8 *AhciDeviceTable, AhciCount;
UINTN for count please.
> + UINTN AhciDeviceTableSize, AhciIndex, Index;
> + MV_BOARD_AHCI_DESC *BoardDesc;
> + MV_SOC_AHCI_DESC *SoCDesc;
> + EFI_STATUS Status;
> +
> + /* Get SoC data about all available AHCI controllers */
> + Status = ArmadaSoCDescAhciGet (&SoCDesc, &AhciCount);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + /* Obtain table with enabled AHCI controllers */
> + AhciDeviceTable = (UINT8 *)PcdGetPtr (PcdPciEAhci);
Is that cast needed?
> + if (AhciDeviceTable == NULL) {
> + /* No AHCI on platform */
> + return EFI_SUCCESS;
> + }
> +
> + AhciDeviceTableSize = PcdGetSize (PcdPciEAhci);
> +
> + /* Check if PCD with AHCI controllers is correctly defined */
> + if (AhciDeviceTableSize > AhciCount) {
> + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEAhci format\n", __FUNCTION__));
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + /* Allocate and fill board description */
> + BoardDesc = AllocateZeroPool (AhciDeviceTableSize * sizeof (MV_BOARD_AHCI_DESC));
> + if (BoardDesc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + AhciIndex = 0;
> + for (Index = 0; Index < AhciDeviceTableSize; Index++) {
> + if (!MVHW_DEV_ENABLED (Ahci, Index)) {
if (AhciDeviceTable[Index] != MVHW_DEV_ENABLED) {
> + DEBUG ((DEBUG_INFO, "%a: Skip Ahci controller %d\n", __FUNCTION__, Index));
> + continue;
> + }
> +
> + BoardDesc[AhciIndex].SoC = &SoCDesc[Index];
> + AhciIndex++;
> + }
> +
> + BoardDesc->AhciDevCount = AhciIndex;
> +
> + *AhciDesc = BoardDesc;
> +
> + return EFI_SUCCESS;
> +}
> +
> +STATIC
> +EFI_STATUS
> +MvBoardDescSdMmcGet (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
> + )
> +{
> + UINT8 *SdMmcDeviceTable, SdMmcCount;
UINTN for count please.
> + UINTN SdMmcDeviceTableSize, SdMmcIndex, Index;
> + MV_BOARD_SDMMC_DESC *BoardDesc;
> + MV_SOC_SDMMC_DESC *SoCDesc;
> + EFI_STATUS Status;
> +
> + /* Get SoC data about all available SDMMC controllers */
> + Status = ArmadaSoCDescSdMmcGet (&SoCDesc, &SdMmcCount);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + /* Obtain table with enabled SDMMC controllers */
> + SdMmcDeviceTable = (UINT8 *)PcdGetPtr (PcdPciESdhci);
> + if (SdMmcDeviceTable == NULL) {
> + /* No SDMMC on platform */
> + return EFI_SUCCESS;
> + }
> +
> + SdMmcDeviceTableSize = PcdGetSize (PcdPciESdhci);
> +
> + /* Check if PCD with SDMMC controllers is correctly defined */
> + if (SdMmcDeviceTableSize > SdMmcCount) {
> + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciESdhci format\n", __FUNCTION__));
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + /* Allocate and fill board description */
> + BoardDesc = AllocateZeroPool (SdMmcDeviceTableSize * sizeof (MV_BOARD_SDMMC_DESC));
> + if (BoardDesc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + SdMmcIndex = 0;
> + for (Index = 0; Index < SdMmcDeviceTableSize; Index++) {
> + if (!MVHW_DEV_ENABLED (SdMmc, Index)) {
if (SdMmcDeviceTable[Index] != MVHW_DEV_ENABLED) {
> + DEBUG ((DEBUG_INFO, "%a: Skip SdMmc controller %d\n", __FUNCTION__, Index));
> + continue;
> + }
> +
> + BoardDesc[SdMmcIndex].SoC = &SoCDesc[Index];
> + SdMmcIndex++;
> + }
> +
> + BoardDesc->SdMmcDevCount = SdMmcIndex;
> +
> + *SdMmcDesc = BoardDesc;
> +
> + return EFI_SUCCESS;
> +}
> +
> +STATIC
> +EFI_STATUS
> +MvBoardDescXhciGet (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_XHCI_DESC **XhciDesc
> + )
> +{
> + UINT8 *XhciDeviceTable, XhciCount;
UINTN for count.
> + UINTN XhciDeviceTableSize, XhciIndex, Index;
> + MV_BOARD_XHCI_DESC *BoardDesc;
> + MV_SOC_XHCI_DESC *SoCDesc;
> + EFI_STATUS Status;
> +
> + /* Get SoC data about all available XHCI controllers */
> + Status = ArmadaSoCDescXhciGet (&SoCDesc, &XhciCount);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + /* Obtain table with enabled XHCI controllers */
> + XhciDeviceTable = (UINT8 *)PcdGetPtr (PcdPciEXhci);
> + if (XhciDeviceTable == NULL) {
> + /* No XHCI on platform */
> + return EFI_SUCCESS;
> + }
> +
> + XhciDeviceTableSize = PcdGetSize (PcdPciEXhci);
> +
> + /* Check if PCD with XHCI controllers is correctly defined */
> + if (XhciDeviceTableSize > XhciCount) {
> + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEXhci format\n", __FUNCTION__));
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + /* Allocate and fill board description */
> + BoardDesc = AllocateZeroPool (XhciDeviceTableSize * sizeof (MV_BOARD_XHCI_DESC));
> + if (BoardDesc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + XhciIndex = 0;
> + for (Index = 0; Index < XhciDeviceTableSize; Index++) {
> + if (!MVHW_DEV_ENABLED (Xhci, Index)) {
if (XhciDeviceTable[Index] != MVHW_DEV_ENABLED) {
> + DEBUG ((DEBUG_INFO, "%a: Skip Xhci controller %d\n", __FUNCTION__, Index));
> + continue;
> + }
> +
> + BoardDesc[XhciIndex].SoC = &SoCDesc[Index];
> + XhciIndex++;
> + }
> +
> + BoardDesc->XhciDevCount = XhciIndex;
> +
> + *XhciDesc = BoardDesc;
> +
> + return EFI_SUCCESS;
> +}
> +
> +STATIC
> +EFI_STATUS
> MvBoardDescPp2Get (
> IN MARVELL_BOARD_DESC_PROTOCOL *This,
> IN OUT MV_BOARD_PP2_DESC **Pp2Desc
> @@ -197,6 +374,9 @@ MvBoardDescInitProtocol (
> IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
> )
> {
> + BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
> + BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
> + BoardDescProtocol->BoardDescXhciGet = MvBoardDescXhciGet;
This may be slightly anal, but could you sort the device names alpabetically?
> BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
> BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
> BoardDescProtocol->BoardDescFree = MvBoardDescFree;
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> index c7d5fe2..fe819ac 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> @@ -60,6 +60,8 @@
> gMarvellTokenSpaceGuid.PcdPp2Controllers
> gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
> gMarvellTokenSpaceGuid.PcdUtmiPortType
> + gMarvellTokenSpaceGuid.PcdPciEAhci
> + gMarvellTokenSpaceGuid.PcdPciESdhci
> gMarvellTokenSpaceGuid.PcdPciEXhci
>
> [Depex]
> diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> index 78cf698..938d283 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> @@ -17,6 +17,37 @@
> #include <Library/ArmadaSoCDescLib.h>
>
> //
> +// NonDiscoverableDevices per-board description
> +//
> +
> +//
> +// AHCI devices per-board description
> +//
> +typedef struct {
> + MV_SOC_AHCI_DESC *SoC;
> + UINT8 AhciDevCount;
There is no benefit to using UINT8 here (and several drawbacks).
Please use UINTN throughout.
> +} MV_BOARD_AHCI_DESC;
> +
> +//
> +// SDMMC devices per-board description
> +//
> +// TODO - Extend structure with entire
> +// ports description instead of PCDs.
> +//
> +typedef struct {
> + MV_SOC_SDMMC_DESC *SoC;
> + UINT8 SdMmcDevCount;
> +} MV_BOARD_SDMMC_DESC;
> +
> +//
> +// XHCI devices per-board description
> +//
> +typedef struct {
> + MV_SOC_XHCI_DESC *SoC;
> + UINT8 XhciDevCount;
> +} MV_BOARD_XHCI_DESC;
> +
> +//
> // PP2 NIC devices per-board description
> //
> // TODO - Extend structure with entire
> diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> index 114a0ec..a59ade5 100644
> --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
> +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> @@ -43,6 +43,27 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
>
> typedef
> EFI_STATUS
> +(EFIAPI *MV_BOARD_DESC_AHCI_GET) (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_AHCI_DESC **AhciDesc
> + );
> +
> +typedef
> +EFI_STATUS
> +(EFIAPI *MV_BOARD_DESC_SDMMC_GET) (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
> + );
> +
> +typedef
> +EFI_STATUS
> +(EFIAPI *MV_BOARD_DESC_XHCI_GET) (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_XHCI_DESC **XhciDesc
> + );
> +
> +typedef
> +EFI_STATUS
> (EFIAPI *MV_BOARD_DESC_PP2_GET) (
> IN MARVELL_BOARD_DESC_PROTOCOL *This,
> IN OUT MV_BOARD_PP2_DESC **Pp2Desc
> @@ -62,6 +83,9 @@ VOID
> );
>
> struct _MARVELL_BOARD_DESC_PROTOCOL {
> + MV_BOARD_DESC_AHCI_GET BoardDescAhciGet;
> + MV_BOARD_DESC_SDMMC_GET BoardDescSdMmcGet;
> + MV_BOARD_DESC_XHCI_GET BoardDescXhciGet;
Insert alphabetically?
/
Leif
> MV_BOARD_DESC_PP2_GET BoardDescPp2Get;
> MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet;
> MV_BOARD_DESC_FREE BoardDescFree;
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 13/25] Marvell/Drivers: NonDiscoverable: Switch to use MARVELL_BOARD_DESC
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (11 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 12/25] Marvell/Drivers: MvBoardDesc: Extend protocol " Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-08 15:34 ` [platforms PATCH 14/25] Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC Marcin Wojtas
` (13 subsequent siblings)
26 siblings, 0 replies; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
NonDiscoverableDevices driver used to get Armada7k8k
AHCI/SDMMC/XHCI controller description from hardcoded values
stored in the header file MvHwDescLib.h. As a result it is
very hard to support other Armada SoC families with this driver.
This patch updates the driver to get AHCI/SDMMC/XHCI controller
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c | 100 ++++++++++----------
Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf | 6 +-
2 files changed, 52 insertions(+), 54 deletions(-)
diff --git a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c
index 6ff90a5..c5cf904 100644
--- a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c
+++ b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c
@@ -35,50 +35,33 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include <PiDxe.h>
#include <Library/DebugLib.h>
-#include <Library/MvHwDescLib.h>
#include <Library/NonDiscoverableDeviceRegistrationLib.h>
#include <Library/UefiBootServicesTableLib.h>
+#include <Protocol/BoardDesc.h>
#include <Protocol/EmbeddedExternalDevice.h>
-DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE;
-
-//
-// Tables with used devices
-//
-STATIC UINT8 * CONST XhciDeviceTable = FixedPcdGetPtr (PcdPciEXhci);
-STATIC UINT8 * CONST AhciDeviceTable = FixedPcdGetPtr (PcdPciEAhci);
-STATIC UINT8 * CONST SdhciDeviceTable = FixedPcdGetPtr (PcdPciESdhci);
-
//
// NonDiscoverable devices registration
//
STATIC
EFI_STATUS
NonDiscoverableInitXhci (
+ IN MV_BOARD_XHCI_DESC *Desc
)
{
- MVHW_NONDISCOVERABLE_DESC *Desc = &mA7k8kNonDiscoverableDescTemplate;
EFI_STATUS Status;
UINT8 i;
- if (PcdGetSize (PcdPciEXhci) < Desc->XhciDevCount) {
- DEBUG((DEBUG_ERROR, "NonDiscoverable: Wrong PcdPciEXhci format\n"));
- return EFI_INVALID_PARAMETER;
- }
-
for (i = 0; i < Desc->XhciDevCount; i++) {
- if (!MVHW_DEV_ENABLED (Xhci, i)) {
- continue;
- }
-
Status = RegisterNonDiscoverableMmioDevice (
NonDiscoverableDeviceTypeXhci,
- Desc->XhciDmaType[i],
+ Desc[i].SoC->XhciDmaType,
NULL,
NULL,
1,
- Desc->XhciBaseAddresses[i], Desc->XhciMemSize[i]
+ Desc[i].SoC->XhciBaseAddress,
+ Desc[i].SoC->XhciMemSize
);
if (EFI_ERROR(Status)) {
@@ -93,29 +76,21 @@ NonDiscoverableInitXhci (
STATIC
EFI_STATUS
NonDiscoverableInitAhci (
+ IN MV_BOARD_AHCI_DESC *Desc
)
{
- MVHW_NONDISCOVERABLE_DESC *Desc = &mA7k8kNonDiscoverableDescTemplate;
EFI_STATUS Status;
UINT8 i;
- if (PcdGetSize (PcdPciEAhci) < Desc->AhciDevCount) {
- DEBUG((DEBUG_ERROR, "NonDiscoverable: Wrong PcdPciEAhci format\n"));
- return EFI_INVALID_PARAMETER;
- }
-
for (i = 0; i < Desc->AhciDevCount; i++) {
- if (!MVHW_DEV_ENABLED (Ahci, i)) {
- continue;
- }
-
Status = RegisterNonDiscoverableMmioDevice (
NonDiscoverableDeviceTypeAhci,
- Desc->AhciDmaType[i],
+ Desc[i].SoC->AhciDmaType,
NULL,
NULL,
1,
- Desc->AhciBaseAddresses[i], Desc->AhciMemSize[i]
+ Desc[i].SoC->AhciBaseAddress,
+ Desc[i].SoC->AhciMemSize
);
if (EFI_ERROR(Status)) {
@@ -130,29 +105,21 @@ NonDiscoverableInitAhci (
STATIC
EFI_STATUS
NonDiscoverableInitSdhci (
+ IN MV_BOARD_SDMMC_DESC *Desc
)
{
- MVHW_NONDISCOVERABLE_DESC *Desc = &mA7k8kNonDiscoverableDescTemplate;
EFI_STATUS Status;
UINT8 i;
- if (PcdGetSize (PcdPciESdhci) < Desc->SdhciDevCount) {
- DEBUG((DEBUG_ERROR, "NonDiscoverable: Wrong PcdPciESdhci format\n"));
- return EFI_INVALID_PARAMETER;
- }
-
- for (i = 0; i < Desc->SdhciDevCount; i++) {
- if (!MVHW_DEV_ENABLED (Sdhci, i)) {
- continue;
- }
-
+ for (i = 0; i < Desc->SdMmcDevCount; i++) {
Status = RegisterNonDiscoverableMmioDevice (
NonDiscoverableDeviceTypeSdhci,
- Desc->SdhciDmaType[i],
+ Desc[i].SoC->SdMmcDmaType,
NULL,
NULL,
1,
- Desc->SdhciBaseAddresses[i], Desc->SdhciMemSize[i]
+ Desc[i].SoC->SdMmcBaseAddress,
+ Desc[i].SoC->SdMmcMemSize
);
if (EFI_ERROR(Status)) {
@@ -174,22 +141,55 @@ NonDiscoverableEntryPoint (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
+ MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+ MV_BOARD_SDMMC_DESC *SdMmcBoardDesc;
+ MV_BOARD_AHCI_DESC *AhciBoardDesc;
+ MV_BOARD_XHCI_DESC *XhciBoardDesc;
EFI_STATUS Status;
- Status = NonDiscoverableInitXhci();
+ /* Obtain list of available controllers */
+ Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+ NULL,
+ (VOID **)&BoardDescProtocol);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ /* Xhci */
+ Status = BoardDescProtocol->BoardDescXhciGet (BoardDescProtocol,
+ &XhciBoardDesc);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ Status = NonDiscoverableInitXhci (XhciBoardDesc);
if (EFI_ERROR(Status)) {
return Status;
}
+ BoardDescProtocol->BoardDescFree (XhciBoardDesc);
- Status = NonDiscoverableInitAhci();
+ /* Ahci */
+ Status = BoardDescProtocol->BoardDescAhciGet (BoardDescProtocol,
+ &AhciBoardDesc);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ Status = NonDiscoverableInitAhci (AhciBoardDesc);
if (EFI_ERROR(Status)) {
return Status;
}
+ BoardDescProtocol->BoardDescFree (AhciBoardDesc);
- Status = NonDiscoverableInitSdhci();
+ /* SdMmc */
+ Status = BoardDescProtocol->BoardDescSdMmcGet (BoardDescProtocol,
+ &SdMmcBoardDesc);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ Status = NonDiscoverableInitSdhci (SdMmcBoardDesc);
if (EFI_ERROR(Status)) {
return Status;
}
+ BoardDescProtocol->BoardDescFree (SdMmcBoardDesc);
return EFI_SUCCESS;
}
diff --git a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf
index b62b3fb..98e5b0c 100644
--- a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf
+++ b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf
@@ -52,10 +52,8 @@
NonDiscoverableDeviceRegistrationLib
UefiDriverEntryPoint
-[Pcd]
- gMarvellTokenSpaceGuid.PcdPciEAhci
- gMarvellTokenSpaceGuid.PcdPciESdhci
- gMarvellTokenSpaceGuid.PcdPciEXhci
+[Protocols]
+ gMarvellBoardDescProtocolGuid
[Depex]
TRUE
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* [platforms PATCH 14/25] Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (12 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 13/25] Marvell/Drivers: NonDiscoverable: Switch to use MARVELL_BOARD_DESC Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 20:46 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 15/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information Marcin Wojtas
` (12 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
ComPhy Library used to get Armada7k8k AHCI/SDMMC/XHCI controller
description from hardcoded values stored in the header file
MvHwDescLib.h. As a result it is very hard to support other
Armada SoC families with this library.
This patch updates the driver to get AHCI controller
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 1 -
Silicon/Marvell/Include/Library/MvHwDescLib.h | 60 --------------------
Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c | 50 ++++++++--------
Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h | 4 ++
Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf | 6 +-
5 files changed, 35 insertions(+), 86 deletions(-)
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
index f2c173c..e888566 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
@@ -47,7 +47,6 @@
[LibraryClasses]
ArmLib
- ComPhyLib
DebugLib
MemoryAllocationLib
MppLib
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 5fd514c..9f383f4 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -36,7 +36,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define __MVHWDESCLIB_H__
#include <Library/MvComPhyLib.h>
-#include <Library/NonDiscoverableDeviceRegistrationLib.h>
//
// Helper macros
@@ -80,31 +79,6 @@ typedef struct {
} MVHW_MDIO_DESC;
//
-// NonDiscoverable devices description template definition
-//
-#define MVHW_MAX_XHCI_DEVS 4
-#define MVHW_MAX_AHCI_DEVS 4
-#define MVHW_MAX_SDHCI_DEVS 4
-
-typedef struct {
- // XHCI
- UINT8 XhciDevCount;
- UINTN XhciBaseAddresses[MVHW_MAX_XHCI_DEVS];
- UINTN XhciMemSize[MVHW_MAX_XHCI_DEVS];
- NON_DISCOVERABLE_DEVICE_DMA_TYPE XhciDmaType[MVHW_MAX_XHCI_DEVS];
- // AHCI
- UINT8 AhciDevCount;
- UINTN AhciBaseAddresses[MVHW_MAX_AHCI_DEVS];
- UINTN AhciMemSize[MVHW_MAX_AHCI_DEVS];
- NON_DISCOVERABLE_DEVICE_DMA_TYPE AhciDmaType[MVHW_MAX_AHCI_DEVS];
- // SDHCI
- UINT8 SdhciDevCount;
- UINTN SdhciBaseAddresses[MVHW_MAX_SDHCI_DEVS];
- UINTN SdhciMemSize[MVHW_MAX_SDHCI_DEVS];
- NON_DISCOVERABLE_DEVICE_DMA_TYPE SdhciDmaType[MVHW_MAX_SDHCI_DEVS];
-} MVHW_NONDISCOVERABLE_DESC;
-
-//
// Platform description of CommonPhy devices
//
#define MVHW_CP0_COMPHY_BASE 0xF2441000
@@ -155,38 +129,4 @@ MVHW_MDIO_DESC mA7k8kMdioDescTemplate = {\
{ MVHW_CP0_MDIO_BASE, MVHW_CP1_MDIO_BASE }\
}
-//
-// Platform description of NonDiscoverable devices
-//
-#define MVHW_CP0_XHCI0_BASE 0xF2500000
-#define MVHW_CP0_XHCI1_BASE 0xF2510000
-#define MVHW_CP1_XHCI0_BASE 0xF4500000
-#define MVHW_CP1_XHCI1_BASE 0xF4510000
-
-#define MVHW_CP0_AHCI0_BASE 0xF2540000
-#define MVHW_CP0_AHCI0_ID 0
-#define MVHW_CP1_AHCI0_BASE 0xF4540000
-#define MVHW_CP1_AHCI0_ID 1
-
-#define MVHW_AP0_SDHCI0_BASE 0xF06E0000
-#define MVHW_CP0_SDHCI0_BASE 0xF2780000
-
-#define DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE \
-STATIC \
-MVHW_NONDISCOVERABLE_DESC mA7k8kNonDiscoverableDescTemplate = {\
- 4, /* XHCI */\
- { MVHW_CP0_XHCI0_BASE, MVHW_CP0_XHCI1_BASE, MVHW_CP1_XHCI0_BASE, MVHW_CP1_XHCI1_BASE },\
- { SIZE_16KB, SIZE_16KB, SIZE_16KB, SIZE_16KB },\
- { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent,\
- NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent },\
- 2, /* AHCI */\
- { MVHW_CP0_AHCI0_BASE, MVHW_CP1_AHCI0_BASE },\
- { SIZE_8KB, SIZE_8KB },\
- { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent },\
- 2, /* SDHCI */\
- { MVHW_AP0_SDHCI0_BASE, MVHW_CP0_SDHCI0_BASE },\
- { SIZE_1KB, SIZE_1KB },\
- { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent }\
-}
-
#endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c b/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c
index 09994ca..3c696fb 100755
--- a/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c
+++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c
@@ -33,7 +33,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#include "ComPhyLib.h"
-#include <Library/MvHwDescLib.h>
#include <Library/SampleAtResetLib.h>
#define SD_LANE_ADDR_WIDTH 0x1000
@@ -46,8 +45,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define CP110_PCIE_REF_CLK_TYPE0 0
#define CP110_PCIE_REF_CLK_TYPE12 1
-DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE;
-
/*
* For CP-110 we have 2 Selector registers "PHY Selectors"
* and " PIPE Selectors".
@@ -1138,36 +1135,23 @@ ComPhySataCheckPll (
STATIC
UINTN
ComPhySataPowerUp (
+ IN UINT8 ChipId,
IN UINT32 Lane,
IN EFI_PHYSICAL_ADDRESS HpipeBase,
IN EFI_PHYSICAL_ADDRESS ComPhyBase,
- IN UINT8 SataHostId
+ IN MV_BOARD_AHCI_DESC *Desc
)
{
EFI_STATUS Status;
- UINT8 *SataDeviceTable;
- MVHW_NONDISCOVERABLE_DESC *Desc = &mA7k8kNonDiscoverableDescTemplate;
EFI_PHYSICAL_ADDRESS HpipeAddr = HPIPE_ADDR(HpipeBase, Lane);
EFI_PHYSICAL_ADDRESS SdIpAddr = SD_ADDR(HpipeBase, Lane);
EFI_PHYSICAL_ADDRESS ComPhyAddr = COMPHY_ADDR(ComPhyBase, Lane);
- SataDeviceTable = (UINT8 *) PcdGetPtr (PcdPciEAhci);
-
- if (SataDeviceTable == NULL || SataHostId >= PcdGetSize (PcdPciEAhci)) {
- DEBUG ((DEBUG_ERROR, "ComPhySata: Sata host %d is undefined\n", SataHostId));
- return EFI_INVALID_PARAMETER;
- }
-
- if (!MVHW_DEV_ENABLED (Sata, SataHostId)) {
- DEBUG ((DEBUG_ERROR, "ComPhySata: Sata host %d is disabled\n", SataHostId));
- return EFI_INVALID_PARAMETER;
- }
-
DEBUG ((DEBUG_INFO, "ComPhySata: Initialize SATA PHYs\n"));
DEBUG((DEBUG_INFO, "ComPhySataPowerUp: stage: MAC configuration - power down ComPhy\n"));
- ComPhySataMacPowerDown (Desc->AhciBaseAddresses[SataHostId]);
+ ComPhySataMacPowerDown (Desc[ChipId].SoC->AhciBaseAddress);
DEBUG((DEBUG_INFO, "ComPhy: stage: RFU configurations - hard reset ComPhy\n"));
@@ -1183,7 +1167,7 @@ ComPhySataPowerUp (
DEBUG((DEBUG_INFO, "ComPhy: stage: ComPhy power up\n"));
- ComPhySataPhyPowerUp (Desc->AhciBaseAddresses[SataHostId]);
+ ComPhySataPhyPowerUp (Desc[ChipId].SoC->AhciBaseAddress);
DEBUG((DEBUG_INFO, "ComPhy: stage: Check PLL\n"));
@@ -1884,6 +1868,8 @@ ComPhyCp110Init (
EFI_STATUS Status;
COMPHY_MAP *PtrComPhyMap, *SerdesMap;
EFI_PHYSICAL_ADDRESS ComPhyBaseAddr, HpipeBaseAddr;
+ MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+ MV_BOARD_AHCI_DESC *AhciBoardDesc;
UINT32 ComPhyMaxCount, Lane;
UINT32 PcieWidth = 0;
UINT8 ChipId;
@@ -1927,11 +1913,29 @@ ComPhyCp110Init (
break;
case COMPHY_TYPE_SATA0:
case COMPHY_TYPE_SATA1:
- Status = ComPhySataPowerUp (Lane, HpipeBaseAddr, ComPhyBaseAddr, MVHW_CP0_AHCI0_ID);
- break;
case COMPHY_TYPE_SATA2:
case COMPHY_TYPE_SATA3:
- Status = ComPhySataPowerUp (Lane, HpipeBaseAddr, ComPhyBaseAddr, MVHW_CP1_AHCI0_ID);
+ /* Obtain AHCI board description */
+ Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+ NULL,
+ (VOID **)&BoardDescProtocol);
+ if (EFI_ERROR (Status)) {
+ break;
+ }
+
+ Status = BoardDescProtocol->BoardDescAhciGet (BoardDescProtocol,
+ &AhciBoardDesc);
+ if (EFI_ERROR (Status)) {
+ break;
+ }
+
+ Status = ComPhySataPowerUp (ChipId,
+ Lane,
+ HpipeBaseAddr,
+ ComPhyBaseAddr,
+ AhciBoardDesc);
+
+ BoardDescProtocol->BoardDescFree (AhciBoardDesc);
break;
case COMPHY_TYPE_USB3_HOST0:
case COMPHY_TYPE_USB3_HOST1:
diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h
index c675d74..090116d 100644
--- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h
+++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h
@@ -35,6 +35,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#ifndef __COMPHY_H__
#define __COMPHY_H__
+#include <Uefi.h>
#include <Library/ArmLib.h>
#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
@@ -43,6 +44,9 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include <Library/MvComPhyLib.h>
#include <Library/IoLib.h>
#include <Library/TimerLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#include <Protocol/BoardDesc.h>
#define MAX_LANE_OPTIONS 10
diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
index ce0af54..f36c701 100644
--- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
+++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
@@ -52,12 +52,16 @@
PcdLib
SampleAtResetLib
IoLib
+ UefiBootServicesTableLib
[Sources.common]
ComPhyLib.c
ComPhyCp110.c
ComPhyMux.c
+[Protocols]
+ gMarvellBoardDescProtocolGuid ## CONSUMES
+
[FixedPcd]
gMarvellTokenSpaceGuid.PcdComPhyDevices
@@ -80,5 +84,3 @@
gMarvellTokenSpaceGuid.PcdChip3ComPhyTypes
gMarvellTokenSpaceGuid.PcdChip3ComPhySpeeds
gMarvellTokenSpaceGuid.PcdChip3ComPhyInvFlags
-
- gMarvellTokenSpaceGuid.PcdPciEAhci
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 14/25] Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC
2018-06-08 15:34 ` [platforms PATCH 14/25] Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC Marcin Wojtas
@ 2018-06-12 20:46 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 20:46 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:12PM +0200, Marcin Wojtas wrote:
> ComPhy Library used to get Armada7k8k AHCI/SDMMC/XHCI controller
> description from hardcoded values stored in the header file
> MvHwDescLib.h. As a result it is very hard to support other
> Armada SoC families with this library.
>
> This patch updates the driver to get AHCI controller
> description from newly introduced MARVELL_BOARD_DESC protocol,
> and removes the dependency on the hardcoded structures.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 1 -
> Silicon/Marvell/Include/Library/MvHwDescLib.h | 60 --------------------
> Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c | 50 ++++++++--------
> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h | 4 ++
> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf | 6 +-
> 5 files changed, 35 insertions(+), 86 deletions(-)
>
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
> index f2c173c..e888566 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
> @@ -47,7 +47,6 @@
>
> [LibraryClasses]
> ArmLib
> - ComPhyLib
> DebugLib
> MemoryAllocationLib
> MppLib
> diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
> index 5fd514c..9f383f4 100644
> --- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
> +++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
> @@ -36,7 +36,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> #define __MVHWDESCLIB_H__
>
> #include <Library/MvComPhyLib.h>
> -#include <Library/NonDiscoverableDeviceRegistrationLib.h>
>
> //
> // Helper macros
> @@ -80,31 +79,6 @@ typedef struct {
> } MVHW_MDIO_DESC;
>
> //
> -// NonDiscoverable devices description template definition
> -//
> -#define MVHW_MAX_XHCI_DEVS 4
> -#define MVHW_MAX_AHCI_DEVS 4
> -#define MVHW_MAX_SDHCI_DEVS 4
> -
> -typedef struct {
> - // XHCI
> - UINT8 XhciDevCount;
> - UINTN XhciBaseAddresses[MVHW_MAX_XHCI_DEVS];
> - UINTN XhciMemSize[MVHW_MAX_XHCI_DEVS];
> - NON_DISCOVERABLE_DEVICE_DMA_TYPE XhciDmaType[MVHW_MAX_XHCI_DEVS];
> - // AHCI
> - UINT8 AhciDevCount;
> - UINTN AhciBaseAddresses[MVHW_MAX_AHCI_DEVS];
> - UINTN AhciMemSize[MVHW_MAX_AHCI_DEVS];
> - NON_DISCOVERABLE_DEVICE_DMA_TYPE AhciDmaType[MVHW_MAX_AHCI_DEVS];
> - // SDHCI
> - UINT8 SdhciDevCount;
> - UINTN SdhciBaseAddresses[MVHW_MAX_SDHCI_DEVS];
> - UINTN SdhciMemSize[MVHW_MAX_SDHCI_DEVS];
> - NON_DISCOVERABLE_DEVICE_DMA_TYPE SdhciDmaType[MVHW_MAX_SDHCI_DEVS];
> -} MVHW_NONDISCOVERABLE_DESC;
> -
> -//
> // Platform description of CommonPhy devices
> //
> #define MVHW_CP0_COMPHY_BASE 0xF2441000
> @@ -155,38 +129,4 @@ MVHW_MDIO_DESC mA7k8kMdioDescTemplate = {\
> { MVHW_CP0_MDIO_BASE, MVHW_CP1_MDIO_BASE }\
> }
>
> -//
> -// Platform description of NonDiscoverable devices
> -//
> -#define MVHW_CP0_XHCI0_BASE 0xF2500000
> -#define MVHW_CP0_XHCI1_BASE 0xF2510000
> -#define MVHW_CP1_XHCI0_BASE 0xF4500000
> -#define MVHW_CP1_XHCI1_BASE 0xF4510000
> -
> -#define MVHW_CP0_AHCI0_BASE 0xF2540000
> -#define MVHW_CP0_AHCI0_ID 0
> -#define MVHW_CP1_AHCI0_BASE 0xF4540000
> -#define MVHW_CP1_AHCI0_ID 1
> -
> -#define MVHW_AP0_SDHCI0_BASE 0xF06E0000
> -#define MVHW_CP0_SDHCI0_BASE 0xF2780000
> -
> -#define DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE \
> -STATIC \
> -MVHW_NONDISCOVERABLE_DESC mA7k8kNonDiscoverableDescTemplate = {\
> - 4, /* XHCI */\
> - { MVHW_CP0_XHCI0_BASE, MVHW_CP0_XHCI1_BASE, MVHW_CP1_XHCI0_BASE, MVHW_CP1_XHCI1_BASE },\
> - { SIZE_16KB, SIZE_16KB, SIZE_16KB, SIZE_16KB },\
> - { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent,\
> - NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent },\
> - 2, /* AHCI */\
> - { MVHW_CP0_AHCI0_BASE, MVHW_CP1_AHCI0_BASE },\
> - { SIZE_8KB, SIZE_8KB },\
> - { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent },\
> - 2, /* SDHCI */\
> - { MVHW_AP0_SDHCI0_BASE, MVHW_CP0_SDHCI0_BASE },\
> - { SIZE_1KB, SIZE_1KB },\
> - { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent }\
> -}
> -
> #endif /* __MVHWDESCLIB_H__ */
> diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c b/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c
> index 09994ca..3c696fb 100755
> --- a/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c
> +++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c
> @@ -33,7 +33,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> *******************************************************************************/
>
> #include "ComPhyLib.h"
> -#include <Library/MvHwDescLib.h>
> #include <Library/SampleAtResetLib.h>
>
> #define SD_LANE_ADDR_WIDTH 0x1000
> @@ -46,8 +45,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> #define CP110_PCIE_REF_CLK_TYPE0 0
> #define CP110_PCIE_REF_CLK_TYPE12 1
>
> -DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE;
> -
> /*
> * For CP-110 we have 2 Selector registers "PHY Selectors"
> * and " PIPE Selectors".
> @@ -1138,36 +1135,23 @@ ComPhySataCheckPll (
> STATIC
> UINTN
> ComPhySataPowerUp (
> + IN UINT8 ChipId,
UINTN.
/
Leif
> IN UINT32 Lane,
> IN EFI_PHYSICAL_ADDRESS HpipeBase,
> IN EFI_PHYSICAL_ADDRESS ComPhyBase,
> - IN UINT8 SataHostId
> + IN MV_BOARD_AHCI_DESC *Desc
> )
> {
> EFI_STATUS Status;
> - UINT8 *SataDeviceTable;
> - MVHW_NONDISCOVERABLE_DESC *Desc = &mA7k8kNonDiscoverableDescTemplate;
> EFI_PHYSICAL_ADDRESS HpipeAddr = HPIPE_ADDR(HpipeBase, Lane);
> EFI_PHYSICAL_ADDRESS SdIpAddr = SD_ADDR(HpipeBase, Lane);
> EFI_PHYSICAL_ADDRESS ComPhyAddr = COMPHY_ADDR(ComPhyBase, Lane);
>
> - SataDeviceTable = (UINT8 *) PcdGetPtr (PcdPciEAhci);
> -
> - if (SataDeviceTable == NULL || SataHostId >= PcdGetSize (PcdPciEAhci)) {
> - DEBUG ((DEBUG_ERROR, "ComPhySata: Sata host %d is undefined\n", SataHostId));
> - return EFI_INVALID_PARAMETER;
> - }
> -
> - if (!MVHW_DEV_ENABLED (Sata, SataHostId)) {
> - DEBUG ((DEBUG_ERROR, "ComPhySata: Sata host %d is disabled\n", SataHostId));
> - return EFI_INVALID_PARAMETER;
> - }
> -
> DEBUG ((DEBUG_INFO, "ComPhySata: Initialize SATA PHYs\n"));
>
> DEBUG((DEBUG_INFO, "ComPhySataPowerUp: stage: MAC configuration - power down ComPhy\n"));
>
> - ComPhySataMacPowerDown (Desc->AhciBaseAddresses[SataHostId]);
> + ComPhySataMacPowerDown (Desc[ChipId].SoC->AhciBaseAddress);
>
> DEBUG((DEBUG_INFO, "ComPhy: stage: RFU configurations - hard reset ComPhy\n"));
>
> @@ -1183,7 +1167,7 @@ ComPhySataPowerUp (
>
> DEBUG((DEBUG_INFO, "ComPhy: stage: ComPhy power up\n"));
>
> - ComPhySataPhyPowerUp (Desc->AhciBaseAddresses[SataHostId]);
> + ComPhySataPhyPowerUp (Desc[ChipId].SoC->AhciBaseAddress);
>
> DEBUG((DEBUG_INFO, "ComPhy: stage: Check PLL\n"));
>
> @@ -1884,6 +1868,8 @@ ComPhyCp110Init (
> EFI_STATUS Status;
> COMPHY_MAP *PtrComPhyMap, *SerdesMap;
> EFI_PHYSICAL_ADDRESS ComPhyBaseAddr, HpipeBaseAddr;
> + MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
> + MV_BOARD_AHCI_DESC *AhciBoardDesc;
> UINT32 ComPhyMaxCount, Lane;
> UINT32 PcieWidth = 0;
> UINT8 ChipId;
> @@ -1927,11 +1913,29 @@ ComPhyCp110Init (
> break;
> case COMPHY_TYPE_SATA0:
> case COMPHY_TYPE_SATA1:
> - Status = ComPhySataPowerUp (Lane, HpipeBaseAddr, ComPhyBaseAddr, MVHW_CP0_AHCI0_ID);
> - break;
> case COMPHY_TYPE_SATA2:
> case COMPHY_TYPE_SATA3:
> - Status = ComPhySataPowerUp (Lane, HpipeBaseAddr, ComPhyBaseAddr, MVHW_CP1_AHCI0_ID);
> + /* Obtain AHCI board description */
> + Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
> + NULL,
> + (VOID **)&BoardDescProtocol);
> + if (EFI_ERROR (Status)) {
> + break;
> + }
> +
> + Status = BoardDescProtocol->BoardDescAhciGet (BoardDescProtocol,
> + &AhciBoardDesc);
> + if (EFI_ERROR (Status)) {
> + break;
> + }
> +
> + Status = ComPhySataPowerUp (ChipId,
> + Lane,
> + HpipeBaseAddr,
> + ComPhyBaseAddr,
> + AhciBoardDesc);
> +
> + BoardDescProtocol->BoardDescFree (AhciBoardDesc);
> break;
> case COMPHY_TYPE_USB3_HOST0:
> case COMPHY_TYPE_USB3_HOST1:
> diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h
> index c675d74..090116d 100644
> --- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h
> +++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h
> @@ -35,6 +35,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> #ifndef __COMPHY_H__
> #define __COMPHY_H__
>
> +#include <Uefi.h>
> #include <Library/ArmLib.h>
> #include <Library/ArmPlatformLib.h>
> #include <Library/DebugLib.h>
> @@ -43,6 +44,9 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> #include <Library/MvComPhyLib.h>
> #include <Library/IoLib.h>
> #include <Library/TimerLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +
> +#include <Protocol/BoardDesc.h>
>
> #define MAX_LANE_OPTIONS 10
>
> diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
> index ce0af54..f36c701 100644
> --- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
> +++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
> @@ -52,12 +52,16 @@
> PcdLib
> SampleAtResetLib
> IoLib
> + UefiBootServicesTableLib
>
> [Sources.common]
> ComPhyLib.c
> ComPhyCp110.c
> ComPhyMux.c
>
> +[Protocols]
> + gMarvellBoardDescProtocolGuid ## CONSUMES
> +
> [FixedPcd]
> gMarvellTokenSpaceGuid.PcdComPhyDevices
>
> @@ -80,5 +84,3 @@
> gMarvellTokenSpaceGuid.PcdChip3ComPhyTypes
> gMarvellTokenSpaceGuid.PcdChip3ComPhySpeeds
> gMarvellTokenSpaceGuid.PcdChip3ComPhyInvFlags
> -
> - gMarvellTokenSpaceGuid.PcdPciEAhci
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 15/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (13 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 14/25] Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 20:51 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 16/25] Marvell/Drivers: MvBoardDesc: Extend protocol with COMPHY support Marcin Wojtas
` (11 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
This patch introduces new library callback (ArmadaSoCDescComPhyGet ()),
which dynamically allocates and fills MV_SOC_COMPHY_DESC structure with
the SoC description of ComPhy SerDes controllers.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 40 ++++++++++++++++++++
Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 20 ++++++++++
2 files changed, 60 insertions(+)
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index de57b47..ba44a0c 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -32,6 +32,46 @@
#define MV_SOC_CP_BASE(Cp) (0xF2000000 + (Cp) * 0x2000000)
//
+// Platform description of ComPhy controllers
+//
+#define MV_SOC_COMPHY_BASE(Cp) (MV_SOC_CP_BASE ((Cp)) + 0x441000)
+#define MV_SOC_HPIPE3_BASE(Cp) (MV_SOC_CP_BASE ((Cp)) + 0x120000)
+#define MV_SOC_COMPHY_LANE_COUNT 6
+#define MV_SOC_COMPHY_MUX_BITS 4
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescComPhyGet (
+ IN OUT MV_SOC_COMPHY_DESC **ComPhyDesc,
+ IN OUT UINT8 *DescCount
+ )
+{
+ MV_SOC_COMPHY_DESC *Desc;
+ UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount);
+ UINT8 CpIndex;
+
+ Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_COMPHY_DESC));
+ if (Desc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+ Desc[CpIndex].ComPhyBaseAddress = MV_SOC_COMPHY_BASE (CpIndex);
+ Desc[CpIndex].ComPhyHpipe3BaseAddress = MV_SOC_HPIPE3_BASE (CpIndex);
+ Desc[CpIndex].ComPhyLaneCount = MV_SOC_COMPHY_LANE_COUNT;
+ Desc[CpIndex].ComPhyMuxBitCount = MV_SOC_COMPHY_MUX_BITS;
+ Desc[CpIndex].ComPhyChipType = MvComPhyTypeCp110;
+ Desc[CpIndex].ComPhyId = CpIndex;
+ }
+
+ *ComPhyDesc = Desc;
+ *DescCount = CpCount;
+
+ return EFI_SUCCESS;
+}
+
+//
// Platform description of NonDiscoverableDevices
//
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
index 438f838..791d58b 100644
--- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -14,9 +14,29 @@
#ifndef __ARMADA_SOC_DESC_LIB_H__
#define __ARMADA_SOC_DESC_LIB_H__
+#include <Library/MvComPhyLib.h>
#include <Library/NonDiscoverableDeviceRegistrationLib.h>
//
+// ComPhy SoC description
+//
+typedef struct {
+ UINTN ComPhyId;
+ UINTN ComPhyBaseAddress;
+ UINTN ComPhyHpipe3BaseAddress;
+ UINTN ComPhyLaneCount;
+ UINTN ComPhyMuxBitCount;
+ MV_COMPHY_CHIP_TYPE ComPhyChipType;
+} MV_SOC_COMPHY_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescComPhyGet (
+ IN OUT MV_SOC_COMPHY_DESC **ComPhyDesc,
+ IN OUT UINT8 *DescCount
+ );
+
+//
// NonDiscoverable devices SoC description
//
// AHCI
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 15/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information
2018-06-08 15:34 ` [platforms PATCH 15/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information Marcin Wojtas
@ 2018-06-12 20:51 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 20:51 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:13PM +0200, Marcin Wojtas wrote:
> This patch introduces new library callback (ArmadaSoCDescComPhyGet ()),
> which dynamically allocates and fills MV_SOC_COMPHY_DESC structure with
> the SoC description of ComPhy SerDes controllers.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 40 ++++++++++++++++++++
> Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 20 ++++++++++
> 2 files changed, 60 insertions(+)
>
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> index de57b47..ba44a0c 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> @@ -32,6 +32,46 @@
> #define MV_SOC_CP_BASE(Cp) (0xF2000000 + (Cp) * 0x2000000)
>
> //
> +// Platform description of ComPhy controllers
> +//
> +#define MV_SOC_COMPHY_BASE(Cp) (MV_SOC_CP_BASE ((Cp)) + 0x441000)
> +#define MV_SOC_HPIPE3_BASE(Cp) (MV_SOC_CP_BASE ((Cp)) + 0x120000)
> +#define MV_SOC_COMPHY_LANE_COUNT 6
> +#define MV_SOC_COMPHY_MUX_BITS 4
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescComPhyGet (
> + IN OUT MV_SOC_COMPHY_DESC **ComPhyDesc,
> + IN OUT UINT8 *DescCount
Make it UINTN please.
> + )
> +{
> + MV_SOC_COMPHY_DESC *Desc;
> + UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount);
> + UINT8 CpIndex;
UINTN x2.
/
Leif
> +
> + Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_COMPHY_DESC));
> + if (Desc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> + Desc[CpIndex].ComPhyBaseAddress = MV_SOC_COMPHY_BASE (CpIndex);
> + Desc[CpIndex].ComPhyHpipe3BaseAddress = MV_SOC_HPIPE3_BASE (CpIndex);
> + Desc[CpIndex].ComPhyLaneCount = MV_SOC_COMPHY_LANE_COUNT;
> + Desc[CpIndex].ComPhyMuxBitCount = MV_SOC_COMPHY_MUX_BITS;
> + Desc[CpIndex].ComPhyChipType = MvComPhyTypeCp110;
> + Desc[CpIndex].ComPhyId = CpIndex;
> + }
> +
> + *ComPhyDesc = Desc;
> + *DescCount = CpCount;
> +
> + return EFI_SUCCESS;
> +}
> +
> +//
> // Platform description of NonDiscoverableDevices
> //
>
> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> index 438f838..791d58b 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> @@ -14,9 +14,29 @@
> #ifndef __ARMADA_SOC_DESC_LIB_H__
> #define __ARMADA_SOC_DESC_LIB_H__
>
> +#include <Library/MvComPhyLib.h>
> #include <Library/NonDiscoverableDeviceRegistrationLib.h>
>
> //
> +// ComPhy SoC description
> +//
> +typedef struct {
> + UINTN ComPhyId;
> + UINTN ComPhyBaseAddress;
> + UINTN ComPhyHpipe3BaseAddress;
> + UINTN ComPhyLaneCount;
> + UINTN ComPhyMuxBitCount;
> + MV_COMPHY_CHIP_TYPE ComPhyChipType;
> +} MV_SOC_COMPHY_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescComPhyGet (
> + IN OUT MV_SOC_COMPHY_DESC **ComPhyDesc,
> + IN OUT UINT8 *DescCount
> + );
> +
> +//
> // NonDiscoverable devices SoC description
> //
> // AHCI
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 16/25] Marvell/Drivers: MvBoardDesc: Extend protocol with COMPHY support
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (14 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 15/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 21:02 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 17/25] Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC Marcin Wojtas
` (10 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
Introduce new callback that can provide information
about COMPHY controllers to the ComPhyLib.
Extend ArmadaBoardDescLib with new structure MV_BOARD_COMPHY_DESC,
for holding board specific data. In further steps it can
be extended and replace PCD SerDes lanes' representation with the
appropriate structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 60 ++++++++++++++++++++
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 +
Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 11 ++++
Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++
4 files changed, 80 insertions(+)
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index 44d159e..d580319 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -37,6 +37,65 @@ MV_BOARD_DESC *mBoardDescInstance;
STATIC
EFI_STATUS
+MvBoardDescComPhyGet (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_COMPHY_DESC **ComPhyDesc
+ )
+{
+ UINT8 *ComPhyDeviceTable, ComPhyCount;
+ UINTN ComPhyDeviceTableSize, ComPhyIndex, Index;
+ MV_BOARD_COMPHY_DESC *BoardDesc;
+ MV_SOC_COMPHY_DESC *SoCDesc;
+ EFI_STATUS Status;
+
+ /* Get SoC data about all available COMPHY controllers */
+ Status = ArmadaSoCDescComPhyGet (&SoCDesc, &ComPhyCount);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ /* Obtain table with enabled COMPHY controllers */
+ ComPhyDeviceTable = (UINT8 *)PcdGetPtr (PcdComPhyDevices);
+ if (ComPhyDeviceTable == NULL) {
+ /* No COMPHY controllers declared */
+ return EFI_NOT_FOUND;
+ }
+
+ ComPhyDeviceTableSize = PcdGetSize (PcdComPhyDevices);
+
+ /* Check if PCD with COMPHY NICs is correctly defined */
+ if (ComPhyDeviceTableSize > ComPhyCount) {
+ DEBUG ((DEBUG_ERROR, "%a: Wrong PcdComPhyDevices format\n", __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (ComPhyDeviceTableSize * sizeof (MV_BOARD_COMPHY_DESC));
+ if (BoardDesc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ ComPhyIndex = 0;
+ for (Index = 0; Index < ComPhyDeviceTableSize; Index++) {
+ if (!MVHW_DEV_ENABLED (ComPhy, Index)) {
+ DEBUG ((DEBUG_ERROR, "%a: Skip ComPhy controller %d\n", __FUNCTION__, Index));
+ continue;
+ }
+
+ BoardDesc[ComPhyIndex].SoC = &SoCDesc[Index];
+ ComPhyIndex++;
+ }
+
+ BoardDesc->ComPhyDevCount = ComPhyIndex;
+
+ *ComPhyDesc = BoardDesc;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
MvBoardDescAhciGet (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_AHCI_DESC **AhciDesc
@@ -374,6 +433,7 @@ MvBoardDescInitProtocol (
IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
)
{
+ BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet;
BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
BoardDescProtocol->BoardDescXhciGet = MvBoardDescXhciGet;
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
index fe819ac..71b7ebd 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -57,6 +57,7 @@
gMarvellBoardDescProtocolGuid
[Pcd]
+ gMarvellTokenSpaceGuid.PcdComPhyDevices
gMarvellTokenSpaceGuid.PcdPp2Controllers
gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
gMarvellTokenSpaceGuid.PcdUtmiPortType
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index 938d283..1b56316 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -17,6 +17,17 @@
#include <Library/ArmadaSoCDescLib.h>
//
+// COMPHY NIC devices per-board description
+//
+// TODO - Extend structure with entire
+// ports description instead of PCDs.
+//
+typedef struct {
+ MV_SOC_COMPHY_DESC *SoC;
+ UINT8 ComPhyDevCount;
+} MV_BOARD_COMPHY_DESC;
+
+//
// NonDiscoverableDevices per-board description
//
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index a59ade5..27250db 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
typedef
EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_COMPHY_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_COMPHY_DESC **ComPhyDesc
+ );
+
+typedef
+EFI_STATUS
(EFIAPI *MV_BOARD_DESC_AHCI_GET) (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_AHCI_DESC **AhciDesc
@@ -83,6 +90,7 @@ VOID
);
struct _MARVELL_BOARD_DESC_PROTOCOL {
+ MV_BOARD_DESC_COMPHY_GET BoardDescComPhyGet;
MV_BOARD_DESC_AHCI_GET BoardDescAhciGet;
MV_BOARD_DESC_SDMMC_GET BoardDescSdMmcGet;
MV_BOARD_DESC_XHCI_GET BoardDescXhciGet;
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 16/25] Marvell/Drivers: MvBoardDesc: Extend protocol with COMPHY support
2018-06-08 15:34 ` [platforms PATCH 16/25] Marvell/Drivers: MvBoardDesc: Extend protocol with COMPHY support Marcin Wojtas
@ 2018-06-12 21:02 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 21:02 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:14PM +0200, Marcin Wojtas wrote:
> Introduce new callback that can provide information
> about COMPHY controllers to the ComPhyLib.
>
> Extend ArmadaBoardDescLib with new structure MV_BOARD_COMPHY_DESC,
> for holding board specific data. In further steps it can
> be extended and replace PCD SerDes lanes' representation with the
> appropriate structures.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 60 ++++++++++++++++++++
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 +
> Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 11 ++++
> Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++
> 4 files changed, 80 insertions(+)
>
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> index 44d159e..d580319 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> @@ -37,6 +37,65 @@ MV_BOARD_DESC *mBoardDescInstance;
>
> STATIC
> EFI_STATUS
> +MvBoardDescComPhyGet (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_COMPHY_DESC **ComPhyDesc
> + )
> +{
> + UINT8 *ComPhyDeviceTable, ComPhyCount;
UINTN for count please.
> + UINTN ComPhyDeviceTableSize, ComPhyIndex, Index;
> + MV_BOARD_COMPHY_DESC *BoardDesc;
> + MV_SOC_COMPHY_DESC *SoCDesc;
> + EFI_STATUS Status;
> +
> + /* Get SoC data about all available COMPHY controllers */
> + Status = ArmadaSoCDescComPhyGet (&SoCDesc, &ComPhyCount);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + /* Obtain table with enabled COMPHY controllers */
> + ComPhyDeviceTable = (UINT8 *)PcdGetPtr (PcdComPhyDevices);
> + if (ComPhyDeviceTable == NULL) {
> + /* No COMPHY controllers declared */
> + return EFI_NOT_FOUND;
> + }
> +
> + ComPhyDeviceTableSize = PcdGetSize (PcdComPhyDevices);
> +
> + /* Check if PCD with COMPHY NICs is correctly defined */
> + if (ComPhyDeviceTableSize > ComPhyCount) {
> + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdComPhyDevices format\n", __FUNCTION__));
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + /* Allocate and fill board description */
> + BoardDesc = AllocateZeroPool (ComPhyDeviceTableSize * sizeof (MV_BOARD_COMPHY_DESC));
> + if (BoardDesc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + ComPhyIndex = 0;
> + for (Index = 0; Index < ComPhyDeviceTableSize; Index++) {
> + if (!MVHW_DEV_ENABLED (ComPhy, Index)) {
if (ComPhyDeviceTable[Index] != MVHW_DEV_ENABLED) {
> + DEBUG ((DEBUG_ERROR, "%a: Skip ComPhy controller %d\n", __FUNCTION__, Index));
> + continue;
> + }
> +
> + BoardDesc[ComPhyIndex].SoC = &SoCDesc[Index];
> + ComPhyIndex++;
> + }
> +
> + BoardDesc->ComPhyDevCount = ComPhyIndex;
> +
> + *ComPhyDesc = BoardDesc;
> +
> + return EFI_SUCCESS;
> +}
> +
> +STATIC
> +EFI_STATUS
> MvBoardDescAhciGet (
> IN MARVELL_BOARD_DESC_PROTOCOL *This,
> IN OUT MV_BOARD_AHCI_DESC **AhciDesc
> @@ -374,6 +433,7 @@ MvBoardDescInitProtocol (
> IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
> )
> {
> + BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet;
Insert alphabetically?
> BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
> BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
> BoardDescProtocol->BoardDescXhciGet = MvBoardDescXhciGet;
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> index fe819ac..71b7ebd 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> @@ -57,6 +57,7 @@
> gMarvellBoardDescProtocolGuid
>
> [Pcd]
> + gMarvellTokenSpaceGuid.PcdComPhyDevices
Insert alphabetically?
> gMarvellTokenSpaceGuid.PcdPp2Controllers
> gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
> gMarvellTokenSpaceGuid.PcdUtmiPortType
> diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> index 938d283..1b56316 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> @@ -17,6 +17,17 @@
> #include <Library/ArmadaSoCDescLib.h>
>
> //
> +// COMPHY NIC devices per-board description
> +//
> +// TODO - Extend structure with entire
> +// ports description instead of PCDs.
Drop the TODO please.
> +//
> +typedef struct {
> + MV_SOC_COMPHY_DESC *SoC;
> + UINT8 ComPhyDevCount;
UINTN please.
> +} MV_BOARD_COMPHY_DESC;
> +
> +//
> // NonDiscoverableDevices per-board description
> //
>
> diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> index a59ade5..27250db 100644
> --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
> +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> @@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
>
> typedef
> EFI_STATUS
> +(EFIAPI *MV_BOARD_DESC_COMPHY_GET) (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_COMPHY_DESC **ComPhyDesc
> + );
> +
> +typedef
> +EFI_STATUS
> (EFIAPI *MV_BOARD_DESC_AHCI_GET) (
> IN MARVELL_BOARD_DESC_PROTOCOL *This,
> IN OUT MV_BOARD_AHCI_DESC **AhciDesc
> @@ -83,6 +90,7 @@ VOID
> );
>
> struct _MARVELL_BOARD_DESC_PROTOCOL {
> + MV_BOARD_DESC_COMPHY_GET BoardDescComPhyGet;
Insert alphabetically?
/
Leif
> MV_BOARD_DESC_AHCI_GET BoardDescAhciGet;
> MV_BOARD_DESC_SDMMC_GET BoardDescSdMmcGet;
> MV_BOARD_DESC_XHCI_GET BoardDescXhciGet;
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 17/25] Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (15 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 16/25] Marvell/Drivers: MvBoardDesc: Extend protocol with COMPHY support Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 21:12 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 18/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information Marcin Wojtas
` (9 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
MvComPhyLib library used to get Armada7k8k SerDes multiplexing
controller description from hardcoded values stored in the header
file MvHwDescLib.h. As a result it is very hard to support other
Armada SoC families with this library.
This patch updates the library, so that it can obtain the
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Include/Library/MvHwDescLib.h | 39 -----------
Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c | 74 ++++++++++++--------
2 files changed, 45 insertions(+), 68 deletions(-)
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 9f383f4..423ca17 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -35,8 +35,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#ifndef __MVHWDESCLIB_H__
#define __MVHWDESCLIB_H__
-#include <Library/MvComPhyLib.h>
-
//
// Helper macros
//
@@ -45,20 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define MVHW_DEV_ENABLED(type, index) (type ## DeviceTable[index])
//
-// CommonPhy devices description template definition
-//
-#define MVHW_MAX_COMPHY_DEVS 4
-
-typedef struct {
- UINT8 ComPhyDevCount;
- UINTN ComPhyBaseAddresses[MVHW_MAX_COMPHY_DEVS];
- UINTN ComPhyHpipe3BaseAddresses[MVHW_MAX_COMPHY_DEVS];
- UINTN ComPhyLaneCount[MVHW_MAX_COMPHY_DEVS];
- UINTN ComPhyMuxBitCount[MVHW_MAX_COMPHY_DEVS];
- MV_COMPHY_CHIP_TYPE ComPhyChipType[MVHW_MAX_COMPHY_DEVS];
-} MVHW_COMPHY_DESC;
-
-//
// I2C devices description template definition
//
#define MVHW_MAX_I2C_DEVS 4
@@ -79,29 +63,6 @@ typedef struct {
} MVHW_MDIO_DESC;
//
-// Platform description of CommonPhy devices
-//
-#define MVHW_CP0_COMPHY_BASE 0xF2441000
-#define MVHW_CP0_HPIPE3_BASE 0xF2120000
-#define MVHW_CP0_COMPHY_LANES 6
-#define MVHW_CP0_COMPHY_MUX_BITS 4
-#define MVHW_CP1_COMPHY_BASE 0xF4441000
-#define MVHW_CP1_HPIPE3_BASE 0xF4120000
-#define MVHW_CP1_COMPHY_LANES 6
-#define MVHW_CP1_COMPHY_MUX_BITS 4
-
-#define DECLARE_A7K8K_COMPHY_TEMPLATE \
-STATIC \
-MVHW_COMPHY_DESC mA7k8kComPhyDescTemplate = {\
- 2,\
- { MVHW_CP0_COMPHY_BASE, MVHW_CP1_COMPHY_BASE },\
- { MVHW_CP0_HPIPE3_BASE, MVHW_CP1_HPIPE3_BASE },\
- { MVHW_CP0_COMPHY_LANES, MVHW_CP1_COMPHY_LANES },\
- { MVHW_CP0_COMPHY_MUX_BITS, MVHW_CP1_COMPHY_MUX_BITS },\
- { MvComPhyTypeCp110, MvComPhyTypeCp110 }\
-}
-
-//
// Platform description of I2C devices
//
#define MVHW_CP0_I2C0_BASE 0xF2701000
diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
index b03bc35..8555c4c 100644
--- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
+++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
@@ -34,9 +34,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include "ComPhyLib.h"
#include <Library/MvComPhyLib.h>
-#include <Library/MvHwDescLib.h>
-
-DECLARE_A7K8K_COMPHY_TEMPLATE;
CHAR16 * TypeStringTable [] = {L"unconnected", L"PCIE0", L"PCIE1", L"PCIE2",
L"PCIE3", L"SATA0", L"SATA1", L"SATA2", L"SATA3",
@@ -182,22 +179,20 @@ VOID
InitComPhyConfig (
IN OUT CHIP_COMPHY_CONFIG *ChipConfig,
IN OUT PCD_LANE_MAP *LaneData,
- IN UINT8 Id
+ IN MV_BOARD_COMPHY_DESC *Desc
)
{
- MVHW_COMPHY_DESC *Desc = &mA7k8kComPhyDescTemplate;
-
- ChipConfig->ChipType = Desc->ComPhyChipType[Id];
- ChipConfig->ComPhyBaseAddr = Desc->ComPhyBaseAddresses[Id];
- ChipConfig->Hpipe3BaseAddr = Desc->ComPhyHpipe3BaseAddresses[Id];
- ChipConfig->LanesCount = Desc->ComPhyLaneCount[Id];
- ChipConfig->MuxBitCount = Desc->ComPhyMuxBitCount[Id];
- ChipConfig->ChipId = Id;
+ ChipConfig->ChipType = Desc->SoC->ComPhyChipType;
+ ChipConfig->ComPhyBaseAddr = Desc->SoC->ComPhyBaseAddress;
+ ChipConfig->Hpipe3BaseAddr = Desc->SoC->ComPhyHpipe3BaseAddress;
+ ChipConfig->LanesCount = Desc->SoC->ComPhyLaneCount;
+ ChipConfig->MuxBitCount = Desc->SoC->ComPhyMuxBitCount;
+ ChipConfig->ChipId = Desc->SoC->ComPhyId;
/*
* Below macro contains variable name concatenation (used to form PCD's name).
*/
- switch (Id) {
+ switch (ChipConfig->ChipId) {
case 0:
GetComPhyPcd (LaneData, 0);
break;
@@ -219,32 +214,49 @@ MvComPhyInit (
)
{
EFI_STATUS Status;
- CHIP_COMPHY_CONFIG ChipConfig[MVHW_MAX_COMPHY_DEVS], *PtrChipCfg;
- PCD_LANE_MAP LaneData[MVHW_MAX_COMPHY_DEVS];
+ CHIP_COMPHY_CONFIG *ChipConfig, *PtrChipCfg;
+ MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+ MV_BOARD_COMPHY_DESC *ComPhyBoardDesc;
+ PCD_LANE_MAP *LaneData;
UINT32 Lane, MaxComphyCount;
- UINT8 *ComPhyDeviceTable, Index;
+ UINT8 Index;
/* Obtain table with enabled ComPhy devices */
- ComPhyDeviceTable = (UINT8 *)PcdGetPtr (PcdComPhyDevices);
- if (ComPhyDeviceTable == NULL) {
- DEBUG ((DEBUG_ERROR, "Missing PcdComPhyDevices\n"));
- return EFI_INVALID_PARAMETER;
+ Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+ NULL,
+ (VOID **)&BoardDescProtocol);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = BoardDescProtocol->BoardDescComPhyGet (BoardDescProtocol,
+ &ComPhyBoardDesc);
+ if (EFI_ERROR (Status)) {
+ return Status;
}
- if (PcdGetSize (PcdComPhyDevices) > MVHW_MAX_COMPHY_DEVS) {
- DEBUG ((DEBUG_ERROR, "Wrong PcdComPhyDevices format\n"));
- return EFI_INVALID_PARAMETER;
+ ChipConfig = AllocateZeroPool (ComPhyBoardDesc->ComPhyDevCount *
+ sizeof (CHIP_COMPHY_CONFIG));
+ if (ChipConfig == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ BoardDescProtocol->BoardDescFree (ComPhyBoardDesc);
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ LaneData = AllocateZeroPool (ComPhyBoardDesc->ComPhyDevCount *
+ sizeof (PCD_LANE_MAP));
+ if (ChipConfig == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ BoardDescProtocol->BoardDescFree (ComPhyBoardDesc);
+ FreePool (ChipConfig);
+ return EFI_OUT_OF_RESOURCES;
}
/* Initialize enabled chips */
- for (Index = 0; Index < PcdGetSize (PcdComPhyDevices); Index++) {
- if (!MVHW_DEV_ENABLED (ComPhy, Index)) {
- DEBUG ((DEBUG_ERROR, "Skip ComPhy chip %d\n", Index));
- continue;
- }
+ for (Index = 0; Index < ComPhyBoardDesc->ComPhyDevCount; Index++) {
PtrChipCfg = &ChipConfig[Index];
- InitComPhyConfig(PtrChipCfg, LaneData, Index);
+ InitComPhyConfig (PtrChipCfg, LaneData, &ComPhyBoardDesc[Index]);
/* Get the count of the SerDes of the specific chip */
MaxComphyCount = PtrChipCfg->LanesCount;
@@ -275,5 +287,9 @@ MvComPhyInit (
PtrChipCfg->Init (PtrChipCfg);
}
+ BoardDescProtocol->BoardDescFree (ComPhyBoardDesc);
+ FreePool (ChipConfig);
+ FreePool (LaneData);
+
return EFI_SUCCESS;
}
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 17/25] Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC
2018-06-08 15:34 ` [platforms PATCH 17/25] Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC Marcin Wojtas
@ 2018-06-12 21:12 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 21:12 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:15PM +0200, Marcin Wojtas wrote:
> MvComPhyLib library used to get Armada7k8k SerDes multiplexing
> controller description from hardcoded values stored in the header
> file MvHwDescLib.h. As a result it is very hard to support other
> Armada SoC families with this library.
>
> This patch updates the library, so that it can obtain the
> description from newly introduced MARVELL_BOARD_DESC protocol,
> and removes the dependency on the hardcoded structures.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Include/Library/MvHwDescLib.h | 39 -----------
> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c | 74 ++++++++++++--------
> 2 files changed, 45 insertions(+), 68 deletions(-)
>
> diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
> index 9f383f4..423ca17 100644
> --- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
> +++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
> @@ -35,8 +35,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> #ifndef __MVHWDESCLIB_H__
> #define __MVHWDESCLIB_H__
>
> -#include <Library/MvComPhyLib.h>
> -
> //
> // Helper macros
> //
> @@ -45,20 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> #define MVHW_DEV_ENABLED(type, index) (type ## DeviceTable[index])
>
> //
> -// CommonPhy devices description template definition
> -//
> -#define MVHW_MAX_COMPHY_DEVS 4
> -
> -typedef struct {
> - UINT8 ComPhyDevCount;
> - UINTN ComPhyBaseAddresses[MVHW_MAX_COMPHY_DEVS];
> - UINTN ComPhyHpipe3BaseAddresses[MVHW_MAX_COMPHY_DEVS];
> - UINTN ComPhyLaneCount[MVHW_MAX_COMPHY_DEVS];
> - UINTN ComPhyMuxBitCount[MVHW_MAX_COMPHY_DEVS];
> - MV_COMPHY_CHIP_TYPE ComPhyChipType[MVHW_MAX_COMPHY_DEVS];
> -} MVHW_COMPHY_DESC;
> -
> -//
> // I2C devices description template definition
> //
> #define MVHW_MAX_I2C_DEVS 4
> @@ -79,29 +63,6 @@ typedef struct {
> } MVHW_MDIO_DESC;
>
> //
> -// Platform description of CommonPhy devices
> -//
> -#define MVHW_CP0_COMPHY_BASE 0xF2441000
> -#define MVHW_CP0_HPIPE3_BASE 0xF2120000
> -#define MVHW_CP0_COMPHY_LANES 6
> -#define MVHW_CP0_COMPHY_MUX_BITS 4
> -#define MVHW_CP1_COMPHY_BASE 0xF4441000
> -#define MVHW_CP1_HPIPE3_BASE 0xF4120000
> -#define MVHW_CP1_COMPHY_LANES 6
> -#define MVHW_CP1_COMPHY_MUX_BITS 4
> -
> -#define DECLARE_A7K8K_COMPHY_TEMPLATE \
> -STATIC \
> -MVHW_COMPHY_DESC mA7k8kComPhyDescTemplate = {\
> - 2,\
> - { MVHW_CP0_COMPHY_BASE, MVHW_CP1_COMPHY_BASE },\
> - { MVHW_CP0_HPIPE3_BASE, MVHW_CP1_HPIPE3_BASE },\
> - { MVHW_CP0_COMPHY_LANES, MVHW_CP1_COMPHY_LANES },\
> - { MVHW_CP0_COMPHY_MUX_BITS, MVHW_CP1_COMPHY_MUX_BITS },\
> - { MvComPhyTypeCp110, MvComPhyTypeCp110 }\
> -}
> -
> -//
> // Platform description of I2C devices
> //
> #define MVHW_CP0_I2C0_BASE 0xF2701000
> diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
> index b03bc35..8555c4c 100644
> --- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
> +++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
> @@ -34,9 +34,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>
> #include "ComPhyLib.h"
> #include <Library/MvComPhyLib.h>
> -#include <Library/MvHwDescLib.h>
> -
> -DECLARE_A7K8K_COMPHY_TEMPLATE;
>
> CHAR16 * TypeStringTable [] = {L"unconnected", L"PCIE0", L"PCIE1", L"PCIE2",
> L"PCIE3", L"SATA0", L"SATA1", L"SATA2", L"SATA3",
> @@ -182,22 +179,20 @@ VOID
> InitComPhyConfig (
> IN OUT CHIP_COMPHY_CONFIG *ChipConfig,
> IN OUT PCD_LANE_MAP *LaneData,
> - IN UINT8 Id
> + IN MV_BOARD_COMPHY_DESC *Desc
> )
> {
> - MVHW_COMPHY_DESC *Desc = &mA7k8kComPhyDescTemplate;
> -
> - ChipConfig->ChipType = Desc->ComPhyChipType[Id];
> - ChipConfig->ComPhyBaseAddr = Desc->ComPhyBaseAddresses[Id];
> - ChipConfig->Hpipe3BaseAddr = Desc->ComPhyHpipe3BaseAddresses[Id];
> - ChipConfig->LanesCount = Desc->ComPhyLaneCount[Id];
> - ChipConfig->MuxBitCount = Desc->ComPhyMuxBitCount[Id];
> - ChipConfig->ChipId = Id;
> + ChipConfig->ChipType = Desc->SoC->ComPhyChipType;
> + ChipConfig->ComPhyBaseAddr = Desc->SoC->ComPhyBaseAddress;
> + ChipConfig->Hpipe3BaseAddr = Desc->SoC->ComPhyHpipe3BaseAddress;
> + ChipConfig->LanesCount = Desc->SoC->ComPhyLaneCount;
> + ChipConfig->MuxBitCount = Desc->SoC->ComPhyMuxBitCount;
> + ChipConfig->ChipId = Desc->SoC->ComPhyId;
>
> /*
> * Below macro contains variable name concatenation (used to form PCD's name).
> */
> - switch (Id) {
> + switch (ChipConfig->ChipId) {
> case 0:
> GetComPhyPcd (LaneData, 0);
> break;
> @@ -219,32 +214,49 @@ MvComPhyInit (
> )
> {
> EFI_STATUS Status;
> - CHIP_COMPHY_CONFIG ChipConfig[MVHW_MAX_COMPHY_DEVS], *PtrChipCfg;
> - PCD_LANE_MAP LaneData[MVHW_MAX_COMPHY_DEVS];
> + CHIP_COMPHY_CONFIG *ChipConfig, *PtrChipCfg;
> + MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
> + MV_BOARD_COMPHY_DESC *ComPhyBoardDesc;
> + PCD_LANE_MAP *LaneData;
> UINT32 Lane, MaxComphyCount;
> - UINT8 *ComPhyDeviceTable, Index;
> + UINT8 Index;
UINTN.
/
Leif
>
> /* Obtain table with enabled ComPhy devices */
> - ComPhyDeviceTable = (UINT8 *)PcdGetPtr (PcdComPhyDevices);
> - if (ComPhyDeviceTable == NULL) {
> - DEBUG ((DEBUG_ERROR, "Missing PcdComPhyDevices\n"));
> - return EFI_INVALID_PARAMETER;
> + Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
> + NULL,
> + (VOID **)&BoardDescProtocol);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + Status = BoardDescProtocol->BoardDescComPhyGet (BoardDescProtocol,
> + &ComPhyBoardDesc);
> + if (EFI_ERROR (Status)) {
> + return Status;
> }
>
> - if (PcdGetSize (PcdComPhyDevices) > MVHW_MAX_COMPHY_DEVS) {
> - DEBUG ((DEBUG_ERROR, "Wrong PcdComPhyDevices format\n"));
> - return EFI_INVALID_PARAMETER;
> + ChipConfig = AllocateZeroPool (ComPhyBoardDesc->ComPhyDevCount *
> + sizeof (CHIP_COMPHY_CONFIG));
> + if (ChipConfig == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + BoardDescProtocol->BoardDescFree (ComPhyBoardDesc);
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + LaneData = AllocateZeroPool (ComPhyBoardDesc->ComPhyDevCount *
> + sizeof (PCD_LANE_MAP));
> + if (ChipConfig == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + BoardDescProtocol->BoardDescFree (ComPhyBoardDesc);
> + FreePool (ChipConfig);
> + return EFI_OUT_OF_RESOURCES;
> }
>
> /* Initialize enabled chips */
> - for (Index = 0; Index < PcdGetSize (PcdComPhyDevices); Index++) {
> - if (!MVHW_DEV_ENABLED (ComPhy, Index)) {
> - DEBUG ((DEBUG_ERROR, "Skip ComPhy chip %d\n", Index));
> - continue;
> - }
> + for (Index = 0; Index < ComPhyBoardDesc->ComPhyDevCount; Index++) {
>
> PtrChipCfg = &ChipConfig[Index];
> - InitComPhyConfig(PtrChipCfg, LaneData, Index);
> + InitComPhyConfig (PtrChipCfg, LaneData, &ComPhyBoardDesc[Index]);
>
> /* Get the count of the SerDes of the specific chip */
> MaxComphyCount = PtrChipCfg->LanesCount;
> @@ -275,5 +287,9 @@ MvComPhyInit (
> PtrChipCfg->Init (PtrChipCfg);
> }
>
> + BoardDescProtocol->BoardDescFree (ComPhyBoardDesc);
> + FreePool (ChipConfig);
> + FreePool (LaneData);
> +
> return EFI_SUCCESS;
> }
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 18/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (16 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 17/25] Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 21:18 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 19/25] Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support Marcin Wojtas
` (8 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
This patch introduces new library callback (ArmadaSoCDescMdioGet ()),
which dynamically allocates and fills MV_SOC_MDIO_DESC structure with
the SoC description of Mdio controllers.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 34 ++++++++++++++++++++
Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 15 +++++++++
2 files changed, 49 insertions(+)
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index ba44a0c..515ff03 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -72,6 +72,40 @@ ArmadaSoCDescComPhyGet (
}
//
+// Platform description of MDIO controllers
+//
+#define MV_SOC_MDIO_BASE(Cp) MV_SOC_CP_BASE ((Cp)) + 0x12A200
+#define MV_SOC_MDIO_ID(Cp) ((Cp))
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescMdioGet (
+ IN OUT MV_SOC_MDIO_DESC **MdioDesc,
+ IN OUT UINT8 *DescCount
+ )
+{
+ MV_SOC_MDIO_DESC *Desc;
+ UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount);
+ UINT8 CpIndex;
+
+ Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_MDIO_DESC));
+ if (Desc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+ Desc[CpIndex].MdioId = MV_SOC_MDIO_ID (CpIndex);
+ Desc[CpIndex].MdioBaseAddress = MV_SOC_MDIO_BASE (CpIndex);
+ }
+
+ *MdioDesc = Desc;
+ *DescCount = CpCount;
+
+ return EFI_SUCCESS;
+}
+
+//
// Platform description of NonDiscoverableDevices
//
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
index 791d58b..41d9642 100644
--- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -37,6 +37,21 @@ ArmadaSoCDescComPhyGet (
);
//
+// MDIO
+//
+typedef struct {
+ UINT8 MdioId;
+ UINTN MdioBaseAddress;
+} MV_SOC_MDIO_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescMdioGet (
+ IN OUT MV_SOC_MDIO_DESC **MdioDesc,
+ IN OUT UINT8 *DescCount
+ );
+
+//
// NonDiscoverable devices SoC description
//
// AHCI
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 18/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information
2018-06-08 15:34 ` [platforms PATCH 18/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information Marcin Wojtas
@ 2018-06-12 21:18 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 21:18 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:16PM +0200, Marcin Wojtas wrote:
> This patch introduces new library callback (ArmadaSoCDescMdioGet ()),
> which dynamically allocates and fills MV_SOC_MDIO_DESC structure with
> the SoC description of Mdio controllers.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 34 ++++++++++++++++++++
> Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 15 +++++++++
> 2 files changed, 49 insertions(+)
>
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> index ba44a0c..515ff03 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> @@ -72,6 +72,40 @@ ArmadaSoCDescComPhyGet (
> }
>
> //
> +// Platform description of MDIO controllers
> +//
> +#define MV_SOC_MDIO_BASE(Cp) MV_SOC_CP_BASE ((Cp)) + 0x12A200
> +#define MV_SOC_MDIO_ID(Cp) ((Cp))
There appears to be a somewhat unfair distribution of parentheses
between the two lines above. Parentheses don't need to be inside
parentheses in order to retain evaluation order, but arithmetic
operations definitely do.
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescMdioGet (
> + IN OUT MV_SOC_MDIO_DESC **MdioDesc,
> + IN OUT UINT8 *DescCount
UINTN.
> + )
> +{
> + MV_SOC_MDIO_DESC *Desc;
> + UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount);
> + UINT8 CpIndex;
UINTN x2.
(Also, doesn't the coding style ban assignment as part of definition?)
> +
> + Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_MDIO_DESC));
> + if (Desc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> + Desc[CpIndex].MdioId = MV_SOC_MDIO_ID (CpIndex);
> + Desc[CpIndex].MdioBaseAddress = MV_SOC_MDIO_BASE (CpIndex);
> + }
> +
> + *MdioDesc = Desc;
> + *DescCount = CpCount;
> +
> + return EFI_SUCCESS;
> +}
> +
> +//
> // Platform description of NonDiscoverableDevices
> //
>
> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> index 791d58b..41d9642 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> @@ -37,6 +37,21 @@ ArmadaSoCDescComPhyGet (
> );
>
> //
> +// MDIO
> +//
> +typedef struct {
> + UINT8 MdioId;
Use UINTN.
/
Leif
> + UINTN MdioBaseAddress;
> +} MV_SOC_MDIO_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescMdioGet (
> + IN OUT MV_SOC_MDIO_DESC **MdioDesc,
> + IN OUT UINT8 *DescCount
> + );
> +
> +//
> // NonDiscoverable devices SoC description
> //
> // AHCI
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 19/25] Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (17 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 18/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 21:24 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 20/25] Marvell/Drivers: MvMdioDxe: Enable 64bit addressing Marcin Wojtas
` (7 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
Introduce new callback that can provide information
about MDIO controllers to the Mdio driver.
Extend ArmadaBoardDescLib with new structure MV_BOARD_MDIO_DESC,
for holding board specific data.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 37 ++++++++++++++++++++
Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 8 +++++
Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++++
3 files changed, 53 insertions(+)
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index d580319..8f3bdfa 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -96,6 +96,42 @@ MvBoardDescComPhyGet (
STATIC
EFI_STATUS
+MvBoardDescMdioGet (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_MDIO_DESC **MdioDesc
+ )
+{
+ MV_BOARD_MDIO_DESC *BoardDesc;
+ MV_SOC_MDIO_DESC *SoCDesc;
+ EFI_STATUS Status;
+ UINT8 MdioCount;
+ UINTN Index;
+
+ /* Get SoC data about all available MDIO controllers */
+ Status = ArmadaSoCDescMdioGet (&SoCDesc, &MdioCount);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (MdioCount * sizeof (MV_BOARD_MDIO_DESC));
+ if (BoardDesc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ for (Index = 0; Index < MdioCount; Index++) {
+ BoardDesc[Index].SoC = &SoCDesc[Index];
+ }
+
+ BoardDesc->MdioDevCount = MdioCount;
+ *MdioDesc = BoardDesc;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
MvBoardDescAhciGet (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_AHCI_DESC **AhciDesc
@@ -434,6 +470,7 @@ MvBoardDescInitProtocol (
)
{
BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet;
+ BoardDescProtocol->BoardDescMdioGet = MvBoardDescMdioGet;
BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
BoardDescProtocol->BoardDescXhciGet = MvBoardDescXhciGet;
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index 1b56316..5379679 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -28,6 +28,14 @@ typedef struct {
} MV_BOARD_COMPHY_DESC;
//
+// MDIO devices per-board description
+//
+typedef struct {
+ MV_SOC_MDIO_DESC *SoC;
+ UINT8 MdioDevCount;
+} MV_BOARD_MDIO_DESC;
+
+//
// NonDiscoverableDevices per-board description
//
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index 27250db..cff802a 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -50,6 +50,13 @@ EFI_STATUS
typedef
EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_MDIO_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_MDIO_DESC **MdioDesc
+ );
+
+typedef
+EFI_STATUS
(EFIAPI *MV_BOARD_DESC_AHCI_GET) (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_AHCI_DESC **AhciDesc
@@ -91,6 +98,7 @@ VOID
struct _MARVELL_BOARD_DESC_PROTOCOL {
MV_BOARD_DESC_COMPHY_GET BoardDescComPhyGet;
+ MV_BOARD_DESC_MDIO_GET BoardDescMdioGet;
MV_BOARD_DESC_AHCI_GET BoardDescAhciGet;
MV_BOARD_DESC_SDMMC_GET BoardDescSdMmcGet;
MV_BOARD_DESC_XHCI_GET BoardDescXhciGet;
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 19/25] Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support
2018-06-08 15:34 ` [platforms PATCH 19/25] Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support Marcin Wojtas
@ 2018-06-12 21:24 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 21:24 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:17PM +0200, Marcin Wojtas wrote:
> Introduce new callback that can provide information
> about MDIO controllers to the Mdio driver.
>
> Extend ArmadaBoardDescLib with new structure MV_BOARD_MDIO_DESC,
> for holding board specific data.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 37 ++++++++++++++++++++
> Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 8 +++++
> Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++++
> 3 files changed, 53 insertions(+)
>
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> index d580319..8f3bdfa 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> @@ -96,6 +96,42 @@ MvBoardDescComPhyGet (
>
> STATIC
> EFI_STATUS
> +MvBoardDescMdioGet (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_MDIO_DESC **MdioDesc
> + )
> +{
> + MV_BOARD_MDIO_DESC *BoardDesc;
> + MV_SOC_MDIO_DESC *SoCDesc;
> + EFI_STATUS Status;
> + UINT8 MdioCount;
UINTN.
> + UINTN Index;
> +
> + /* Get SoC data about all available MDIO controllers */
> + Status = ArmadaSoCDescMdioGet (&SoCDesc, &MdioCount);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + /* Allocate and fill board description */
> + BoardDesc = AllocateZeroPool (MdioCount * sizeof (MV_BOARD_MDIO_DESC));
> + if (BoardDesc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + for (Index = 0; Index < MdioCount; Index++) {
> + BoardDesc[Index].SoC = &SoCDesc[Index];
> + }
> +
> + BoardDesc->MdioDevCount = MdioCount;
> + *MdioDesc = BoardDesc;
> +
> + return EFI_SUCCESS;
> +}
> +
> +STATIC
> +EFI_STATUS
> MvBoardDescAhciGet (
> IN MARVELL_BOARD_DESC_PROTOCOL *This,
> IN OUT MV_BOARD_AHCI_DESC **AhciDesc
> @@ -434,6 +470,7 @@ MvBoardDescInitProtocol (
> )
> {
> BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet;
> + BoardDescProtocol->BoardDescMdioGet = MvBoardDescMdioGet;
Insert alhabetically.
> BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
> BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
> BoardDescProtocol->BoardDescXhciGet = MvBoardDescXhciGet;
> diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> index 1b56316..5379679 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> @@ -28,6 +28,14 @@ typedef struct {
> } MV_BOARD_COMPHY_DESC;
>
> //
> +// MDIO devices per-board description
> +//
> +typedef struct {
> + MV_SOC_MDIO_DESC *SoC;
> + UINT8 MdioDevCount;
UINTN.
> +} MV_BOARD_MDIO_DESC;
> +
> +//
> // NonDiscoverableDevices per-board description
> //
>
> diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> index 27250db..cff802a 100644
> --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
> +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> @@ -50,6 +50,13 @@ EFI_STATUS
>
> typedef
> EFI_STATUS
> +(EFIAPI *MV_BOARD_DESC_MDIO_GET) (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_MDIO_DESC **MdioDesc
> + );
> +
> +typedef
> +EFI_STATUS
> (EFIAPI *MV_BOARD_DESC_AHCI_GET) (
> IN MARVELL_BOARD_DESC_PROTOCOL *This,
> IN OUT MV_BOARD_AHCI_DESC **AhciDesc
> @@ -91,6 +98,7 @@ VOID
>
> struct _MARVELL_BOARD_DESC_PROTOCOL {
> MV_BOARD_DESC_COMPHY_GET BoardDescComPhyGet;
> + MV_BOARD_DESC_MDIO_GET BoardDescMdioGet;
Insert alphabetically.
/
Leif
> MV_BOARD_DESC_AHCI_GET BoardDescAhciGet;
> MV_BOARD_DESC_SDMMC_GET BoardDescSdMmcGet;
> MV_BOARD_DESC_XHCI_GET BoardDescXhciGet;
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 20/25] Marvell/Drivers: MvMdioDxe: Enable 64bit addressing
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (18 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 19/25] Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-08 15:34 ` [platforms PATCH 21/25] Marvell/Drivers: MvMdioDxe: Switch driver to use MARVELL_BOARD_DESC Marcin Wojtas
` (6 subsequent siblings)
26 siblings, 0 replies; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
In order to be prepared for operating on registers
in 64-bit address space, this patch adjusts the
MDIO controllers base address array.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
index 12aabad..6c0a129 100644
--- a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
+++ b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
@@ -70,7 +70,7 @@ MdioCheckParam (
STATIC
EFI_STATUS
MdioWaitReady (
- UINT32 MdioBase
+ UINTN MdioBase
)
{
UINT32 Timeout = MVEBU_SMI_TIMEOUT;
@@ -92,7 +92,7 @@ MdioWaitReady (
STATIC
EFI_STATUS
MdioWaitValid (
- UINT32 MdioBase
+ UINTN MdioBase
)
{
UINT32 Timeout = MVEBU_SMI_TIMEOUT;
@@ -122,7 +122,7 @@ MdioOperation (
IN OUT UINT32 *Data
)
{
- UINT32 MdioBase = This->BaseAddresses[MdioIndex];
+ UINTN MdioBase = This->BaseAddresses[MdioIndex];
UINT32 MdioReg;
EFI_STATUS Status;
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* [platforms PATCH 21/25] Marvell/Drivers: MvMdioDxe: Switch driver to use MARVELL_BOARD_DESC
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (19 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 20/25] Marvell/Drivers: MvMdioDxe: Enable 64bit addressing Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-08 15:34 ` [platforms PATCH 22/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with I2C information Marcin Wojtas
` (5 subsequent siblings)
26 siblings, 0 replies; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
MvMdioDxe driver used to get Armada7k8k controller description
from hardcoded values stored in the header file MvHwDescLib.h.
As a result it is very hard to support other
Armada SoC families with this driver.
This patch updates the driver, so that it can obtain the
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c | 35 ++++++++++++++++----
Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf | 1 +
Silicon/Marvell/Include/Library/MvHwDescLib.h | 23 -------------
Silicon/Marvell/Include/Protocol/Mdio.h | 4 +--
4 files changed, 31 insertions(+), 32 deletions(-)
diff --git a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
index 6c0a129..72e88bd 100644
--- a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
+++ b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
@@ -32,6 +32,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
+#include <Protocol/BoardDesc.h>
#include <Protocol/DriverBinding.h>
#include <Protocol/Mdio.h>
@@ -46,8 +47,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include "MvMdioDxe.h"
-DECLARE_A7K8K_MDIO_TEMPLATE;
-
STATIC
EFI_STATUS
MdioCheckParam (
@@ -216,24 +215,46 @@ MvMdioDxeInitialise (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
- MVHW_MDIO_DESC *Desc = &mA7k8kMdioDescTemplate;
+ MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+ MV_BOARD_MDIO_DESC *MdioBoardDesc;
UINT8 Index;
MARVELL_MDIO_PROTOCOL *Mdio;
EFI_STATUS Status;
EFI_HANDLE Handle = NULL;
+ /* Obtain list of available controllers */
+ Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+ NULL,
+ (VOID **)&BoardDescProtocol);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = BoardDescProtocol->BoardDescMdioGet (BoardDescProtocol,
+ &MdioBoardDesc);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
Mdio = AllocateZeroPool (sizeof (MARVELL_MDIO_PROTOCOL));
if (Mdio == NULL) {
DEBUG ((DEBUG_ERROR, "MdioDxe: Protocol allocation failed\n"));
return EFI_OUT_OF_RESOURCES;
}
+ Mdio->BaseAddresses = AllocateZeroPool (MdioBoardDesc->MdioDevCount *
+ sizeof (UINTN));
+ if (Mdio->BaseAddresses == NULL) {
+ DEBUG ((DEBUG_ERROR, "MdioDxe: Protocol allocation failed\n"));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
/* Obtain base addresses of all possible controllers */
- for (Index = 0; Index < Desc->MdioDevCount; Index++) {
- Mdio->BaseAddresses[Index] = Desc->MdioBaseAddresses[Index];
+ for (Index = 0; Index < MdioBoardDesc->MdioDevCount; Index++) {
+ Mdio->BaseAddresses[Index] = MdioBoardDesc[Index].SoC->MdioBaseAddress;
}
- Mdio->ControllerCount = Desc->MdioDevCount;
+ Mdio->ControllerCount = MdioBoardDesc->MdioDevCount;
Mdio->Read = MvMdioRead;
Mdio->Write = MvMdioWrite;
@@ -248,5 +269,7 @@ MvMdioDxeInitialise (
return Status;
}
+ BoardDescProtocol->BoardDescFree (MdioBoardDesc);
+
return EFI_SUCCESS;
}
diff --git a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf
index c070785..739576f 100644
--- a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf
+++ b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf
@@ -60,6 +60,7 @@
UefiLib
[Protocols]
+ gMarvellBoardDescProtocolGuid
gMarvellMdioProtocolGuid
[Depex]
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 423ca17..0de435d 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -53,16 +53,6 @@ typedef struct {
} MVHW_I2C_DESC;
//
-// MDIO devices description template definition
-//
-#define MVHW_MAX_MDIO_DEVS 2
-
-typedef struct {
- UINT8 MdioDevCount;
- UINTN MdioBaseAddresses[MVHW_MAX_MDIO_DEVS];
-} MVHW_MDIO_DESC;
-
-//
// Platform description of I2C devices
//
#define MVHW_CP0_I2C0_BASE 0xF2701000
@@ -77,17 +67,4 @@ MVHW_I2C_DESC mA7k8kI2cDescTemplate = {\
{ MVHW_CP0_I2C0_BASE, MVHW_CP0_I2C1_BASE, MVHW_CP1_I2C0_BASE, MVHW_CP1_I2C1_BASE }\
}
-//
-// Platform description of MDIO devices
-//
-#define MVHW_CP0_MDIO_BASE 0xF212A200
-#define MVHW_CP1_MDIO_BASE 0xF412A200
-
-#define DECLARE_A7K8K_MDIO_TEMPLATE \
-STATIC \
-MVHW_MDIO_DESC mA7k8kMdioDescTemplate = {\
- 2,\
- { MVHW_CP0_MDIO_BASE, MVHW_CP1_MDIO_BASE }\
-}
-
#endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Include/Protocol/Mdio.h b/Silicon/Marvell/Include/Protocol/Mdio.h
index d077a8f..076ea26 100644
--- a/Silicon/Marvell/Include/Protocol/Mdio.h
+++ b/Silicon/Marvell/Include/Protocol/Mdio.h
@@ -35,8 +35,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#ifndef __MDIO_H__
#define __MDIO_H__
-#include <Library/MvHwDescLib.h>
-
#define MARVELL_MDIO_PROTOCOL_GUID { 0x40010b03, 0x5f08, 0x496a, { 0xa2, 0x64, 0x10, 0x5e, 0x72, 0xd3, 0x71, 0xaa }}
typedef struct _MARVELL_MDIO_PROTOCOL MARVELL_MDIO_PROTOCOL;
@@ -64,7 +62,7 @@ EFI_STATUS
struct _MARVELL_MDIO_PROTOCOL {
MARVELL_MDIO_READ Read;
MARVELL_MDIO_WRITE Write;
- UINTN BaseAddresses[MVHW_MAX_MDIO_DEVS];
+ UINTN *BaseAddresses;
UINTN ControllerCount;
};
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* [platforms PATCH 22/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with I2C information
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (20 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 21/25] Marvell/Drivers: MvMdioDxe: Switch driver to use MARVELL_BOARD_DESC Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 22:26 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 23/25] Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support Marcin Wojtas
` (4 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
This patch introduces new library callback (ArmadaSoCDescI2cGet ()),
which dynamically allocates and fills MV_SOC_I2C_DESC structure with
the SoC description of I2c controllers.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 38 ++++++++++++++++++++
Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 15 ++++++++
2 files changed, 53 insertions(+)
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index 515ff03..36441c0 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -72,6 +72,44 @@ ArmadaSoCDescComPhyGet (
}
//
+// Platform description of I2C controllers
+//
+#define MV_SOC_I2C_PER_CP_COUNT 2
+#define MV_SOC_I2C_BASE(I2c) (0x701000 + (I2c) * 0x100)
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescI2cGet (
+ IN OUT MV_SOC_I2C_DESC **I2cDesc,
+ IN OUT UINT8 *DescCount
+ )
+{
+ MV_SOC_I2C_DESC *Desc;
+ UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount);
+ UINT8 Index, CpIndex, I2cIndex = 0;
+
+ Desc = AllocateZeroPool (CpCount * MV_SOC_I2C_PER_CP_COUNT *
+ sizeof (MV_SOC_I2C_DESC));
+ if (Desc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+ for (Index = 0; Index < MV_SOC_I2C_PER_CP_COUNT; Index++) {
+ Desc[I2cIndex].I2cBaseAddress =
+ MV_SOC_CP_BASE (CpIndex) + MV_SOC_I2C_BASE (Index);
+ I2cIndex++;
+ }
+ }
+
+ *I2cDesc = Desc;
+ *DescCount = I2cIndex;
+
+ return EFI_SUCCESS;
+}
+
+//
// Platform description of MDIO controllers
//
#define MV_SOC_MDIO_BASE(Cp) MV_SOC_CP_BASE ((Cp)) + 0x12A200
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
index 41d9642..b608c8c 100644
--- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -37,6 +37,21 @@ ArmadaSoCDescComPhyGet (
);
//
+// I2C
+//
+typedef struct {
+ UINT8 I2cId;
+ UINTN I2cBaseAddress;
+} MV_SOC_I2C_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescI2cGet (
+ IN OUT MV_SOC_I2C_DESC **I2cDesc,
+ IN OUT UINT8 *DescCount
+ );
+
+//
// MDIO
//
typedef struct {
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 22/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with I2C information
2018-06-08 15:34 ` [platforms PATCH 22/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with I2C information Marcin Wojtas
@ 2018-06-12 22:26 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 22:26 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:20PM +0200, Marcin Wojtas wrote:
> This patch introduces new library callback (ArmadaSoCDescI2cGet ()),
> which dynamically allocates and fills MV_SOC_I2C_DESC structure with
> the SoC description of I2c controllers.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 38 ++++++++++++++++++++
> Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 15 ++++++++
> 2 files changed, 53 insertions(+)
>
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> index 515ff03..36441c0 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> @@ -72,6 +72,44 @@ ArmadaSoCDescComPhyGet (
> }
>
> //
> +// Platform description of I2C controllers
> +//
> +#define MV_SOC_I2C_PER_CP_COUNT 2
> +#define MV_SOC_I2C_BASE(I2c) (0x701000 + (I2c) * 0x100)
Please add explicit parentheses rather than relying on evaluation order.
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescI2cGet (
> + IN OUT MV_SOC_I2C_DESC **I2cDesc,
> + IN OUT UINT8 *DescCount
> + )
> +{
> + MV_SOC_I2C_DESC *Desc;
> + UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount);
> + UINT8 Index, CpIndex, I2cIndex = 0;
UINTN for count/index.
No assignment on definition?
> +
> + Desc = AllocateZeroPool (CpCount * MV_SOC_I2C_PER_CP_COUNT *
> + sizeof (MV_SOC_I2C_DESC));
> + if (Desc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> + for (Index = 0; Index < MV_SOC_I2C_PER_CP_COUNT; Index++) {
> + Desc[I2cIndex].I2cBaseAddress =
> + MV_SOC_CP_BASE (CpIndex) + MV_SOC_I2C_BASE (Index);
> + I2cIndex++;
> + }
> + }
> +
> + *I2cDesc = Desc;
> + *DescCount = I2cIndex;
Please reformat as for previous patches:
Calculate number of descriptors first, allocate that, and increment
the pointer (after copying the first one into I2cDesc.
> +
> + return EFI_SUCCESS;
> +}
> +
> +//
> // Platform description of MDIO controllers
> //
> #define MV_SOC_MDIO_BASE(Cp) MV_SOC_CP_BASE ((Cp)) + 0x12A200
> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> index 41d9642..b608c8c 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> @@ -37,6 +37,21 @@ ArmadaSoCDescComPhyGet (
> );
>
> //
> +// I2C
> +//
> +typedef struct {
> + UINT8 I2cId;
UINTN.
/
Leif
> + UINTN I2cBaseAddress;
> +} MV_SOC_I2C_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescI2cGet (
> + IN OUT MV_SOC_I2C_DESC **I2cDesc,
> + IN OUT UINT8 *DescCount
> + );
> +
> +//
> // MDIO
> //
> typedef struct {
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 23/25] Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (21 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 22/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with I2C information Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 22:41 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 24/25] Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC Marcin Wojtas
` (3 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
Introduce new callback that can provide information
about I2C controllers to the I2c driver.
Extend ArmadaBoardDescLib with new structure MV_BOARD_I2C_DESC,
for holding board specific data. In further steps it should
be extended and replace PCD I2C devices' representation with the
appropriate structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 62 ++++++++++++++++++++
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 +
Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 11 ++++
Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++
4 files changed, 82 insertions(+)
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index 8f3bdfa..a133085 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -96,6 +96,67 @@ MvBoardDescComPhyGet (
STATIC
EFI_STATUS
+MvBoardDescI2cGet (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_I2C_DESC **I2cDesc
+ )
+{
+ UINT8 *I2cDeviceTable, I2cCount;
+ UINTN I2cDeviceTableSize, I2cIndex, Index;
+ MV_BOARD_I2C_DESC *BoardDesc;
+ MV_SOC_I2C_DESC *SoCDesc;
+ EFI_STATUS Status;
+
+ /* Get SoC data about all available I2C controllers */
+ Status = ArmadaSoCDescI2cGet (&SoCDesc, &I2cCount);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ /* Obtain table with enabled I2C controllers */
+ I2cDeviceTable = (UINT8 *)PcdGetPtr (PcdI2cControllersEnabled);
+ if (I2cDeviceTable == NULL) {
+ /* No I2C on platform */
+ return EFI_SUCCESS;
+ }
+
+ I2cDeviceTableSize = PcdGetSize (PcdI2cControllersEnabled);
+
+ /* Check if PCD with I2C controllers is correctly defined */
+ if (I2cDeviceTableSize > I2cCount) {
+ DEBUG ((DEBUG_ERROR,
+ "%a: Wrong PcdI2cControllersEnabled format\n",
+ __FUNCTION__));
+ return EFI_INVALID_PARAMETER;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (I2cDeviceTableSize * sizeof (MV_BOARD_I2C_DESC));
+ if (BoardDesc == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ I2cIndex = 0;
+ for (Index = 0; Index < I2cDeviceTableSize; Index++) {
+ if (!MVHW_DEV_ENABLED (I2c, Index)) {
+ DEBUG ((DEBUG_INFO, "%a: Skip I2c controller %d\n", __FUNCTION__, Index));
+ continue;
+ }
+
+ BoardDesc[I2cIndex].SoC = &SoCDesc[Index];
+ I2cIndex++;
+ }
+
+ BoardDesc->I2cDevCount = I2cIndex;
+
+ *I2cDesc = BoardDesc;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
MvBoardDescMdioGet (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_MDIO_DESC **MdioDesc
@@ -470,6 +531,7 @@ MvBoardDescInitProtocol (
)
{
BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet;
+ BoardDescProtocol->BoardDescI2cGet = MvBoardDescI2cGet;
BoardDescProtocol->BoardDescMdioGet = MvBoardDescMdioGet;
BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
index 71b7ebd..cc93eba 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -58,6 +58,7 @@
[Pcd]
gMarvellTokenSpaceGuid.PcdComPhyDevices
+ gMarvellTokenSpaceGuid.PcdI2cControllersEnabled
gMarvellTokenSpaceGuid.PcdPp2Controllers
gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
gMarvellTokenSpaceGuid.PcdUtmiPortType
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index 5379679..74361d4 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -28,6 +28,17 @@ typedef struct {
} MV_BOARD_COMPHY_DESC;
//
+// I2C devices per-board description
+//
+// TODO - Extend structure with entire
+// ports description instead of PCDs.
+//
+typedef struct {
+ MV_SOC_I2C_DESC *SoC;
+ UINT8 I2cDevCount;
+} MV_BOARD_I2C_DESC;
+
+//
// MDIO devices per-board description
//
typedef struct {
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index cff802a..0b73d27 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -50,6 +50,13 @@ EFI_STATUS
typedef
EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_I2C_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_I2C_DESC **I2cDesc
+ );
+
+typedef
+EFI_STATUS
(EFIAPI *MV_BOARD_DESC_MDIO_GET) (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_MDIO_DESC **MdioDesc
@@ -98,6 +105,7 @@ VOID
struct _MARVELL_BOARD_DESC_PROTOCOL {
MV_BOARD_DESC_COMPHY_GET BoardDescComPhyGet;
+ MV_BOARD_DESC_I2C_GET BoardDescI2cGet;
MV_BOARD_DESC_MDIO_GET BoardDescMdioGet;
MV_BOARD_DESC_AHCI_GET BoardDescAhciGet;
MV_BOARD_DESC_SDMMC_GET BoardDescSdMmcGet;
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 23/25] Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support
2018-06-08 15:34 ` [platforms PATCH 23/25] Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support Marcin Wojtas
@ 2018-06-12 22:41 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 22:41 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:21PM +0200, Marcin Wojtas wrote:
> Introduce new callback that can provide information
> about I2C controllers to the I2c driver.
>
> Extend ArmadaBoardDescLib with new structure MV_BOARD_I2C_DESC,
> for holding board specific data. In further steps it should
> be extended and replace PCD I2C devices' representation with the
> appropriate structures.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 62 ++++++++++++++++++++
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 +
> Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 11 ++++
> Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++
> 4 files changed, 82 insertions(+)
>
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> index 8f3bdfa..a133085 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> @@ -96,6 +96,67 @@ MvBoardDescComPhyGet (
>
> STATIC
> EFI_STATUS
> +MvBoardDescI2cGet (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_I2C_DESC **I2cDesc
> + )
> +{
> + UINT8 *I2cDeviceTable, I2cCount;
UINTN.
Having gone through this set, this pattern is becoming clearer to me.
But ideally, it would have been obvious from the first instance.
Should not all of these "Tables" be treated simply as enable flags?
Because that's all they seem to be doing.
If you rename this one
I2cDeviceEnabled
...
> + UINTN I2cDeviceTableSize, I2cIndex, Index;
> + MV_BOARD_I2C_DESC *BoardDesc;
> + MV_SOC_I2C_DESC *SoCDesc;
> + EFI_STATUS Status;
> +
> + /* Get SoC data about all available I2C controllers */
> + Status = ArmadaSoCDescI2cGet (&SoCDesc, &I2cCount);
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + /* Obtain table with enabled I2C controllers */
> + I2cDeviceTable = (UINT8 *)PcdGetPtr (PcdI2cControllersEnabled);
> + if (I2cDeviceTable == NULL) {
> + /* No I2C on platform */
> + return EFI_SUCCESS;
> + }
> +
> + I2cDeviceTableSize = PcdGetSize (PcdI2cControllersEnabled);
> +
> + /* Check if PCD with I2C controllers is correctly defined */
> + if (I2cDeviceTableSize > I2cCount) {
> + DEBUG ((DEBUG_ERROR,
> + "%a: Wrong PcdI2cControllersEnabled format\n",
> + __FUNCTION__));
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + /* Allocate and fill board description */
> + BoardDesc = AllocateZeroPool (I2cDeviceTableSize * sizeof (MV_BOARD_I2C_DESC));
> + if (BoardDesc == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + I2cIndex = 0;
> + for (Index = 0; Index < I2cDeviceTableSize; Index++) {
> + if (!MVHW_DEV_ENABLED (I2c, Index)) {
... then this one becomes simply
if (!I2cDeviceEnabled[Index]) {
Please consider making this change throughout the set.
> + DEBUG ((DEBUG_INFO, "%a: Skip I2c controller %d\n", __FUNCTION__, Index));
> + continue;
> + }
> +
> + BoardDesc[I2cIndex].SoC = &SoCDesc[Index];
> + I2cIndex++;
> + }
> +
> + BoardDesc->I2cDevCount = I2cIndex;
> +
> + *I2cDesc = BoardDesc;
> +
> + return EFI_SUCCESS;
> +}
> +
> +STATIC
> +EFI_STATUS
> MvBoardDescMdioGet (
> IN MARVELL_BOARD_DESC_PROTOCOL *This,
> IN OUT MV_BOARD_MDIO_DESC **MdioDesc
> @@ -470,6 +531,7 @@ MvBoardDescInitProtocol (
> )
> {
> BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet;
> + BoardDescProtocol->BoardDescI2cGet = MvBoardDescI2cGet;
> BoardDescProtocol->BoardDescMdioGet = MvBoardDescMdioGet;
> BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
> BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> index 71b7ebd..cc93eba 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> @@ -58,6 +58,7 @@
>
> [Pcd]
> gMarvellTokenSpaceGuid.PcdComPhyDevices
> + gMarvellTokenSpaceGuid.PcdI2cControllersEnabled
Alphabetically ...
> gMarvellTokenSpaceGuid.PcdPp2Controllers
> gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
> gMarvellTokenSpaceGuid.PcdUtmiPortType
> diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> index 5379679..74361d4 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> @@ -28,6 +28,17 @@ typedef struct {
> } MV_BOARD_COMPHY_DESC;
>
> //
> +// I2C devices per-board description
> +//
> +// TODO - Extend structure with entire
> +// ports description instead of PCDs.
Please drop TODO.
> +//
> +typedef struct {
> + MV_SOC_I2C_DESC *SoC;
> + UINT8 I2cDevCount;
UINTN.
(To clarify: this is because the pointer above already forces struct
alignment to the same as UINTN. The only point at which any space
could be saved would be if something with less alignment than UINTN
was placed immediately after it, and even then it would increase code
size for accessing it.)
/
Leif
> +} MV_BOARD_I2C_DESC;
> +
> +//
> // MDIO devices per-board description
> //
> typedef struct {
> diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> index cff802a..0b73d27 100644
> --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
> +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> @@ -50,6 +50,13 @@ EFI_STATUS
>
> typedef
> EFI_STATUS
> +(EFIAPI *MV_BOARD_DESC_I2C_GET) (
> + IN MARVELL_BOARD_DESC_PROTOCOL *This,
> + IN OUT MV_BOARD_I2C_DESC **I2cDesc
> + );
> +
> +typedef
> +EFI_STATUS
> (EFIAPI *MV_BOARD_DESC_MDIO_GET) (
> IN MARVELL_BOARD_DESC_PROTOCOL *This,
> IN OUT MV_BOARD_MDIO_DESC **MdioDesc
> @@ -98,6 +105,7 @@ VOID
>
> struct _MARVELL_BOARD_DESC_PROTOCOL {
> MV_BOARD_DESC_COMPHY_GET BoardDescComPhyGet;
> + MV_BOARD_DESC_I2C_GET BoardDescI2cGet;
> MV_BOARD_DESC_MDIO_GET BoardDescMdioGet;
> MV_BOARD_DESC_AHCI_GET BoardDescAhciGet;
> MV_BOARD_DESC_SDMMC_GET BoardDescSdMmcGet;
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 24/25] Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (22 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 23/25] Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 22:42 ` Leif Lindholm
2018-06-08 15:34 ` [platforms PATCH 25/25] Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency Marcin Wojtas
` (2 subsequent siblings)
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
MvI2cDxe driver used to get Armada7k8k controller description
from hardcoded values stored in the header file MvHwDescLib.h.
As a result it is very hard to support other
Armada SoC families with this driver.
This patch updates the driver, so that it can obtain the
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 37 +++++++++-----------
Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf | 1 +
2 files changed, 18 insertions(+), 20 deletions(-)
diff --git a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
index d6f590d..8694198 100755
--- a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
+++ b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
@@ -32,6 +32,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
+#include <Protocol/BoardDesc.h>
#include <Protocol/I2cMaster.h>
#include <Protocol/I2cEnumerate.h>
#include <Protocol/I2cBusConfigurationManagement.h>
@@ -43,13 +44,10 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include <Library/PcdLib.h>
#include <Library/UefiLib.h>
#include <Library/MemoryAllocationLib.h>
-#include <Library/MvHwDescLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include "MvI2cDxe.h"
-DECLARE_A7K8K_I2C_TEMPLATE;
-
STATIC MV_I2C_BAUD_RATE baud_rate;
STATIC MV_I2C_DEVICE_PATH MvI2cDevicePathProtocol = {
@@ -174,38 +172,37 @@ MvI2cInitialise (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
- MVHW_I2C_DESC *Desc = &mA7k8kI2cDescTemplate;
- UINT8 *I2cDeviceTable, Index;
+ MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+ MV_BOARD_I2C_DESC *Desc;
+ UINT8 Index;
EFI_STATUS Status;
- /* Obtain table with enabled I2c devices */
- I2cDeviceTable = (UINT8 *)PcdGetPtr (PcdI2cControllersEnabled);
- if (I2cDeviceTable == NULL) {
- DEBUG ((DEBUG_ERROR, "Missing PcdI2cControllersEnabled\n"));
- return EFI_INVALID_PARAMETER;
+ /* Obtain list of available controllers */
+ Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+ NULL,
+ (VOID **)&BoardDescProtocol);
+ if (EFI_ERROR (Status)) {
+ return Status;
}
- if (PcdGetSize (PcdI2cControllersEnabled) > MVHW_MAX_I2C_DEVS) {
- DEBUG ((DEBUG_ERROR, "Wrong PcdI2cControllersEnabled format\n"));
- return EFI_INVALID_PARAMETER;
+ Status = BoardDescProtocol->BoardDescI2cGet (BoardDescProtocol, &Desc);
+ if (EFI_ERROR (Status)) {
+ return Status;
}
/* Initialize enabled chips */
- for (Index = 0; Index < PcdGetSize (PcdI2cControllersEnabled); Index++) {
- if (!MVHW_DEV_ENABLED (I2c, Index)) {
- DEBUG ((DEBUG_ERROR, "Skip I2c chip %d\n", Index));
- continue;
- }
-
+ for (Index = 0; Index < Desc->I2cDevCount; Index++) {
Status = MvI2cInitialiseController(
ImageHandle,
SystemTable,
- Desc->I2cBaseAddresses[Index]
+ Desc[Index].SoC->I2cBaseAddress
);
if (EFI_ERROR(Status))
return Status;
}
+ BoardDescProtocol->BoardDescFree (Desc);
+
return EFI_SUCCESS;
}
diff --git a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
index a7cf52e..0eef350 100755
--- a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
+++ b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
@@ -61,6 +61,7 @@
gEfiDevicePathProtocolGuid
gEfiI2cEnumerateProtocolGuid
gEfiI2cBusConfigurationManagementProtocolGuid
+ gMarvellBoardDescProtocolGuid
[Pcd]
gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 24/25] Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC
2018-06-08 15:34 ` [platforms PATCH 24/25] Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC Marcin Wojtas
@ 2018-06-12 22:42 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 22:42 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:22PM +0200, Marcin Wojtas wrote:
> MvI2cDxe driver used to get Armada7k8k controller description
> from hardcoded values stored in the header file MvHwDescLib.h.
> As a result it is very hard to support other
> Armada SoC families with this driver.
>
> This patch updates the driver, so that it can obtain the
> description from newly introduced MARVELL_BOARD_DESC protocol,
> and removes the dependency on the hardcoded structures.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 37 +++++++++-----------
> Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf | 1 +
> 2 files changed, 18 insertions(+), 20 deletions(-)
>
> diff --git a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
> index d6f590d..8694198 100755
> --- a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
> +++ b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
> @@ -32,6 +32,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>
> *******************************************************************************/
>
> +#include <Protocol/BoardDesc.h>
> #include <Protocol/I2cMaster.h>
> #include <Protocol/I2cEnumerate.h>
> #include <Protocol/I2cBusConfigurationManagement.h>
> @@ -43,13 +44,10 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> #include <Library/PcdLib.h>
> #include <Library/UefiLib.h>
> #include <Library/MemoryAllocationLib.h>
> -#include <Library/MvHwDescLib.h>
> #include <Library/UefiBootServicesTableLib.h>
>
> #include "MvI2cDxe.h"
>
> -DECLARE_A7K8K_I2C_TEMPLATE;
> -
> STATIC MV_I2C_BAUD_RATE baud_rate;
>
> STATIC MV_I2C_DEVICE_PATH MvI2cDevicePathProtocol = {
> @@ -174,38 +172,37 @@ MvI2cInitialise (
> IN EFI_SYSTEM_TABLE *SystemTable
> )
> {
> - MVHW_I2C_DESC *Desc = &mA7k8kI2cDescTemplate;
> - UINT8 *I2cDeviceTable, Index;
> + MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
> + MV_BOARD_I2C_DESC *Desc;
> + UINT8 Index;
UINTN.
/
Leif
> EFI_STATUS Status;
>
> - /* Obtain table with enabled I2c devices */
> - I2cDeviceTable = (UINT8 *)PcdGetPtr (PcdI2cControllersEnabled);
> - if (I2cDeviceTable == NULL) {
> - DEBUG ((DEBUG_ERROR, "Missing PcdI2cControllersEnabled\n"));
> - return EFI_INVALID_PARAMETER;
> + /* Obtain list of available controllers */
> + Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
> + NULL,
> + (VOID **)&BoardDescProtocol);
> + if (EFI_ERROR (Status)) {
> + return Status;
> }
>
> - if (PcdGetSize (PcdI2cControllersEnabled) > MVHW_MAX_I2C_DEVS) {
> - DEBUG ((DEBUG_ERROR, "Wrong PcdI2cControllersEnabled format\n"));
> - return EFI_INVALID_PARAMETER;
> + Status = BoardDescProtocol->BoardDescI2cGet (BoardDescProtocol, &Desc);
> + if (EFI_ERROR (Status)) {
> + return Status;
> }
>
> /* Initialize enabled chips */
> - for (Index = 0; Index < PcdGetSize (PcdI2cControllersEnabled); Index++) {
> - if (!MVHW_DEV_ENABLED (I2c, Index)) {
> - DEBUG ((DEBUG_ERROR, "Skip I2c chip %d\n", Index));
> - continue;
> - }
> -
> + for (Index = 0; Index < Desc->I2cDevCount; Index++) {
> Status = MvI2cInitialiseController(
> ImageHandle,
> SystemTable,
> - Desc->I2cBaseAddresses[Index]
> + Desc[Index].SoC->I2cBaseAddress
> );
> if (EFI_ERROR(Status))
> return Status;
> }
>
> + BoardDescProtocol->BoardDescFree (Desc);
> +
> return EFI_SUCCESS;
> }
>
> diff --git a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
> index a7cf52e..0eef350 100755
> --- a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
> +++ b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
> @@ -61,6 +61,7 @@
> gEfiDevicePathProtocolGuid
> gEfiI2cEnumerateProtocolGuid
> gEfiI2cBusConfigurationManagementProtocolGuid
> + gMarvellBoardDescProtocolGuid
>
> [Pcd]
> gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* [platforms PATCH 25/25] Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (23 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 24/25] Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC Marcin Wojtas
@ 2018-06-08 15:34 ` Marcin Wojtas
2018-06-12 22:44 ` Leif Lindholm
2018-06-11 11:00 ` [platforms PATCH 00/25] Armada herdware description rework Ard Biesheuvel
2018-06-12 22:48 ` Leif Lindholm
26 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-08 15:34 UTC (permalink / raw)
To: edk2-devel; +Cc: leif.lindholm, ard.biesheuvel, nadavh, jinghua, mw, jsd, jaz
Finally, after switching to new MV_BOARD_DESC solution
in all drivers, stop using MvHwDescLib.h by its last user
and safely remove this header.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c | 3 +-
Silicon/Marvell/Include/Library/MvHwDescLib.h | 70 --------------------
2 files changed, 1 insertion(+), 72 deletions(-)
diff --git a/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c b/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
index dd2edae..3deb286 100644
--- a/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
+++ b/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
@@ -41,7 +41,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>
-#include <Library/MvHwDescLib.h>
#include <Library/PcdLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiLib.h>
@@ -380,7 +379,7 @@ MvPhyInit (
MdioIndex = Phy2MdioController[PhyIndex];
/* Verify correctness of PHY <-> MDIO assignment */
- if (!MVHW_DEV_ENABLED (Mdio, MdioIndex) || MdioIndex >= Mdio->ControllerCount) {
+ if (MdioDeviceTable[MdioIndex] == 0 || MdioIndex >= Mdio->ControllerCount) {
DEBUG ((DEBUG_ERROR, "MvPhyDxe: Incorrect Mdio controller assignment for PHY#%d", PhyIndex));
return EFI_INVALID_PARAMETER;
}
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
deleted file mode 100644
index 0de435d..0000000
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/********************************************************************************
-Copyright (C) 2017 Marvell International Ltd.
-
-Marvell BSD License Option
-
-If you received this File from Marvell, you may opt to use, redistribute and/or
-modify this File under the following licensing terms.
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-
-* Neither the name of Marvell nor the names of its contributors may be
- used to endorse or promote products derived from this software without
- specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
-ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-*******************************************************************************/
-
-#ifndef __MVHWDESCLIB_H__
-#define __MVHWDESCLIB_H__
-
-//
-// Helper macros
-//
-
-// Check if device is enabled - it expects PCD to be read to '<type>DeviceTable' array
-#define MVHW_DEV_ENABLED(type, index) (type ## DeviceTable[index])
-
-//
-// I2C devices description template definition
-//
-#define MVHW_MAX_I2C_DEVS 4
-
-typedef struct {
- UINT8 I2cDevCount;
- UINTN I2cBaseAddresses[MVHW_MAX_I2C_DEVS];
-} MVHW_I2C_DESC;
-
-//
-// Platform description of I2C devices
-//
-#define MVHW_CP0_I2C0_BASE 0xF2701000
-#define MVHW_CP0_I2C1_BASE 0xF2701100
-#define MVHW_CP1_I2C0_BASE 0xF4701000
-#define MVHW_CP1_I2C1_BASE 0xF4701100
-
-#define DECLARE_A7K8K_I2C_TEMPLATE \
-STATIC \
-MVHW_I2C_DESC mA7k8kI2cDescTemplate = {\
- 4,\
- { MVHW_CP0_I2C0_BASE, MVHW_CP0_I2C1_BASE, MVHW_CP1_I2C0_BASE, MVHW_CP1_I2C1_BASE }\
-}
-
-#endif /* __MVHWDESCLIB_H__ */
--
2.7.4
^ permalink raw reply related [flat|nested] 50+ messages in thread* Re: [platforms PATCH 25/25] Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency
2018-06-08 15:34 ` [platforms PATCH 25/25] Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency Marcin Wojtas
@ 2018-06-12 22:44 ` Leif Lindholm
0 siblings, 0 replies; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 22:44 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
On Fri, Jun 08, 2018 at 05:34:23PM +0200, Marcin Wojtas wrote:
> Finally, after switching to new MV_BOARD_DESC solution
> in all drivers, stop using MvHwDescLib.h by its last user
> and safely remove this header.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> Reviewed-by: Hua Jing <jinghua@marvell.com>
> ---
> Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c | 3 +-
> Silicon/Marvell/Include/Library/MvHwDescLib.h | 70 --------------------
> 2 files changed, 1 insertion(+), 72 deletions(-)
>
> diff --git a/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c b/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
> index dd2edae..3deb286 100644
> --- a/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
> +++ b/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
> @@ -41,7 +41,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> #include <Library/DebugLib.h>
> #include <Library/IoLib.h>
> #include <Library/MemoryAllocationLib.h>
> -#include <Library/MvHwDescLib.h>
> #include <Library/PcdLib.h>
> #include <Library/UefiBootServicesTableLib.h>
> #include <Library/UefiLib.h>
> @@ -380,7 +379,7 @@ MvPhyInit (
> MdioIndex = Phy2MdioController[PhyIndex];
>
> /* Verify correctness of PHY <-> MDIO assignment */
> - if (!MVHW_DEV_ENABLED (Mdio, MdioIndex) || MdioIndex >= Mdio->ControllerCount) {
> + if (MdioDeviceTable[MdioIndex] == 0 || MdioIndex >= Mdio->ControllerCount) {
> DEBUG ((DEBUG_ERROR, "MvPhyDxe: Incorrect Mdio controller assignment for PHY#%d", PhyIndex));
I think I already commented on lack of parentheses - just keep those
added ones.
/
Leif
> return EFI_INVALID_PARAMETER;
> }
> diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
> deleted file mode 100644
> index 0de435d..0000000
> --- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
> +++ /dev/null
> @@ -1,70 +0,0 @@
> -/********************************************************************************
> -Copyright (C) 2017 Marvell International Ltd.
> -
> -Marvell BSD License Option
> -
> -If you received this File from Marvell, you may opt to use, redistribute and/or
> -modify this File under the following licensing terms.
> -Redistribution and use in source and binary forms, with or without modification,
> -are permitted provided that the following conditions are met:
> -
> -* Redistributions of source code must retain the above copyright notice,
> - this list of conditions and the following disclaimer.
> -
> -* Redistributions in binary form must reproduce the above copyright
> - notice, this list of conditions and the following disclaimer in the
> - documentation and/or other materials provided with the distribution.
> -
> -* Neither the name of Marvell nor the names of its contributors may be
> - used to endorse or promote products derived from this software without
> - specific prior written permission.
> -
> -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
> -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
> -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
> -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> -
> -*******************************************************************************/
> -
> -#ifndef __MVHWDESCLIB_H__
> -#define __MVHWDESCLIB_H__
> -
> -//
> -// Helper macros
> -//
> -
> -// Check if device is enabled - it expects PCD to be read to '<type>DeviceTable' array
> -#define MVHW_DEV_ENABLED(type, index) (type ## DeviceTable[index])
> -
> -//
> -// I2C devices description template definition
> -//
> -#define MVHW_MAX_I2C_DEVS 4
> -
> -typedef struct {
> - UINT8 I2cDevCount;
> - UINTN I2cBaseAddresses[MVHW_MAX_I2C_DEVS];
> -} MVHW_I2C_DESC;
> -
> -//
> -// Platform description of I2C devices
> -//
> -#define MVHW_CP0_I2C0_BASE 0xF2701000
> -#define MVHW_CP0_I2C1_BASE 0xF2701100
> -#define MVHW_CP1_I2C0_BASE 0xF4701000
> -#define MVHW_CP1_I2C1_BASE 0xF4701100
> -
> -#define DECLARE_A7K8K_I2C_TEMPLATE \
> -STATIC \
> -MVHW_I2C_DESC mA7k8kI2cDescTemplate = {\
> - 4,\
> - { MVHW_CP0_I2C0_BASE, MVHW_CP0_I2C1_BASE, MVHW_CP1_I2C0_BASE, MVHW_CP1_I2C1_BASE }\
> -}
> -
> -#endif /* __MVHWDESCLIB_H__ */
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [platforms PATCH 00/25] Armada herdware description rework
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (24 preceding siblings ...)
2018-06-08 15:34 ` [platforms PATCH 25/25] Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency Marcin Wojtas
@ 2018-06-11 11:00 ` Ard Biesheuvel
2018-06-11 11:49 ` Marcin Wojtas
2018-06-12 22:48 ` Leif Lindholm
26 siblings, 1 reply; 50+ messages in thread
From: Ard Biesheuvel @ 2018-06-11 11:00 UTC (permalink / raw)
To: Marcin Wojtas
Cc: edk2-devel@lists.01.org, Leif Lindholm, Nadav Haklai, Hua Jing,
Jan Dąbroś, Grzegorz Jaszczyk
Marcin,
I am a bit reluctant to review another huge set of Armada patches
while we are still waiting for MacchiatoBin support to land. The only
hardware i have access to is MacchiatoBin, and it has been well over a
year now that MacchiatoBin support has been between 'under
construction' and 'about to land any day now'.
The patches in this series actually carry traces of McBin support,
which suggests to me that they were taken from an internal tree that
does support MacchiatoBin, but it has been removed. What is that
about?
edk2-platforms is not intended as a baseline for Marvell customers to
base their private trees on, we actually prefer code that runs on
systems that are widely available (such as MacchiatoBin)
Thanks,
Ard.
On 8 June 2018 at 17:33, Marcin Wojtas <mw@semihalf.com> wrote:
> Hi,
>
> This big patchset reworks handling of the SoC and Boards' description
> to the final version. Hitherto mechanism of hardcoded structures
> and parsing PCDs inside the drivers was unfortunate - it didn't
> allow to support different SoC families with different number
> of controllers or base addresses.
>
> The main concept is introducing a hardware description layer
> with the new protocol, which is responsible for providing
> data to the consumer platforms drivers. Additionally a new
> SoC and Board description libraries allow to move information
> from overly used PCDs to C code in an organized manner:
>
> ArmadaSoCDescLib + ArmadaBoardDescLib
> (per SoC family) (per Board, in next steps more of description
> | of ComPhy, Mpp and others can go there)
> | |
> | |
> |-> MV_BOARD_DESC <-|
> |
> |
> |
> Driver/Library (e.g. ComPhy, I2c, Pp2Dxe)
>
> Please don't be discouraged by big amount of patches,
> they are sort of repeatable: update protocol, libraries and
> the consumer drivers/libraries until the MvHwDescLib.h
> header could be completely removed. More details can
> be found in the commit logs.
>
> The patches are available in the github:
> https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/boarddesc-upstream-r20180608
>
> I'm looking forward to review and any comments/remarks.
>
> Best regards,
> Marcin
>
> Marcin Wojtas (21):
> Marvell/Library: Introduce ArmadaBoardDescLib class
> Marvell/Library: UtmiPhyLib: Switch to use MARVELL_BOARD_DESC protocol
> Marvell/Library: RealTimeClockLib: Simplify obtaining base address
> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information
> Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support
> Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol
> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI
> Marvell/Drivers: MvBoardDesc: Extend protocol with AHCI/SDMMC/XHCI
> Marvell/Drivers: NonDiscoverable: Switch to use MARVELL_BOARD_DESC
> Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC
> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information
> Marvell/Drivers: MvBoardDesc: Extend protocol with COMPHY support
> Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC
> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information
> Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support
> Marvell/Drivers: MvMdioDxe: Enable 64bit addressing
> Marvell/Drivers: MvMdioDxe: Switch driver to use MARVELL_BOARD_DESC
> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with I2C information
> Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support
> Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC
> Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency
>
> jinghua (4):
> Marvell/Library: Introduce ArmadaSoCDescLib class
> Marvell: Introduce MARVELL_BOARD_DESC_PROTOCOL
> Marvell/Drivers: MvBoardDescDxe: Introduce board description driver
> Marvell/Armada7k8k: Enable board description driver compilation
>
> Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 2 +-
> Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 1 +
> Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 2 +
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 2 -
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 338 ++++++++++++
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf | 37 ++
> Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c | 29 +-
> Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf | 2 +-
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 573 ++++++++++++++++++++
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h | 59 ++
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 70 +++
> Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 37 +-
> Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf | 1 +
> Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c | 41 +-
> Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf | 1 +
> Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c | 3 +-
> Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 43 +-
> Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 2 +-
> Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c | 100 ++--
> Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf | 6 +-
> Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 99 ++++
> Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 146 +++++
> Silicon/Marvell/Include/Library/MvHwDescLib.h | 290 ----------
> Silicon/Marvell/Include/Library/UtmiPhyLib.h | 2 +
> Silicon/Marvell/Include/Protocol/BoardDesc.h | 118 ++++
> Silicon/Marvell/Include/Protocol/Mdio.h | 4 +-
> Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c | 50 +-
> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c | 74 ++-
> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h | 4 +
> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf | 6 +-
> Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c | 65 +--
> Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h | 5 +
> Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf | 9 +-
> Silicon/Marvell/Marvell.dec | 8 +-
> 34 files changed, 1694 insertions(+), 535 deletions(-)
> create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
> create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
> create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> create mode 100644 Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> create mode 100644 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> delete mode 100644 Silicon/Marvell/Include/Library/MvHwDescLib.h
> create mode 100644 Silicon/Marvell/Include/Protocol/BoardDesc.h
>
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread* Re: [platforms PATCH 00/25] Armada herdware description rework
2018-06-11 11:00 ` [platforms PATCH 00/25] Armada herdware description rework Ard Biesheuvel
@ 2018-06-11 11:49 ` Marcin Wojtas
2018-06-11 12:01 ` Ard Biesheuvel
0 siblings, 1 reply; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-11 11:49 UTC (permalink / raw)
To: Ard Biesheuvel
Cc: edk2-devel@lists.01.org, Leif Lindholm, Nadav Haklai, Hua Jing,
Jan Dąbroś, Grzegorz Jaszczyk
Hi Ard,
2018-06-11 13:00 GMT+02:00 Ard Biesheuvel <ard.biesheuvel@linaro.org>:
> Marcin,
>
> I am a bit reluctant to review another huge set of Armada patches
> while we are still waiting for MacchiatoBin support to land. The only
> hardware i have access to is MacchiatoBin, and it has been well over a
> year now that MacchiatoBin support has been between 'under
> construction' and 'about to land any day now'.
>
> The patches in this series actually carry traces of McBin support,
> which suggests to me that they were taken from an internal tree that
> does support MacchiatoBin, but it has been removed. What is that
> about?
MacchiatoBin addition is on top of those patches in the branch I
prepared solely for upstream. Anyway, I understand your point and
let's skip this big patchset for now. I will submit support for other
boards, once it's accepted, let's return to this one.
Best regards,
Marcin
>
> edk2-platforms is not intended as a baseline for Marvell customers to
> base their private trees on, we actually prefer code that runs on
> systems that are widely available (such as MacchiatoBin)
>
> Thanks,
> Ard.
>
>
> On 8 June 2018 at 17:33, Marcin Wojtas <mw@semihalf.com> wrote:
>> Hi,
>>
>> This big patchset reworks handling of the SoC and Boards' description
>> to the final version. Hitherto mechanism of hardcoded structures
>> and parsing PCDs inside the drivers was unfortunate - it didn't
>> allow to support different SoC families with different number
>> of controllers or base addresses.
>>
>> The main concept is introducing a hardware description layer
>> with the new protocol, which is responsible for providing
>> data to the consumer platforms drivers. Additionally a new
>> SoC and Board description libraries allow to move information
>> from overly used PCDs to C code in an organized manner:
>>
>> ArmadaSoCDescLib + ArmadaBoardDescLib
>> (per SoC family) (per Board, in next steps more of description
>> | of ComPhy, Mpp and others can go there)
>> | |
>> | |
>> |-> MV_BOARD_DESC <-|
>> |
>> |
>> |
>> Driver/Library (e.g. ComPhy, I2c, Pp2Dxe)
>>
>> Please don't be discouraged by big amount of patches,
>> they are sort of repeatable: update protocol, libraries and
>> the consumer drivers/libraries until the MvHwDescLib.h
>> header could be completely removed. More details can
>> be found in the commit logs.
>>
>> The patches are available in the github:
>> https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/boarddesc-upstream-r20180608
>>
>> I'm looking forward to review and any comments/remarks.
>>
>> Best regards,
>> Marcin
>>
>> Marcin Wojtas (21):
>> Marvell/Library: Introduce ArmadaBoardDescLib class
>> Marvell/Library: UtmiPhyLib: Switch to use MARVELL_BOARD_DESC protocol
>> Marvell/Library: RealTimeClockLib: Simplify obtaining base address
>> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information
>> Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support
>> Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol
>> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI
>> Marvell/Drivers: MvBoardDesc: Extend protocol with AHCI/SDMMC/XHCI
>> Marvell/Drivers: NonDiscoverable: Switch to use MARVELL_BOARD_DESC
>> Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC
>> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information
>> Marvell/Drivers: MvBoardDesc: Extend protocol with COMPHY support
>> Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC
>> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information
>> Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support
>> Marvell/Drivers: MvMdioDxe: Enable 64bit addressing
>> Marvell/Drivers: MvMdioDxe: Switch driver to use MARVELL_BOARD_DESC
>> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with I2C information
>> Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support
>> Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC
>> Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency
>>
>> jinghua (4):
>> Marvell/Library: Introduce ArmadaSoCDescLib class
>> Marvell: Introduce MARVELL_BOARD_DESC_PROTOCOL
>> Marvell/Drivers: MvBoardDescDxe: Introduce board description driver
>> Marvell/Armada7k8k: Enable board description driver compilation
>>
>> Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 2 +-
>> Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 1 +
>> Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 2 +
>> Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 2 -
>> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 338 ++++++++++++
>> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf | 37 ++
>> Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c | 29 +-
>> Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf | 2 +-
>> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 573 ++++++++++++++++++++
>> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h | 59 ++
>> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 70 +++
>> Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 37 +-
>> Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf | 1 +
>> Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c | 41 +-
>> Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf | 1 +
>> Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c | 3 +-
>> Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 43 +-
>> Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 2 +-
>> Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c | 100 ++--
>> Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf | 6 +-
>> Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 99 ++++
>> Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 146 +++++
>> Silicon/Marvell/Include/Library/MvHwDescLib.h | 290 ----------
>> Silicon/Marvell/Include/Library/UtmiPhyLib.h | 2 +
>> Silicon/Marvell/Include/Protocol/BoardDesc.h | 118 ++++
>> Silicon/Marvell/Include/Protocol/Mdio.h | 4 +-
>> Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c | 50 +-
>> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c | 74 ++-
>> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h | 4 +
>> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf | 6 +-
>> Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c | 65 +--
>> Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h | 5 +
>> Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf | 9 +-
>> Silicon/Marvell/Marvell.dec | 8 +-
>> 34 files changed, 1694 insertions(+), 535 deletions(-)
>> create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
>> create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
>> create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
>> create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
>> create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
>> create mode 100644 Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
>> create mode 100644 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
>> delete mode 100644 Silicon/Marvell/Include/Library/MvHwDescLib.h
>> create mode 100644 Silicon/Marvell/Include/Protocol/BoardDesc.h
>>
>> --
>> 2.7.4
>>
^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [platforms PATCH 00/25] Armada herdware description rework
2018-06-11 11:49 ` Marcin Wojtas
@ 2018-06-11 12:01 ` Ard Biesheuvel
2018-06-11 12:04 ` Marcin Wojtas
0 siblings, 1 reply; 50+ messages in thread
From: Ard Biesheuvel @ 2018-06-11 12:01 UTC (permalink / raw)
To: Marcin Wojtas
Cc: edk2-devel@lists.01.org, Leif Lindholm, Nadav Haklai, Hua Jing,
Jan Dąbroś, Grzegorz Jaszczyk
On 11 June 2018 at 13:49, Marcin Wojtas <mw@semihalf.com> wrote:
> Hi Ard,
>
> 2018-06-11 13:00 GMT+02:00 Ard Biesheuvel <ard.biesheuvel@linaro.org>:
>> Marcin,
>>
>> I am a bit reluctant to review another huge set of Armada patches
>> while we are still waiting for MacchiatoBin support to land. The only
>> hardware i have access to is MacchiatoBin, and it has been well over a
>> year now that MacchiatoBin support has been between 'under
>> construction' and 'about to land any day now'.
>>
>> The patches in this series actually carry traces of McBin support,
>> which suggests to me that they were taken from an internal tree that
>> does support MacchiatoBin, but it has been removed. What is that
>> about?
>
> MacchiatoBin addition is on top of those patches in the branch I
> prepared solely for upstream. Anyway, I understand your point and
> let's skip this big patchset for now. I will submit support for other
> boards, once it's accepted, let's return to this one.
>
Patch 5/25:
"""
From: jinghua <jinghua@marvell.com>
This patch enables compilation of MvBoardDescDxe driver for
Armada70x0-DB, Armada80x0-DB and Armada80x0McBin.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: jinghua <jinghua@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
"""
So this patch clearly contained MacchiatoBin support at some point,
but you removed it before upstreaming the patch. That really makes me
sad.
BTW can you please drop the @marvell.com Reviewed-by tags, and add
your own Signed-off-by to patches that you did not author yourself?
^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [platforms PATCH 00/25] Armada herdware description rework
2018-06-11 12:01 ` Ard Biesheuvel
@ 2018-06-11 12:04 ` Marcin Wojtas
0 siblings, 0 replies; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-11 12:04 UTC (permalink / raw)
To: Ard Biesheuvel
Cc: edk2-devel@lists.01.org, Leif Lindholm, Nadav Haklai, Hua Jing,
Jan Dąbroś, Grzegorz Jaszczyk
Hi Ard,
2018-06-11 14:01 GMT+02:00 Ard Biesheuvel <ard.biesheuvel@linaro.org>:
> On 11 June 2018 at 13:49, Marcin Wojtas <mw@semihalf.com> wrote:
>> Hi Ard,
>>
>> 2018-06-11 13:00 GMT+02:00 Ard Biesheuvel <ard.biesheuvel@linaro.org>:
>>> Marcin,
>>>
>>> I am a bit reluctant to review another huge set of Armada patches
>>> while we are still waiting for MacchiatoBin support to land. The only
>>> hardware i have access to is MacchiatoBin, and it has been well over a
>>> year now that MacchiatoBin support has been between 'under
>>> construction' and 'about to land any day now'.
>>>
>>> The patches in this series actually carry traces of McBin support,
>>> which suggests to me that they were taken from an internal tree that
>>> does support MacchiatoBin, but it has been removed. What is that
>>> about?
>>
>> MacchiatoBin addition is on top of those patches in the branch I
>> prepared solely for upstream. Anyway, I understand your point and
>> let's skip this big patchset for now. I will submit support for other
>> boards, once it's accepted, let's return to this one.
>>
>
>
> Patch 5/25:
>
> """
> From: jinghua <jinghua@marvell.com>
>
> This patch enables compilation of MvBoardDescDxe driver for
> Armada70x0-DB, Armada80x0-DB and Armada80x0McBin.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: jinghua <jinghua@marvell.com>
> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
> """
>
> So this patch clearly contained MacchiatoBin support at some point,
> but you removed it before upstreaming the patch. That really makes me
> sad.
Yes, I inverted the order of the patches when cleaning the branch. I
wanted to add the whole new boards support in a minimal possible way,
but that clearly wasn't best idea. Nvm, I'll submit new board now.
>
> BTW can you please drop the @marvell.com Reviewed-by tags, and add
> your own Signed-off-by to patches that you did not author yourself?
Sure will do.
Thanks,
Marcin
^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [platforms PATCH 00/25] Armada herdware description rework
2018-06-08 15:33 [platforms PATCH 00/25] Armada herdware description rework Marcin Wojtas
` (25 preceding siblings ...)
2018-06-11 11:00 ` [platforms PATCH 00/25] Armada herdware description rework Ard Biesheuvel
@ 2018-06-12 22:48 ` Leif Lindholm
2018-06-13 7:40 ` Marcin Wojtas
26 siblings, 1 reply; 50+ messages in thread
From: Leif Lindholm @ 2018-06-12 22:48 UTC (permalink / raw)
To: Marcin Wojtas; +Cc: edk2-devel, ard.biesheuvel, nadavh, jinghua, jsd, jaz
So, I've made all the comments I was going to be making on this set.
Patches 3,5-7,13,20-21 are fine as long as you drop pre-existing
Signed-off-by and Reviewed-by, so if you get rid of those you can add
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
when reposting.
(If any patch apart from the above didn't receive feedback I've
fumbled and please let me know.)
Regards,
Leif
On Fri, Jun 08, 2018 at 05:33:58PM +0200, Marcin Wojtas wrote:
> Hi,
>
> This big patchset reworks handling of the SoC and Boards' description
> to the final version. Hitherto mechanism of hardcoded structures
> and parsing PCDs inside the drivers was unfortunate - it didn't
> allow to support different SoC families with different number
> of controllers or base addresses.
>
> The main concept is introducing a hardware description layer
> with the new protocol, which is responsible for providing
> data to the consumer platforms drivers. Additionally a new
> SoC and Board description libraries allow to move information
> from overly used PCDs to C code in an organized manner:
>
> ArmadaSoCDescLib + ArmadaBoardDescLib
> (per SoC family) (per Board, in next steps more of description
> | of ComPhy, Mpp and others can go there)
> | |
> | |
> |-> MV_BOARD_DESC <-|
> |
> |
> |
> Driver/Library (e.g. ComPhy, I2c, Pp2Dxe)
>
> Please don't be discouraged by big amount of patches,
> they are sort of repeatable: update protocol, libraries and
> the consumer drivers/libraries until the MvHwDescLib.h
> header could be completely removed. More details can
> be found in the commit logs.
>
> The patches are available in the github:
> https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/boarddesc-upstream-r20180608
>
> I'm looking forward to review and any comments/remarks.
>
> Best regards,
> Marcin
>
> Marcin Wojtas (21):
> Marvell/Library: Introduce ArmadaBoardDescLib class
> Marvell/Library: UtmiPhyLib: Switch to use MARVELL_BOARD_DESC protocol
> Marvell/Library: RealTimeClockLib: Simplify obtaining base address
> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information
> Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support
> Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol
> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI
> Marvell/Drivers: MvBoardDesc: Extend protocol with AHCI/SDMMC/XHCI
> Marvell/Drivers: NonDiscoverable: Switch to use MARVELL_BOARD_DESC
> Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC
> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information
> Marvell/Drivers: MvBoardDesc: Extend protocol with COMPHY support
> Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC
> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information
> Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support
> Marvell/Drivers: MvMdioDxe: Enable 64bit addressing
> Marvell/Drivers: MvMdioDxe: Switch driver to use MARVELL_BOARD_DESC
> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with I2C information
> Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support
> Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC
> Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency
>
> jinghua (4):
> Marvell/Library: Introduce ArmadaSoCDescLib class
> Marvell: Introduce MARVELL_BOARD_DESC_PROTOCOL
> Marvell/Drivers: MvBoardDescDxe: Introduce board description driver
> Marvell/Armada7k8k: Enable board description driver compilation
>
> Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 2 +-
> Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 1 +
> Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 2 +
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 2 -
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 338 ++++++++++++
> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf | 37 ++
> Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c | 29 +-
> Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf | 2 +-
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 573 ++++++++++++++++++++
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h | 59 ++
> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 70 +++
> Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 37 +-
> Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf | 1 +
> Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c | 41 +-
> Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf | 1 +
> Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c | 3 +-
> Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 43 +-
> Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 2 +-
> Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c | 100 ++--
> Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf | 6 +-
> Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 99 ++++
> Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 146 +++++
> Silicon/Marvell/Include/Library/MvHwDescLib.h | 290 ----------
> Silicon/Marvell/Include/Library/UtmiPhyLib.h | 2 +
> Silicon/Marvell/Include/Protocol/BoardDesc.h | 118 ++++
> Silicon/Marvell/Include/Protocol/Mdio.h | 4 +-
> Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c | 50 +-
> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c | 74 ++-
> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h | 4 +
> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf | 6 +-
> Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c | 65 +--
> Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h | 5 +
> Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf | 9 +-
> Silicon/Marvell/Marvell.dec | 8 +-
> 34 files changed, 1694 insertions(+), 535 deletions(-)
> create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
> create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
> create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> create mode 100644 Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> create mode 100644 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> delete mode 100644 Silicon/Marvell/Include/Library/MvHwDescLib.h
> create mode 100644 Silicon/Marvell/Include/Protocol/BoardDesc.h
>
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 50+ messages in thread* Re: [platforms PATCH 00/25] Armada herdware description rework
2018-06-12 22:48 ` Leif Lindholm
@ 2018-06-13 7:40 ` Marcin Wojtas
0 siblings, 0 replies; 50+ messages in thread
From: Marcin Wojtas @ 2018-06-13 7:40 UTC (permalink / raw)
To: Leif Lindholm
Cc: edk2-devel-01, Ard Biesheuvel, nadavh, Hua Jing,
semihalf-dabros-jan, Grzegorz Jaszczyk
Hi Leif,
2018-06-13 0:48 GMT+02:00 Leif Lindholm <leif.lindholm@linaro.org>:
> So, I've made all the comments I was going to be making on this set.
>
> Patches 3,5-7,13,20-21 are fine as long as you drop pre-existing
> Signed-off-by and Reviewed-by, so if you get rid of those you can add
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> when reposting.
>
> (If any patch apart from the above didn't receive feedback I've
> fumbled and please let me know.)
>
Thanks a lot for your big review effort. I will go over each patch and
resend after correction.
Best regards,
Marcin
> Regards,
>
> Leif
>
> On Fri, Jun 08, 2018 at 05:33:58PM +0200, Marcin Wojtas wrote:
>> Hi,
>>
>> This big patchset reworks handling of the SoC and Boards' description
>> to the final version. Hitherto mechanism of hardcoded structures
>> and parsing PCDs inside the drivers was unfortunate - it didn't
>> allow to support different SoC families with different number
>> of controllers or base addresses.
>>
>> The main concept is introducing a hardware description layer
>> with the new protocol, which is responsible for providing
>> data to the consumer platforms drivers. Additionally a new
>> SoC and Board description libraries allow to move information
>> from overly used PCDs to C code in an organized manner:
>>
>> ArmadaSoCDescLib + ArmadaBoardDescLib
>> (per SoC family) (per Board, in next steps more of description
>> | of ComPhy, Mpp and others can go there)
>> | |
>> | |
>> |-> MV_BOARD_DESC <-|
>> |
>> |
>> |
>> Driver/Library (e.g. ComPhy, I2c, Pp2Dxe)
>>
>> Please don't be discouraged by big amount of patches,
>> they are sort of repeatable: update protocol, libraries and
>> the consumer drivers/libraries until the MvHwDescLib.h
>> header could be completely removed. More details can
>> be found in the commit logs.
>>
>> The patches are available in the github:
>> https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/boarddesc-upstream-r20180608
>>
>> I'm looking forward to review and any comments/remarks.
>>
>> Best regards,
>> Marcin
>>
>> Marcin Wojtas (21):
>> Marvell/Library: Introduce ArmadaBoardDescLib class
>> Marvell/Library: UtmiPhyLib: Switch to use MARVELL_BOARD_DESC protocol
>> Marvell/Library: RealTimeClockLib: Simplify obtaining base address
>> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information
>> Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support
>> Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol
>> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI
>> Marvell/Drivers: MvBoardDesc: Extend protocol with AHCI/SDMMC/XHCI
>> Marvell/Drivers: NonDiscoverable: Switch to use MARVELL_BOARD_DESC
>> Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC
>> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information
>> Marvell/Drivers: MvBoardDesc: Extend protocol with COMPHY support
>> Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC
>> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information
>> Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support
>> Marvell/Drivers: MvMdioDxe: Enable 64bit addressing
>> Marvell/Drivers: MvMdioDxe: Switch driver to use MARVELL_BOARD_DESC
>> Marvell/Armada7k8k: Extend ArmadaSoCDescLib with I2C information
>> Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support
>> Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC
>> Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency
>>
>> jinghua (4):
>> Marvell/Library: Introduce ArmadaSoCDescLib class
>> Marvell: Introduce MARVELL_BOARD_DESC_PROTOCOL
>> Marvell/Drivers: MvBoardDescDxe: Introduce board description driver
>> Marvell/Armada7k8k: Enable board description driver compilation
>>
>> Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 2 +-
>> Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 1 +
>> Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 2 +
>> Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 2 -
>> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 338 ++++++++++++
>> Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf | 37 ++
>> Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c | 29 +-
>> Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf | 2 +-
>> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 573 ++++++++++++++++++++
>> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h | 59 ++
>> Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 70 +++
>> Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 37 +-
>> Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf | 1 +
>> Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c | 41 +-
>> Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf | 1 +
>> Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c | 3 +-
>> Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 43 +-
>> Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 2 +-
>> Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c | 100 ++--
>> Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf | 6 +-
>> Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 99 ++++
>> Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 146 +++++
>> Silicon/Marvell/Include/Library/MvHwDescLib.h | 290 ----------
>> Silicon/Marvell/Include/Library/UtmiPhyLib.h | 2 +
>> Silicon/Marvell/Include/Protocol/BoardDesc.h | 118 ++++
>> Silicon/Marvell/Include/Protocol/Mdio.h | 4 +-
>> Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c | 50 +-
>> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c | 74 ++-
>> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h | 4 +
>> Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf | 6 +-
>> Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c | 65 +--
>> Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h | 5 +
>> Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf | 9 +-
>> Silicon/Marvell/Marvell.dec | 8 +-
>> 34 files changed, 1694 insertions(+), 535 deletions(-)
>> create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
>> create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
>> create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
>> create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
>> create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
>> create mode 100644 Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
>> create mode 100644 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
>> delete mode 100644 Silicon/Marvell/Include/Library/MvHwDescLib.h
>> create mode 100644 Silicon/Marvell/Include/Protocol/BoardDesc.h
>>
>> --
>> 2.7.4
>>
^ permalink raw reply [flat|nested] 50+ messages in thread