From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::241; helo=mail-wm0-x241.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B3BA0213099C2 for ; Tue, 12 Jun 2018 14:18:53 -0700 (PDT) Received: by mail-wm0-x241.google.com with SMTP id x6-v6so1182274wmc.3 for ; Tue, 12 Jun 2018 14:18:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=OTd/elvEn5zyDGcecRCqZl47VpXLuSNr02B2I5d6gKY=; b=NscixQBQ91pkFPGRWE5CeGApQzjYfP5+4DdShNbRRuqlRk7vsDXIXeIIVnJakcIHHW cnUmP2yAWsuKDUfci3qe4zlokFQg1d4K1WtczuS8RJAtVIgIdTlGLa5oTf4vJafG36+a 18jlPfkNCcAfDcNirhWYIYltDIJIzv7JBSM7g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=OTd/elvEn5zyDGcecRCqZl47VpXLuSNr02B2I5d6gKY=; b=KvJi43DmjLAONEpopY8lppTOHpMD0ukME3h30PQlVuKbr+MPIUd9zSI69JZemNtYbA qgynMYcO+8Z0u63rv+NxUaL+FxwcfyopRYoQ/q7ZQurKRlGoh7mVxyqmLuS79HpXSLnW jp9S8KA6Jj8EpiUktc/dxBn9G4q6LefD6GwCZpkUoDO148EtZE9jjsoGXluQxpw4UAZ7 VtZy2j5Yzvgk73PFVbsTmRl25mqC744725jD+4VZeSmRck8x1aZzmnlg99FokNviLSYB YAkSek7qvYuGEdz32OU2Uk70eCx7uBHvBtjer7tYL21vjQs/HLBBdPzGicDHD/2CFPEK jdTQ== X-Gm-Message-State: APt69E3/bn/wTDqxrzBXuQck7M2hYENpOGBC7LLwaIGKjhdK4EEf1pF3 Up57wZOvUHOafkXvKLrSa0t0Iw== X-Google-Smtp-Source: ADUXVKJ2eHK/sA49bvGdXLlyZ74kVrAMRkxnyzJcwCtdKKEPy+8IAO01CSVfIKsdtgH9+SAidxRHcQ== X-Received: by 2002:a1c:5e95:: with SMTP id s143-v6mr1606097wmb.19.1528838332097; Tue, 12 Jun 2018 14:18:52 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id z16-v6sm1608110wro.41.2018.06.12.14.18.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 12 Jun 2018 14:18:50 -0700 (PDT) Date: Tue, 12 Jun 2018 22:18:49 +0100 From: Leif Lindholm To: Marcin Wojtas Cc: edk2-devel@lists.01.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jinghua@marvell.com, jsd@semihalf.com, jaz@semihalf.com Message-ID: <20180612211849.jddn27ygit7gsl2c@bivouac.eciton.net> References: <1528472063-1660-1-git-send-email-mw@semihalf.com> <1528472063-1660-19-git-send-email-mw@semihalf.com> MIME-Version: 1.0 In-Reply-To: <1528472063-1660-19-git-send-email-mw@semihalf.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [platforms PATCH 18/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 12 Jun 2018 21:18:54 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Jun 08, 2018 at 05:34:16PM +0200, Marcin Wojtas wrote: > This patch introduces new library callback (ArmadaSoCDescMdioGet ()), > which dynamically allocates and fills MV_SOC_MDIO_DESC structure with > the SoC description of Mdio controllers. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas > Reviewed-by: Hua Jing > --- > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 34 ++++++++++++++++++++ > Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 15 +++++++++ > 2 files changed, 49 insertions(+) > > diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c > index ba44a0c..515ff03 100644 > --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c > +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c > @@ -72,6 +72,40 @@ ArmadaSoCDescComPhyGet ( > } > > // > +// Platform description of MDIO controllers > +// > +#define MV_SOC_MDIO_BASE(Cp) MV_SOC_CP_BASE ((Cp)) + 0x12A200 > +#define MV_SOC_MDIO_ID(Cp) ((Cp)) There appears to be a somewhat unfair distribution of parentheses between the two lines above. Parentheses don't need to be inside parentheses in order to retain evaluation order, but arithmetic operations definitely do. > + > +EFI_STATUS > +EFIAPI > +ArmadaSoCDescMdioGet ( > + IN OUT MV_SOC_MDIO_DESC **MdioDesc, > + IN OUT UINT8 *DescCount UINTN. > + ) > +{ > + MV_SOC_MDIO_DESC *Desc; > + UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount); > + UINT8 CpIndex; UINTN x2. (Also, doesn't the coding style ban assignment as part of definition?) > + > + Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_MDIO_DESC)); > + if (Desc == NULL) { > + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); > + return EFI_OUT_OF_RESOURCES; > + } > + > + for (CpIndex = 0; CpIndex < CpCount; CpIndex++) { > + Desc[CpIndex].MdioId = MV_SOC_MDIO_ID (CpIndex); > + Desc[CpIndex].MdioBaseAddress = MV_SOC_MDIO_BASE (CpIndex); > + } > + > + *MdioDesc = Desc; > + *DescCount = CpCount; > + > + return EFI_SUCCESS; > +} > + > +// > // Platform description of NonDiscoverableDevices > // > > diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h > index 791d58b..41d9642 100644 > --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h > +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h > @@ -37,6 +37,21 @@ ArmadaSoCDescComPhyGet ( > ); > > // > +// MDIO > +// > +typedef struct { > + UINT8 MdioId; Use UINTN. / Leif > + UINTN MdioBaseAddress; > +} MV_SOC_MDIO_DESC; > + > +EFI_STATUS > +EFIAPI > +ArmadaSoCDescMdioGet ( > + IN OUT MV_SOC_MDIO_DESC **MdioDesc, > + IN OUT UINT8 *DescCount > + ); > + > +// > // NonDiscoverable devices SoC description > // > // AHCI > -- > 2.7.4 >