From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::241; helo=mail-wr0-x241.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x241.google.com (mail-wr0-x241.google.com [IPv6:2a00:1450:400c:c0c::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D4F8E212CFEA6 for ; Tue, 12 Jun 2018 15:48:33 -0700 (PDT) Received: by mail-wr0-x241.google.com with SMTP id e18-v6so685475wrs.5 for ; Tue, 12 Jun 2018 15:48:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=Pu1UysGKOuUIlr/rOzI0kuR7BVS0bLtDadaLaxxAUwQ=; b=XuOK2Ru6GczcSVa5GV6Jr4Ugol8zIjIVWuPimvPiA9IJOS1J6/A4koBq1s3Q3JhMWW odhFZVHFiv51cp6eDCOM72LFRacmil2QPShNRlx4x39OQE9FJgFbLGecbOS8k42gwxb1 V0QFCwHd2wysJo/6qnfIbBvpTg12AiOScnGu0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=Pu1UysGKOuUIlr/rOzI0kuR7BVS0bLtDadaLaxxAUwQ=; b=WQXsJ0QogzMH3litPcFxhYp5mLRm8eZD/f2vck5pMd44L6saInOePZUNQCJhJk1ZA5 RNHDoqz64Fnih6dd7//OfOVz1nMWiwAIkxqlWEpmMyDovf8DWz5k2fY6AFXJd/IgRihS 2/NAEqhOhGURMiyf5kSCxv35RBIztxO46HAj0yokrFSuOEptiOA4fMIqz0762e4btxSE k/4RCa2c+Q4H26O3eoll8R92hGZd/qGOGa8RsqTmQgC9KcqNZNTdeyMaQ05FNuiJqwy9 BbVZXUy10k2HYfA5u2QsV1Yj7xGdhe5A39+ayK/j268NhF7We4Sk4xZf3HOHdbbS/iOe QuTQ== X-Gm-Message-State: APt69E1tznCbCFEso0yiC6QSrOBYzPhkOlivSvNwXkpmsHdhbC55vMQz QfSh82Cw7k29yalCyZtEac9Ceg== X-Google-Smtp-Source: ADUXVKLmFvNc7VKGy8KI4TH45qxITiEY6VyqPxLalUs9l+uSp2oaxRPXADUgH+xfxdsXjbYn94sNdQ== X-Received: by 2002:adf:a54a:: with SMTP id j10-v6mr2265998wrb.155.1528843712183; Tue, 12 Jun 2018 15:48:32 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id 127-v6sm2348043wmk.45.2018.06.12.15.48.30 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 12 Jun 2018 15:48:31 -0700 (PDT) Date: Tue, 12 Jun 2018 23:48:29 +0100 From: Leif Lindholm To: Marcin Wojtas Cc: edk2-devel@lists.01.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jinghua@marvell.com, jsd@semihalf.com, jaz@semihalf.com Message-ID: <20180612224829.4llfr2wct2d53yax@bivouac.eciton.net> References: <1528472063-1660-1-git-send-email-mw@semihalf.com> MIME-Version: 1.0 In-Reply-To: <1528472063-1660-1-git-send-email-mw@semihalf.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [platforms PATCH 00/25] Armada herdware description rework X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 12 Jun 2018 22:48:34 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline So, I've made all the comments I was going to be making on this set. Patches 3,5-7,13,20-21 are fine as long as you drop pre-existing Signed-off-by and Reviewed-by, so if you get rid of those you can add Reviewed-by: Leif Lindholm when reposting. (If any patch apart from the above didn't receive feedback I've fumbled and please let me know.) Regards, Leif On Fri, Jun 08, 2018 at 05:33:58PM +0200, Marcin Wojtas wrote: > Hi, > > This big patchset reworks handling of the SoC and Boards' description > to the final version. Hitherto mechanism of hardcoded structures > and parsing PCDs inside the drivers was unfortunate - it didn't > allow to support different SoC families with different number > of controllers or base addresses. > > The main concept is introducing a hardware description layer > with the new protocol, which is responsible for providing > data to the consumer platforms drivers. Additionally a new > SoC and Board description libraries allow to move information > from overly used PCDs to C code in an organized manner: > > ArmadaSoCDescLib + ArmadaBoardDescLib > (per SoC family) (per Board, in next steps more of description > | of ComPhy, Mpp and others can go there) > | | > | | > |-> MV_BOARD_DESC <-| > | > | > | > Driver/Library (e.g. ComPhy, I2c, Pp2Dxe) > > Please don't be discouraged by big amount of patches, > they are sort of repeatable: update protocol, libraries and > the consumer drivers/libraries until the MvHwDescLib.h > header could be completely removed. More details can > be found in the commit logs. > > The patches are available in the github: > https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/boarddesc-upstream-r20180608 > > I'm looking forward to review and any comments/remarks. > > Best regards, > Marcin > > Marcin Wojtas (21): > Marvell/Library: Introduce ArmadaBoardDescLib class > Marvell/Library: UtmiPhyLib: Switch to use MARVELL_BOARD_DESC protocol > Marvell/Library: RealTimeClockLib: Simplify obtaining base address > Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information > Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support > Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol > Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI > Marvell/Drivers: MvBoardDesc: Extend protocol with AHCI/SDMMC/XHCI > Marvell/Drivers: NonDiscoverable: Switch to use MARVELL_BOARD_DESC > Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC > Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information > Marvell/Drivers: MvBoardDesc: Extend protocol with COMPHY support > Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC > Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information > Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support > Marvell/Drivers: MvMdioDxe: Enable 64bit addressing > Marvell/Drivers: MvMdioDxe: Switch driver to use MARVELL_BOARD_DESC > Marvell/Armada7k8k: Extend ArmadaSoCDescLib with I2C information > Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support > Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC > Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency > > jinghua (4): > Marvell/Library: Introduce ArmadaSoCDescLib class > Marvell: Introduce MARVELL_BOARD_DESC_PROTOCOL > Marvell/Drivers: MvBoardDescDxe: Introduce board description driver > Marvell/Armada7k8k: Enable board description driver compilation > > Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 2 +- > Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 1 + > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 2 + > Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 2 - > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 338 ++++++++++++ > Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf | 37 ++ > Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c | 29 +- > Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf | 2 +- > Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 573 ++++++++++++++++++++ > Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h | 59 ++ > Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 70 +++ > Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 37 +- > Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf | 1 + > Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c | 41 +- > Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf | 1 + > Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c | 3 +- > Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 43 +- > Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 2 +- > Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c | 100 ++-- > Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf | 6 +- > Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 99 ++++ > Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 146 +++++ > Silicon/Marvell/Include/Library/MvHwDescLib.h | 290 ---------- > Silicon/Marvell/Include/Library/UtmiPhyLib.h | 2 + > Silicon/Marvell/Include/Protocol/BoardDesc.h | 118 ++++ > Silicon/Marvell/Include/Protocol/Mdio.h | 4 +- > Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c | 50 +- > Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c | 74 ++- > Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h | 4 + > Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf | 6 +- > Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c | 65 +-- > Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h | 5 + > Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf | 9 +- > Silicon/Marvell/Marvell.dec | 8 +- > 34 files changed, 1694 insertions(+), 535 deletions(-) > create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c > create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf > create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c > create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h > create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf > create mode 100644 Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h > create mode 100644 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h > delete mode 100644 Silicon/Marvell/Include/Library/MvHwDescLib.h > create mode 100644 Silicon/Marvell/Include/Protocol/BoardDesc.h > > -- > 2.7.4 >