From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::243; helo=mail-wm0-x243.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 73C792130DE04 for ; Wed, 13 Jun 2018 05:28:37 -0700 (PDT) Received: by mail-wm0-x243.google.com with SMTP id p126-v6so4414915wmb.2 for ; Wed, 13 Jun 2018 05:28:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=AxL/5SgPJGROjo59ACuYm2Xdz40uUz5R0bi+FKMC45A=; b=kXmiiqrs+eaAM1uJgXiAxSjf8I4sUbBQ77dLMbMtKp8Cj4BSPU4XAbYDiHmMtkfkCE IuVPXfd6HpGVEgz5VImfu+rExVVLhAenCkovlRp9ed0+27O+2QuEZOcmt84m5GVZK/CR NkdkT7bBekTBJUAPMpEsR9EpRNWFgBpLqDUhc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=AxL/5SgPJGROjo59ACuYm2Xdz40uUz5R0bi+FKMC45A=; b=Px6UdmuIVSau2UAB6WIl+a29RaE07IdlVU8sO6oPzLDHfMsAiahIp4k0Z1pRO2bbIU oXby8AaRrDh4ltANOcS9hSzJAbxERUpYN5b8RBGtU4jq42QfqT9v+iB3IpuALs27TjT0 k8hgNy+jA/U7CrFIG+AFbHYqvKNM4pB2yHPliDJxrHLXJzgmjkJ9KIa4b3NZVYZs/2z8 fWiK/6QVgZ0QfMiV89uA0I8M7PdcygCl9wTkleig4s7KqbsX4E8uR8eBYDevXWvLE1ct iw8TZF3NQd9F7IlFmnjezj/kFhBeQOTpMViY6u/tWniUugBIFdZkcxnAKYWFuWEE72WV OScw== X-Gm-Message-State: APt69E34y64DNd1l9bfQHr1ipUgSPSsOkE6wu5kJ5nkMrm5oPqP8MDX4 y4A9/7JpILfutEqG5CMRN96D8g== X-Google-Smtp-Source: ADUXVKKWRcM0xGaRSny3zkUg1Jn4WKWj8gjUkH6L0ooMf4KhyyqzIPmBygQwEggycrL1EfPsuKRSPw== X-Received: by 2002:a1c:d287:: with SMTP id j129-v6mr3189069wmg.106.1528892915655; Wed, 13 Jun 2018 05:28:35 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id f2-v6sm4016037wre.16.2018.06.13.05.28.34 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 13 Jun 2018 05:28:34 -0700 (PDT) Date: Wed, 13 Jun 2018 13:28:33 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: "edk2-devel@lists.01.org" Message-ID: <20180613122833.5fm2chfhjev7nfp4@bivouac.eciton.net> References: <20180607150818.14393-1-ard.biesheuvel@linaro.org> <20180607150818.14393-3-ard.biesheuvel@linaro.org> <20180612225919.kroissnk2tusdw76@bivouac.eciton.net> <20180613100054.hbevqbfp6myyia5t@bivouac.eciton.net> MIME-Version: 1.0 In-Reply-To: User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms 2/2] Silicon/NorFlashSynQuacerLib: describe entire firmware region as FV X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 13 Jun 2018 12:28:37 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Jun 13, 2018 at 02:00:39PM +0200, Ard Biesheuvel wrote: > On 13 June 2018 at 12:00, Leif Lindholm wrote: > > On Wed, Jun 13, 2018 at 09:19:01AM +0200, Ard Biesheuvel wrote: > >> On 13 June 2018 at 00:59, Leif Lindholm wrote: > >> > On Thu, Jun 07, 2018 at 05:08:18PM +0200, Ard Biesheuvel wrote: > >> >> In order to allow for more flexibility when updating parts of the > >> >> firmware via capsule update, expand the description of the code FV > >> >> to cover the entire 4 MB region at the base of the NOR flash. > >> >> > >> >> Contributed-under: TianoCore Contribution Agreement 1.1 > >> >> Signed-off-by: Ard Biesheuvel > >> >> --- > >> >> Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c | 5 +++-- > >> >> 1 file changed, 3 insertions(+), 2 deletions(-) > >> >> > >> >> diff --git a/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c > >> >> index 816d8ba33f8c..357082c3d903 100644 > >> >> --- a/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c > >> >> +++ b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c > >> >> @@ -23,8 +23,9 @@ STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] = { > >> >> { > >> >> // UEFI code region > >> >> SYNQUACER_SPI_NOR_BASE, // device base > >> >> - FixedPcdGet64 (PcdFdBaseAddress), // region base > >> >> - FixedPcdGet32 (PcdFdSize), // region size > >> >> + SYNQUACER_SPI_NOR_BASE, // region base > >> >> + FixedPcdGet32 (PcdFlashNvStorageVariableBase) - > >> >> + SYNQUACER_SPI_NOR_BASE, // region size > >> > > >> > Could you define the size as a macro in Platform/MemoryMap.h? > >> > > >> > >> The memory map currently only contains constant macros. I can add this > >> expression > >> > >> FixedPcdGet32 (PcdFlashNvStorageVariableBase) - SYNQUACER_SPI_NOR_BASE > >> > >> somewhere as a #define but I would prefer it to be elsewhere, given > >> that it is not a SoC constant set in stone. > > > > I'm OK with that, but will just throw in the argument that the fact > > that it being a FixedPcdGet32 of PcdFlashNvStorageVariableBase is kind > > of set in stone. (And doesn't the Fixed bit make it constant?) > > > > The point is more that MemoryMap.h describes properties of the SoC not > properties of our firmware implementation > > But that also means that I should introduce a symbolic constant for > the start of the partition, e.g., > > #define FW_CODE_REGION_BASE SYNQUACER_SPI_NOR_BASE > #define FW_CODE_REGION_SIZE (FixedPcdGet32 (PcdFlashNvStorageVariableBase) > - SYNQUACER_SPI_NOR_BASE) > > but I'd still prefer to keep it local to this file. Yeah, that's fine. / Leif