From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::241; helo=mail-wr0-x241.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x241.google.com (mail-wr0-x241.google.com [IPv6:2a00:1450:400c:c0c::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 038BF210DF51A for ; Mon, 18 Jun 2018 09:19:30 -0700 (PDT) Received: by mail-wr0-x241.google.com with SMTP id x4-v6so17462616wro.11 for ; Mon, 18 Jun 2018 09:19:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=81nEKkMD3tu1oczfpsG+8JeejIVFrMyhTwdUi0r/KlY=; b=GfPciJspe3/kURmUGxoLVLoTTwTZjdJGDxRhx7AmjY0IDlhwrMQKuIeMuXaFr/Zp6d dLE6fGHqnvy05qf+ZdlV/G7HqVH6dE+lHkel4fCkkGcKYrNpej8nHo5sUJmMLpSYJijA XrudeE9J4B+5HplFInlA6ylelDYV/lDt46mTE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=81nEKkMD3tu1oczfpsG+8JeejIVFrMyhTwdUi0r/KlY=; b=EnjYEz006Yp8j2xN2E+kADfrdzs1Adgo/AdmnJ+mUJALMCntw8Nc06aHhOct0reO8n ODfxlJpuA7CHjMY7s/+lZpLtosPGFVU7KQQixAsPxI8qLbZx/YVIvvkCZsNUs5b4gt8j 4GRl7srcHB5lKqXDotwt3mrOJ2JROmHrc0iaW4BDRfhDS25d0UZWgwhykZXrynpAgl/G 80S16kyxoC8XdYODVozYFMUkwBnUTrYz2stS67VJtHme2yz+heb19zyTDs/26U9w6n2F XSNtG9uc809AvZVAROCITvbG6LaPuVu4nfTmupG+y2JL/Fn0Z/vyhx1zY/2apHBF5JZj i+BA== X-Gm-Message-State: APt69E3pwG8Da6IqUOQ0H41kHG+sHI2dIe2Ak99zRT94Ki1blJQddNv2 aHDELPPFXcH55rECseUCGLqj0w== X-Google-Smtp-Source: ADUXVKKbx4vUtbNvORmHFVT8lggnX18rOmoXx0RHMm7m0SUiMphoeXKuOuAO21+xctiU6XtnujHUdA== X-Received: by 2002:adf:ea0f:: with SMTP id q15-v6mr11823078wrm.9.1529338769516; Mon, 18 Jun 2018 09:19:29 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id v2-v6sm16813299wrm.84.2018.06.18.09.19.28 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 18 Jun 2018 09:19:28 -0700 (PDT) Date: Mon, 18 Jun 2018 17:19:26 +0100 From: Leif Lindholm To: Marcin Wojtas Cc: edk2-devel@lists.01.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jinghua@marvell.com, jsd@semihalf.com, jaz@semihalf.com Message-ID: <20180618161926.z63uw22a5ljg5ydn@bivouac.eciton.net> References: <1529266325-18371-1-git-send-email-mw@semihalf.com> <1529266325-18371-17-git-send-email-mw@semihalf.com> MIME-Version: 1.0 In-Reply-To: <1529266325-18371-17-git-send-email-mw@semihalf.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [platforms: PATCH v2 16/25] Marvell/Drivers: MvBoardDesc: Extend protocol with ComPhy support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 18 Jun 2018 16:19:31 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Sun, Jun 17, 2018 at 10:11:56PM +0200, Marcin Wojtas wrote: > Introduce new callback that can provide information > about ComPhy controllers to the ComPhyLib. > > Extend ArmadaBoardDescLib with new structure MV_BOARD_COMPHY_DESC, > for holding board specific data. In further steps it can > be extended and replace PCD SerDes lanes' representation with the > appropriate structures. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm > --- > Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 + > Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 8 +++ > Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++ > Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 64 ++++++++++++++++++++ > 4 files changed, 81 insertions(+) > > diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf > index cc0d9d4..dea99fd 100644 > --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf > +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf > @@ -57,6 +57,7 @@ > gMarvellBoardDescProtocolGuid > > [Pcd] > + gMarvellTokenSpaceGuid.PcdComPhyDevices > gMarvellTokenSpaceGuid.PcdPciEAhci > gMarvellTokenSpaceGuid.PcdPciESdhci > gMarvellTokenSpaceGuid.PcdPciEXhci > diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h > index 7e4fa4d..32bd915 100644 > --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h > +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h > @@ -17,6 +17,14 @@ > #include > > // > +// COMPHY controllers per-board description > +// > +typedef struct { > + MV_SOC_COMPHY_DESC *SoC; > + UINTN ComPhyDevCount; > +} MV_BOARD_COMPHY_DESC; > + > +// > // NonDiscoverableDevices per-board description > // > > diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h > index edf9491..b6dac75 100644 > --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h > +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h > @@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL; > > typedef > EFI_STATUS > +(EFIAPI *MV_BOARD_DESC_COMPHY_GET) ( > + IN MARVELL_BOARD_DESC_PROTOCOL *This, > + IN OUT MV_BOARD_COMPHY_DESC **ComPhyDesc > + ); > + > +typedef > +EFI_STATUS > (EFIAPI *MV_BOARD_DESC_AHCI_GET) ( > IN MARVELL_BOARD_DESC_PROTOCOL *This, > IN OUT MV_BOARD_AHCI_DESC **AhciDesc > @@ -84,6 +91,7 @@ VOID > > struct _MARVELL_BOARD_DESC_PROTOCOL { > MV_BOARD_DESC_AHCI_GET BoardDescAhciGet; > + MV_BOARD_DESC_COMPHY_GET BoardDescComPhyGet; > MV_BOARD_DESC_PP2_GET BoardDescPp2Get; > MV_BOARD_DESC_SDMMC_GET BoardDescSdMmcGet; > MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet; > diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c > index 3439017..6bbe40b 100644 > --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c > +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c > @@ -37,6 +37,69 @@ MV_BOARD_DESC *mBoardDescInstance; > > STATIC > EFI_STATUS > +MvBoardDescComPhyGet ( > + IN MARVELL_BOARD_DESC_PROTOCOL *This, > + IN OUT MV_BOARD_COMPHY_DESC **ComPhyDesc > + ) > +{ > + UINT8 *ComPhyDeviceEnabled; > + UINTN ComPhyCount, ComPhyDeviceTableSize, ComPhyIndex, Index; > + MV_BOARD_COMPHY_DESC *BoardDesc; > + MV_SOC_COMPHY_DESC *SoCDesc; > + EFI_STATUS Status; > + > + /* Get SoC data about all available ComPhy controllers */ > + Status = ArmadaSoCDescComPhyGet (&SoCDesc, &ComPhyCount); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + /* > + * Obtain table with enabled ComPhy controllers > + * which is represented as an array of UINT8 values > + * (0x0 - disabled, 0x1 enabled). > + */ > + ComPhyDeviceEnabled = PcdGetPtr (PcdComPhyDevices); > + if (ComPhyDeviceEnabled == NULL) { > + /* No ComPhy controllers declared */ > + return EFI_NOT_FOUND; > + } > + > + ComPhyDeviceTableSize = PcdGetSize (PcdComPhyDevices); > + > + /* Check if PCD with ComPhy is correctly defined */ > + if (ComPhyDeviceTableSize > ComPhyCount) { > + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdComPhyDevices format\n", __FUNCTION__)); > + return EFI_INVALID_PARAMETER; > + } > + > + /* Allocate and fill board description */ > + BoardDesc = AllocateZeroPool (ComPhyDeviceTableSize * sizeof (MV_BOARD_COMPHY_DESC)); > + if (BoardDesc == NULL) { > + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); > + return EFI_OUT_OF_RESOURCES; > + } > + > + ComPhyIndex = 0; > + for (Index = 0; Index < ComPhyDeviceTableSize; Index++) { > + if (!ComPhyDeviceEnabled[Index]) { > + DEBUG ((DEBUG_ERROR, "%a: Skip ComPhy controller %d\n", __FUNCTION__, Index)); > + continue; > + } > + > + BoardDesc[ComPhyIndex].SoC = &SoCDesc[Index]; > + ComPhyIndex++; > + } > + > + BoardDesc->ComPhyDevCount = ComPhyIndex; > + > + *ComPhyDesc = BoardDesc; > + > + return EFI_SUCCESS; > +} > + > +STATIC > +EFI_STATUS > MvBoardDescAhciGet ( > IN MARVELL_BOARD_DESC_PROTOCOL *This, > IN OUT MV_BOARD_AHCI_DESC **AhciDesc > @@ -392,6 +455,7 @@ MvBoardDescInitProtocol ( > ) > { > BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet; > + BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet; > BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get; > BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet; > BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet; > -- > 2.7.4 >