From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::244; helo=mail-wr0-x244.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x244.google.com (mail-wr0-x244.google.com [IPv6:2a00:1450:400c:c0c::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8282E210E3DEB for ; Mon, 18 Jun 2018 09:48:05 -0700 (PDT) Received: by mail-wr0-x244.google.com with SMTP id x4-v6so17552635wro.11 for ; Mon, 18 Jun 2018 09:48:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=GiELG5bukOVA0DWIXsLrUzWrhDzNl5mvrYMwYBlAKRU=; b=YFC84zsXDT6eLSEIvmxjPYUZCzLLv8ss9DNhteF1aew3pN1ybfQjaeMFsM31aoFKGe lUUefUmhvK0hHcQUWYHMq7HvxWVY4u5Yd7CMXwvaqkVOb0hy7j7XNzIcEoTmB1YSccp8 Jcx74rebivcooafqXSx8WXr+bTBlWkO8fm8Do= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=GiELG5bukOVA0DWIXsLrUzWrhDzNl5mvrYMwYBlAKRU=; b=s56s0nWOo0yjKoePh8M75GRiIB8hUI/935SZnwCsPlXrBcnoy28NpnZkBZvclg6Tgq FLvrlcVCCgozIBfWeKlNuz/SMitkBazaBd1R7VT5YUaSfMdurTNGzqoLziduPrKg+HbP pVOkQCh24JHcgnrdX+bXe6QqT8ldW+ZMV/arU1wTRbdHyOVrnbX2LSXOigUKWIL8yZDl a604bcZeLoLugKwg7y8QLkWY0TMkZ/ZkAn+9PKFkWyEKvRRFxxdVFWnxGbFNeXiBGI+Z jp6jhDeNiwBAjDwuBWXZ0/3mhaVX2mZm4zhSgOQYTPLTFlUEJh9/mVjtEX3a94eMcy67 6F5Q== X-Gm-Message-State: APt69E07NLBdKDN+2qfr5nKG+fAwLi3fGHiwCwoX0ajZ11RhxGB4TIMZ Jd/FqmfR0Bp2A2LblS+AMy/TXQ== X-Google-Smtp-Source: ADUXVKKStog9dsLLd4N12b2KXCxF2bq0raYFTzpW/pZ/3W0trdTnzDZRBa1vpa6HITGqhuWfdvAzcg== X-Received: by 2002:adf:ac69:: with SMTP id v96-v6mr10706545wrc.5.1529340484131; Mon, 18 Jun 2018 09:48:04 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id e2-v6sm18601382wro.97.2018.06.18.09.48.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 18 Jun 2018 09:48:03 -0700 (PDT) Date: Mon, 18 Jun 2018 17:48:01 +0100 From: Leif Lindholm To: Marcin Wojtas Cc: edk2-devel@lists.01.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jinghua@marvell.com, jsd@semihalf.com, jaz@semihalf.com Message-ID: <20180618164801.iczm3slauhspnznm@bivouac.eciton.net> References: <1529266325-18371-1-git-send-email-mw@semihalf.com> <1529266325-18371-25-git-send-email-mw@semihalf.com> MIME-Version: 1.0 In-Reply-To: <1529266325-18371-25-git-send-email-mw@semihalf.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [platforms: PATCH v2 24/25] Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 18 Jun 2018 16:48:06 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Sun, Jun 17, 2018 at 10:12:04PM +0200, Marcin Wojtas wrote: > MvI2cDxe driver used to get Armada7k8k controller description > from hardcoded values stored in the header file MvHwDescLib.h. > As a result it is very hard to support other > Armada SoC families with this driver. > > This patch updates the driver, so that it can obtain the > description from newly introduced MARVELL_BOARD_DESC protocol, > and removes the dependency on the hardcoded structures. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm > --- > Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf | 1 + > Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 37 +++++++++----------- > 2 files changed, 18 insertions(+), 20 deletions(-) > > diff --git a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf > index a7cf52e..0eef350 100755 > --- a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf > +++ b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf > @@ -61,6 +61,7 @@ > gEfiDevicePathProtocolGuid > gEfiI2cEnumerateProtocolGuid > gEfiI2cBusConfigurationManagementProtocolGuid > + gMarvellBoardDescProtocolGuid > > [Pcd] > gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses > diff --git a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c > index d6f590d..9ec4929 100755 > --- a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c > +++ b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c > @@ -32,6 +32,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > > *******************************************************************************/ > > +#include > #include > #include > #include > @@ -43,13 +44,10 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > #include > #include > #include > -#include > #include > > #include "MvI2cDxe.h" > > -DECLARE_A7K8K_I2C_TEMPLATE; > - > STATIC MV_I2C_BAUD_RATE baud_rate; > > STATIC MV_I2C_DEVICE_PATH MvI2cDevicePathProtocol = { > @@ -174,38 +172,37 @@ MvI2cInitialise ( > IN EFI_SYSTEM_TABLE *SystemTable > ) > { > - MVHW_I2C_DESC *Desc = &mA7k8kI2cDescTemplate; > - UINT8 *I2cDeviceTable, Index; > + MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol; > + MV_BOARD_I2C_DESC *Desc; > EFI_STATUS Status; > + UINTN Index; > > - /* Obtain table with enabled I2c devices */ > - I2cDeviceTable = (UINT8 *)PcdGetPtr (PcdI2cControllersEnabled); > - if (I2cDeviceTable == NULL) { > - DEBUG ((DEBUG_ERROR, "Missing PcdI2cControllersEnabled\n")); > - return EFI_INVALID_PARAMETER; > + /* Obtain list of available controllers */ > + Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid, > + NULL, > + (VOID **)&BoardDescProtocol); > + if (EFI_ERROR (Status)) { > + return Status; > } > > - if (PcdGetSize (PcdI2cControllersEnabled) > MVHW_MAX_I2C_DEVS) { > - DEBUG ((DEBUG_ERROR, "Wrong PcdI2cControllersEnabled format\n")); > - return EFI_INVALID_PARAMETER; > + Status = BoardDescProtocol->BoardDescI2cGet (BoardDescProtocol, &Desc); > + if (EFI_ERROR (Status)) { > + return Status; > } > > /* Initialize enabled chips */ > - for (Index = 0; Index < PcdGetSize (PcdI2cControllersEnabled); Index++) { > - if (!MVHW_DEV_ENABLED (I2c, Index)) { > - DEBUG ((DEBUG_ERROR, "Skip I2c chip %d\n", Index)); > - continue; > - } > - > + for (Index = 0; Index < Desc->I2cDevCount; Index++) { > Status = MvI2cInitialiseController( > ImageHandle, > SystemTable, > - Desc->I2cBaseAddresses[Index] > + Desc[Index].SoC->I2cBaseAddress > ); > if (EFI_ERROR(Status)) > return Status; > } > > + BoardDescProtocol->BoardDescFree (Desc); > + > return EFI_SUCCESS; > } > > -- > 2.7.4 >