From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c05::243; helo=mail-pg0-x243.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg0-x243.google.com (mail-pg0-x243.google.com [IPv6:2607:f8b0:400e:c05::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3AF982033D1B6 for ; Wed, 4 Jul 2018 00:51:25 -0700 (PDT) Received: by mail-pg0-x243.google.com with SMTP id b1-v6so1162709pgu.5 for ; Wed, 04 Jul 2018 00:51:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=i7VeIvd7pFqmlGzyFi/6iMETjAv+0ResKJg2RbISmZw=; b=O5SBKcgxk0SZEJ4l3RdStT76xJskKCzuccSb5ReY5k3MoMgBbkwGitPbnOgLmFzr1y +UeYwrCqQznbEKtzedlx4sIxhNaLOqtjAPN88mt0w4vmidDlAYvOoRUkR9aAobIieI/S HQo73ZapBs7JSUS+UMxws1dQrO9I2/MsKXsf8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=i7VeIvd7pFqmlGzyFi/6iMETjAv+0ResKJg2RbISmZw=; b=R7sAkJTdOiVr0c9lex5iQmsjOfz9+ThO+ywfYyRsACLWG0Zd2v7nkpfSrvPMc2BGfJ kA41Aoeqzfx4PneYF6v3Vdqb2QaZcpheaEKSqRxFH25j/XG7I8vJzYwOZYVc+nK4Uph8 wA7ZtBIFcZ82BVTkZB2fB/pLDwVNjkoTqs/+9nV4ziW0srtycv/WLEdOguX75IG00FjV 4UkEUYUikHAQhWMZ9At/nL/MeW00pcTaz3g7IhC12x3Qk0tR0z1qON9HygpGl6c7AS11 gAshx1d5hUFi87JdtjYzLG4Uu3Llw+NvvGu1wRALaNZEjlxmHVcg/UWWFyWJSrP3E+R5 tL1w== X-Gm-Message-State: APt69E3Hn1vfK4729O+iGvKpUn08hVOzC6wJxxXXQ9nt7gOXd5n69XfR jskBcfiZ1unUl9htNgcRJDPdPQ== X-Google-Smtp-Source: AAOMgpdkq59jDk63ET0MRcHDs9kEFQkAy4Cw2yisUC/y86Pqx0/walok5iu++i7oseBBX8U67LbxEA== X-Received: by 2002:a63:440a:: with SMTP id r10-v6mr917744pga.27.1530690684934; Wed, 04 Jul 2018 00:51:24 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id d9-v6sm4803219pge.68.2018.07.04.00.51.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 04 Jul 2018 00:51:24 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, Ming Huang Date: Wed, 4 Jul 2018 15:51:11 +0800 Message-Id: <20180704075117.7427-1-ming.huang@linaro.org> X-Mailer: git-send-email 2.17.0 Subject: [PATCH edk2-platforms v2 0/6] Improve D0x platforms and bug fix X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 04 Jul 2018 07:51:25 -0000 The major features of this patchset include: 1 Fix invoke SetMemorySpaceAttributes error bug 2 Correct ATU Cfg0/Cfg1 base address 3 Fix SetAtuConfig1RW bug 4 Add PlatformMiscDxe driver 5 optimize two pcie prots space 6 Correct smbios product name BTW: 1 D06 source will upstream in July; 2 Installing OS by iso is supported by edk2 commit(824b6e3b5f). Code can also be found in github: https://github.com/hisilicon/OpenPlatformPkg.git branch: platforms-20180627-v2 Jason Zhang (1): Hisilicon/D03/D05: Correct ATU Cfg0/Cfg1 base address Ming Huang (5): Hisilicon/D0x: Fix invoke SetMemorySpaceAttributes error bug Hisilicon/D0x: Fix SetAtuConfig1RW bug Hisilicon/D05: Add PlatformMiscDxe driver Hisilicon/D05/Pcie: optimize two pcie ports space Hisilicon/D0x: Correct smbios product name Platform/Hisilicon/D03/D03.fdf | 4 + .../DS3231RealTimeClockLib.inf | 2 + Platform/Hisilicon/D05/D05.dsc | 13 +-- Platform/Hisilicon/D05/D05.fdf | 1 + .../Drivers/PlatformMiscDxe/PlatformMiscDxe.c | 99 +++++++++++++++++++ .../PlatformMiscDxe/PlatformMiscDxe.inf | 47 +++++++++ .../Library/PlatformPciLib/PlatformPciLib.c | 8 +- .../PciHostBridgeDxe/PciRootBridgeIo.c | 13 +-- .../Type01/MiscSystemManufacturerFunction.c | 1 - .../Hi1616/D05AcpiTables/D05Iort.asl | 8 +- .../Hi1616/D05AcpiTables/D05Mcfg.aslc | 8 +- .../Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 32 +++--- 12 files changed, 195 insertions(+), 41 deletions(-) create mode 100644 Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.c create mode 100644 Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf -- 2.17.0