From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.100; helo=mga07.intel.com; envelope-from=eric.dong@intel.com; receiver=edk2-devel@lists.01.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9688820972151 for ; Thu, 12 Jul 2018 03:49:30 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Jul 2018 03:49:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,342,1526367600"; d="scan'208";a="72147226" Received: from ydong10-win10.ccr.corp.intel.com ([10.239.9.24]) by orsmga001.jf.intel.com with ESMTP; 12 Jul 2018 03:49:29 -0700 From: Eric Dong To: edk2-devel@lists.01.org Cc: Laszlo Ersek , Ruiyu Ni Date: Thu, 12 Jul 2018 18:49:25 +0800 Message-Id: <20180712104927.12220-2-eric.dong@intel.com> X-Mailer: git-send-email 2.15.0.windows.1 In-Reply-To: <20180712104927.12220-1-eric.dong@intel.com> References: <20180712104927.12220-1-eric.dong@intel.com> Subject: [Patch v2 1/3] UefiCpuPkg/MpInitLib: Relocate uCode to memory to save time. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 Jul 2018 10:49:30 -0000 Read uCode from memory has better performance than from flash. But it needs extra effort to let BSP copy uCode from flash to memory. Also BSP already enable cache in SEC phase, so it use less time to relocate uCode from flash to memory. After verification, if system has more than one processor, it will reduce some time if load uCode from memory. This change enable this optimization. Cc: Laszlo Ersek Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong --- UefiCpuPkg/Library/MpInitLib/MpLib.c | 34 +++++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c index 108eea0a6f..c3cd6d7d51 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -1520,6 +1520,7 @@ MpInitLibInitialize ( UINTN ApResetVectorSize; UINTN BackupBufferAddr; UINTN ApIdtBase; + VOID *MicrocodePatchInRam; OldCpuMpData = GetCpuMpDataFromGuidedHob (); if (OldCpuMpData == NULL) { @@ -1587,8 +1588,39 @@ MpInitLibInitialize ( CpuMpData->SwitchBspFlag = FALSE; CpuMpData->CpuData = (CPU_AP_DATA *) (CpuMpData + 1); CpuMpData->CpuInfoInHob = (UINT64) (UINTN) (CpuMpData->CpuData + MaxLogicalProcessorNumber); - CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress); CpuMpData->MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize); + // + // If platform has more than one CPU, relocate microcode to memory to reduce + // loading microcode time. + // + MicrocodePatchInRam = NULL; + if (MaxLogicalProcessorNumber > 1) { + MicrocodePatchInRam = AllocatePages ( + EFI_SIZE_TO_PAGES ( + (UINTN)CpuMpData->MicrocodePatchRegionSize + ) + ); + ASSERT (MicrocodePatchInRam != NULL); + } + if (MicrocodePatchInRam == NULL) { + // + // there is only one processor, or no microcode patch is available, or + // memory allocation failed + // + CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress); + } else { + // + // there are multiple processors, and a microcode patch is available, and + // memory allocation succeeded + // + CopyMem ( + MicrocodePatchInRam, + (VOID *)(UINTN)PcdGet64 (PcdCpuMicrocodePatchAddress), + (UINTN)CpuMpData->MicrocodePatchRegionSize + ); + CpuMpData->MicrocodePatchAddress = (UINTN)MicrocodePatchInRam; + } + InitializeSpinLock(&CpuMpData->MpLock); // -- 2.15.0.windows.1