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From: "Zhang, Chao B" <chao.b.zhang@intel.com>
To: edk2-devel@lists.01.org
Cc: Long Qin <long.qin@intel.com>, Jiewen Yao <jiewen.yao@intel.com>,
	Chao Zhang <chao.b.zhang@intel.com>
Subject: [Patch] SecurityPkg:Tcg: Fix comment typos
Date: Mon, 16 Jul 2018 15:20:39 +0800	[thread overview]
Message-ID: <20180716072039.27660-1-chao.b.zhang@intel.com> (raw)

"Triggle" is a typo. Fix it with "Trigger"

Cc: Long Qin <long.qin@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Signed-off-by: Zhang, Chao B <chao.b.zhang@intel.com>
---
 SecurityPkg/Tcg/Tcg2Smm/Tpm.asl | 16 ++++++++--------
 SecurityPkg/Tcg/TcgSmm/Tpm.asl  | 16 ++++++++--------
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl b/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl
index 50dea0ab9a..471b6b1fa1 100644
--- a/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl
+++ b/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl
@@ -257,16 +257,16 @@ DefinitionBlock (
           // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect.
           //
           If (LNot (And (MORD, 0x10)))
           {
             //
-            // Triggle the SMI through ACPI _PTS method.
+            // Trigger the SMI through ACPI _PTS method.
             //
             Store (0x02, MCIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (MCIN, IOB2)
           }
         }
         Return (0)
@@ -363,11 +363,11 @@ DefinitionBlock (
             Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
             Store (0, PPRM)
             Store (0x02, PPIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
             Return (FRET)
 
 
@@ -394,11 +394,11 @@ DefinitionBlock (
             // e) Return TPM Operation Response to OS Environment
             //
             Store (0x05, PPIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
 
             Store (LPPR, Index (TPM3, 0x01))
             Store (PPRP, Index (TPM3, 0x02))
@@ -426,11 +426,11 @@ DefinitionBlock (
             If (LEqual (PPRQ, 23)) {
               Store (DerefOf (Index (Arg2, 0x01)), PPRM)
             }
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
             Return (FRET)
           }
           Case (8)
@@ -440,11 +440,11 @@ DefinitionBlock (
             //
             Store (8, PPIP)
             Store (DerefOf (Index (Arg2, 0x00)), UCRQ)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
 
             Return (FRET)
           }
@@ -474,16 +474,16 @@ DefinitionBlock (
             // Save the Operation Value of the Request to MORD (reserved memory)
             //
             Store (DerefOf (Index (Arg2, 0x00)), MORD)
 
             //
-            // Triggle the SMI through ACPI _DSM method.
+            // Trigger the SMI through ACPI _DSM method.
             //
             Store (0x01, MCIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (MCIN, IOB2)
             Return (MRET)
           }
           Default {BreakPoint}
diff --git a/SecurityPkg/Tcg/TcgSmm/Tpm.asl b/SecurityPkg/Tcg/TcgSmm/Tpm.asl
index 12f24f3996..2114283b45 100644
--- a/SecurityPkg/Tcg/TcgSmm/Tpm.asl
+++ b/SecurityPkg/Tcg/TcgSmm/Tpm.asl
@@ -93,16 +93,16 @@ DefinitionBlock (
           // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect.
           //
           If (LNot (And (MORD, 0x10)))
           {
             //
-            // Triggle the SMI through ACPI _PTS method.
+            // Trigger the SMI through ACPI _PTS method.
             //
             Store (0x02, MCIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (MCIN, IOB2)
           }
         }
         Return (0)
@@ -198,11 +198,11 @@ DefinitionBlock (
 
             Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
             Store (0x02, PPIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
             Return (FRET)
 
 
@@ -229,11 +229,11 @@ DefinitionBlock (
             // e) Return TPM Operation Response to OS Environment
             //
             Store (0x05, PPIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
 
             Store (LPPR, Index (TPM3, 0x01))
             Store (PPRP, Index (TPM3, 0x02))
@@ -257,11 +257,11 @@ DefinitionBlock (
             //
             Store (7, PPIP)
             Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
             Return (FRET)
           }
           Case (8)
@@ -271,11 +271,11 @@ DefinitionBlock (
             //
             Store (8, PPIP)
             Store (DerefOf (Index (Arg2, 0x00)), UCRQ)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (PPIN, IOB2)
 
             Return (FRET)
           }
@@ -305,16 +305,16 @@ DefinitionBlock (
             // Save the Operation Value of the Request to MORD (reserved memory)
             //
             Store (DerefOf (Index (Arg2, 0x00)), MORD)
 
             //
-            // Triggle the SMI through ACPI _DSM method.
+            // Trigger the SMI through ACPI _DSM method.
             //
             Store (0x01, MCIP)
 
             //
-            // Triggle the SMI interrupt
+            // Trigger the SMI interrupt
             //
             Store (MCIN, IOB2)
             Return (MRET)
           }
           Default {BreakPoint}
-- 
2.16.2.windows.1



             reply	other threads:[~2018-07-16  7:20 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-16  7:20 Zhang, Chao B [this message]
2018-07-16  8:01 ` [Patch] SecurityPkg:Tcg: Fix comment typos Long, Qin

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