From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::543; helo=mail-pg1-x543.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg1-x543.google.com (mail-pg1-x543.google.com [IPv6:2607:f8b0:4864:20::543]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C04CF2097DD37 for ; Fri, 20 Jul 2018 01:04:22 -0700 (PDT) Received: by mail-pg1-x543.google.com with SMTP id f1-v6so6175944pgq.12 for ; Fri, 20 Jul 2018 01:04:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sixuv8RbFLESXIcEXKS2nBVYu/5A5sKX136a0HHvXOs=; b=gD5wJzwopaok8qr6Sk0GMC7kW9Cmg6Jd3YJFII68TftetXRQlrWUrlFHyOPaxCU0oH pFFuA2R4wku6Q4j3eN9CY+Yq69cuGIuxSy6H107GTWvqzSYbHqKGc/W8VqJBjUpHobp+ hpNgOi02ijMnKAwaTyi6luZmafseocVbcRXKQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sixuv8RbFLESXIcEXKS2nBVYu/5A5sKX136a0HHvXOs=; b=Ib8qtkPKYAIY+zBMVvozStSuC6rlqtf7hUXy4j9vbaLpZZRKjbeeeC6bWbq8SAb+EG rbxSpNkzgm01owoWi2CUB8WSsqBsIR0yQFGqW63gIaXMMUc2zhJZ2hW/snxOVER0ewv2 BpqOx3oan44lQXQcpMSklKvKT2tNGeYjOXg3JLO50IfECgv1PTdR64yKJIolhaBGDjpj JZqq7EwhqlKANwx3yhATKKH20ke1w907RDZUDGVNl1ubk9FFzTYUbpQG0fBl1TW38+6V ItJK8D8ouKNtGk1p/JxqZuk72ex9wnILalepg6D0BPLYoJCNeJ2nK6ZxPP1CmE5pPQL9 iJAg== X-Gm-Message-State: AOUpUlG2CQmYoZw3Lu9FSykKaJIU4wL6F4id2+UNA/uSwAwd8RnjfjMa ABfK5K3fEqcIrQGVYIU7vdBb/W2jPuU= X-Google-Smtp-Source: AAOMgpeE7AYuRWR8Sp0ouKHJN+aCOa/0haF5WlzF5SR1Tzx0IYjoSS58/ON5f7cIw830cAenmoBLSg== X-Received: by 2002:a65:57c9:: with SMTP id q9-v6mr1122886pgr.128.1532073862535; Fri, 20 Jul 2018 01:04:22 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id n18-v6sm2066812pfa.50.2018.07.20.01.04.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 20 Jul 2018 01:04:21 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, Ming Huang , Heyi Guo Date: Fri, 20 Jul 2018 16:02:33 +0800 Message-Id: <20180720080242.3777-5-ming.huang@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180720080242.3777-1-ming.huang@linaro.org> References: <20180720080242.3777-1-ming.huang@linaro.org> Subject: [PATCH edk2-platforms v1 04/13] Hisilicon/Pci: Add two api for PciPlatform driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 20 Jul 2018 08:04:22 -0000 PciPlatform may add some features platform special, like InitAtu and EnlargeAtu for Hi161x, MaxPlayload for Hi1620. So Add two api for expansibility. This patch is to prepare moving EnlargeAtuConfig0() out of PciHostBridge. Since the function was originally called in NotifyPhase() of phase EfiPciHostBridgeEndEnumeration, so we propose to move it to EFI_PCI_PLATFORM_PROTOCOL->PlatformNotify(). To reduce redundant ATU definitions, we also move InitAtu to PciPlatformLib in Hi161x. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.c | 45 ++++++++++++++++++++ Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf | 1 + 2 files changed, 46 insertions(+) diff --git a/Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.c b/Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.c index 8bfac2d99f..fcdd36cf94 100644 --- a/Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.c +++ b/Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.c @@ -103,6 +103,48 @@ PCI_OPTION_ROM_TABLE mPciOptionRomTable[] = { } }; +/*++ + + Routine Description: + + Perform Platform initialization first in PciPlatform. + + Arguments: + + Returns: + + VOID. + +--*/ +VOID +EFIAPI +PciInitPlatform ( + VOID + ); + +/*++ + + Routine Description: + + Perform Platform initialization by the phase indicated. + + Arguments: + + HostBridge - The associated PCI host bridge handle. + Phase - The phase of the PCI controller enumeration. + ChipsetPhase - Defines the execution phase of the PCI chipset driver. + + Returns: + +--*/ +VOID +EFIAPI +PhaseNotifyPlatform ( + IN EFI_HANDLE HostBridge, + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase, + IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase + ); + EFI_STATUS EFIAPI GetPlatformPolicy ( @@ -387,6 +429,7 @@ Returns: --*/ { + PhaseNotifyPlatform (HostBridge, Phase, ChipsetPhase); return EFI_SUCCESS; } @@ -415,6 +458,8 @@ Returns: EFI_STATUS Status; PCI_PLATFORM_PRIVATE_DATA *PciPrivateData; + PciInitPlatform (); + PciPrivateData = AllocateZeroPool (sizeof (PCI_PLATFORM_PRIVATE_DATA)); mPciPrivateData = PciPrivateData; diff --git a/Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf b/Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf index 8b170d2654..099021fcc8 100644 --- a/Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf +++ b/Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf @@ -38,6 +38,7 @@ ArmLib IoLib MemoryAllocationLib + PciPlatformLib [Protocols] gEfiPciPlatformProtocolGuid -- 2.17.0