From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::441; helo=mail-pf1-x441.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id EC85C210C125C for ; Tue, 24 Jul 2018 00:24:10 -0700 (PDT) Received: by mail-pf1-x441.google.com with SMTP id l9-v6so637320pff.9 for ; Tue, 24 Jul 2018 00:24:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=yNCT88X6dmgXTIelZSSB6beYdom8f5DOiU7LA+gfxD8=; b=iY/OI/5mq7p1LANpjDX39juE0/pWSywm0jsUhIUlfy10meTbqli81BnUrCqGcA1x2h qDwG2IHx/ke7fXOi5mvhetj0bn4KvwnSBK4gy/MMpy4V2OtCdO9Uvj9EPC13bIu5YdSG oc0Nd57u8/CgIEjx9IAgL++wGM/QQ97FllYNE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=yNCT88X6dmgXTIelZSSB6beYdom8f5DOiU7LA+gfxD8=; b=hC25txGTmbt+GhSiC3qX7s3YAuvQgO214W2tke0KF/5ycbCr1lEgNZxLpbv0LkxNjL 9HhcYHDtFiFzIunZ8OHYjUrkwCZtJX0hbfWDdpcU1HnouQsivvmEQBEFtc7bA+iTEahb cAkL566jFzv71EzEvAaFVQ+RWANK/lZm0/WXWK14Bzrdgxk20/NT4mOoLtPLtItx51kT i97KaPE/2AE7UDHbV7BSv1mI1lJZP/CVySV+orIv3cM+N8JEzXOmJgsrUYVz5etu+LHz +4ja5CW4E7++TgppOBtt7+9RmfBtX/pdKFMZ304IfM+xngNAIUqlkBz2xYKhpePQe0Gl KHEA== X-Gm-Message-State: AOUpUlFKOx/FWN5jSdLDpMhr7mTh63QYg5RyvvDOtqMgcM0EeIM+1qFr kpwM3zXkAgNniqEEe0UlUW5vKA== X-Google-Smtp-Source: AAOMgpcLsco8pVDJL1eGxy4aFmircGOWOfiUzjeuTJKSLP6MV88BWmpf3++i2lRid0yuoAzM80zSPw== X-Received: by 2002:a63:1722:: with SMTP id x34-v6mr15335794pgl.268.1532417050739; Tue, 24 Jul 2018 00:24:10 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id t14-v6sm11449788pgu.0.2018.07.24.00.23.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Jul 2018 00:24:10 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org, shaochangliang , Ming Huang , Heyi Guo Date: Tue, 24 Jul 2018 15:09:18 +0800 Message-Id: <20180724070922.63362-35-ming.huang@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180724070922.63362-1-ming.huang@linaro.org> References: <20180724070922.63362-1-ming.huang@linaro.org> Subject: [PATCH edk2-platforms v1 34/38] Silicon/Hisilicon/D06: Add I2C Bus Exception deal function X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 24 Jul 2018 07:24:11 -0000 From: shaochangliang During the period of I2c accessing, if the board is reset unexpectedly, and because the I2c client can not reset, the SDA will be always pull down, then it cause I2C bus Exception. Follow the Hi1620 I2C FS chapter 1.8.2 design, add I2C Bus Exception deal function. It will Config SCL and SDA to GPIO, and set the reversal frequency of SCL to 10KHz. The implementation of functions is in edk2-non-osi. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shaochangliang Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h index cc60e213de..483c2c2d41 100644 --- a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h +++ b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h @@ -106,4 +106,9 @@ VOID CloseClusterClock(UINTN CpuClusterBase); VOID EnableClusterClock(UINTN CpuClusterBase); VOID CloseSktClock (UINT8 Skt); +EFI_STATUS EFIAPI DealI2cBusException(UINT32 Socket); +EFI_STATUS +EFIAPI +I2C_DealException(UINT32 Socket, UINT32 Port); + #endif -- 2.17.0