From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::42c; helo=mail-pf1-x42c.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x42c.google.com (mail-pf1-x42c.google.com [IPv6:2607:f8b0:4864:20::42c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 08988210F1554 for ; Tue, 14 Aug 2018 01:10:45 -0700 (PDT) Received: by mail-pf1-x42c.google.com with SMTP id k19-v6so8942988pfi.1 for ; Tue, 14 Aug 2018 01:10:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=nb2lHWdGG4YFVsPmiI2pdHv67gASNQbcGb8j0MRoPj8=; b=AXlCiyGpO/JlTuSRVTxYEsc0S4mZmiocP+0l7Vdo6ni2XhZ83Fk2bw13yIDAJm5leM cVFC/Qx3IXki/ZsvelZcvZlokVb9JaSimk/kf86eqmoD7O6XKnicAMUkVUp0jP4O+3Xb GtRgiXd7XdwDHMbPUjjQ4nAJZ6kHrunPErjwQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nb2lHWdGG4YFVsPmiI2pdHv67gASNQbcGb8j0MRoPj8=; b=ITd7QXqZ9iyCjvkYXmekPDPsHCgnjdbzaKX4dQ6NPH99vsro1KvSae34jnHWdZnAeE 26ZHgmTLtW55+t703Mc6IfBEpn9lxlooHZn7TXcA4j8K/1LmCiI0m7s5zuT3i9RXQwFL /3PIfuScIIBLotnfJuZxere7+9vmgA0nEzBjZfHmfRScPuy75XSWyTkNCscs/4o177Ho Bn1LEHdFvcTpcTehXOhZBxrTBxoSd+otu8MldyMfH1yduBL9I8+QdvCHmhn/dMOUKds6 DpmMBZ04QMlUFwMS/FoHS48GPZMw4UILpYpQLjAimOYFAxbeduXh00PPL3QBPAokRJL9 WmaA== X-Gm-Message-State: AOUpUlFVpMeHb+N/lAM8hsKiQCmeINabU4DOUD28ZFwr98mcGFJKJv+L 1oI1JjvA8dn6I00R8PQshfOLWA== X-Google-Smtp-Source: AA+uWPzWt+ze7tnWDc7D1s/oMXdIxcVd8VVkQzd1vYv7hRcl4PRdhrNrDx1geUQoyeDlVHBL3Vqr2g== X-Received: by 2002:a65:5b8e:: with SMTP id i14-v6mr20301587pgr.242.1534234245581; Tue, 14 Aug 2018 01:10:45 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id h130-v6sm72905670pgc.88.2018.08.14.01.10.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 14 Aug 2018 01:10:44 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org, Ming Huang Date: Tue, 14 Aug 2018 16:08:43 +0800 Message-Id: <20180814080903.50466-24-ming.huang@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180814080903.50466-1-ming.huang@linaro.org> References: <20180814080903.50466-1-ming.huang@linaro.org> Subject: [PATCH edk2-platforms v2 23/43] Silicon/Hisilicon/D06: Add I2C delay for HNS auto config X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 14 Aug 2018 08:10:46 -0000 Because I2C Port5 salve device connect under I2C extender (9545 device), it will cost more time to access I2C slave device, so add delay time for HNS auto config. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Library/I2CLib/I2CHw.h | 3 +++ Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 21 +++++++++++++++----- 2 files changed, 19 insertions(+), 5 deletions(-) diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h index fa954c7937..d77aea509e 100644 --- a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h +++ b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h @@ -19,6 +19,9 @@ #include #include +// The HNS I2C port 5 is under I2C extender +#define I2C_EXTENDER_PORT_HNS 5 + #define I2C_READ_TIMEOUT 500 #define I2C_DRV_ONCE_WRITE_BYTES_NUM 8 #define I2C_DRV_ONCE_READ_BYTES_NUM 8 diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c index d67ddc7f9b..59633106ce 100644 --- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c +++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c @@ -258,8 +258,13 @@ CheckI2CTimeOut ( if (Transfer == I2CTx) { Fifo = I2C_GetTxStatus (Socket, Port); while (Fifo != 0) { - // This is a empirical value for I2C delay. MemoryFance is no need here. - I2C_Delay (2); + if (Port == I2C_EXTENDER_PORT_HNS) { + // This is a empirical value for I2C delay. MemoryFance is no need here. + I2C_Delay (1000); + } else { + // This is a empirical value for I2C delay. MemoryFance is no need here. + I2C_Delay (2); + } if (++Times > I2C_READ_TIMEOUT) { (VOID)I2C_Disable (Socket, Port); return EFI_TIMEOUT; @@ -269,8 +274,13 @@ CheckI2CTimeOut ( } else { Fifo = I2C_GetRxStatus (Socket, Port); while (Fifo == 0) { - // This is a empirical value for I2C delay. MemoryFance is no need here. - I2C_Delay (2); + if (Port == I2C_EXTENDER_PORT_HNS) { + // This is a empirical value for I2C delay. MemoryFance is no need here. + I2C_Delay (1000); + } else { + // This is a empirical value for I2C delay. MemoryFance is no need here. + I2C_Delay (2); + } if (++Times > I2C_READ_TIMEOUT) { (VOID)I2C_Disable (Socket, Port); return EFI_TIMEOUT; @@ -369,7 +379,8 @@ I2CWrite( Times = 0; Fifo = I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); while (Fifo > I2C_TXRX_THRESHOLD) { - I2C_Delay (2); + // This is a empirical value for I2C delay. MemoryFance is no need here. + I2C_Delay (1000); if (++Times > I2C_READ_TIMEOUT) { (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); return EFI_TIMEOUT; -- 2.17.0