From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.120; helo=mga04.intel.com; envelope-from=eric.dong@intel.com; receiver=edk2-devel@lists.01.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id ECE8F210ED792 for ; Tue, 14 Aug 2018 19:14:39 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Aug 2018 19:14:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,241,1531810800"; d="scan'208";a="81837402" Received: from ydong10-win10.ccr.corp.intel.com ([10.239.9.125]) by orsmga001.jf.intel.com with ESMTP; 14 Aug 2018 19:14:38 -0700 From: Eric Dong To: edk2-devel@lists.01.org Cc: Laszlo Ersek , Ruiyu Ni Date: Wed, 15 Aug 2018 10:14:31 +0800 Message-Id: <20180815021435.13748-2-eric.dong@intel.com> X-Mailer: git-send-email 2.15.0.windows.1 In-Reply-To: <20180815021435.13748-1-eric.dong@intel.com> References: <20180815021435.13748-1-eric.dong@intel.com> Subject: [Patch v4 1/5] UefiCpuPkg/PiSmmCpuDxeSmm: Use GDT/IDT saved in Smram. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Aug 2018 02:14:40 -0000 Current implementation will copy GDT/IDT at SmmReadyToLock point from ACPI NVS memory to Smram. Later at S3 resume phase, it restore the memory saved in Smram to ACPI NVS. It can directly use GDT/IDT saved in Smram instead of restore the original ACPI NVS memory. This patch do this change. V4 changes: 1. Remove global variables mGdtForAp/mIdtForAp/mMachineCheckHandlerForAp. Test Done: Do the OS boot and S3 resume test. Cc: Laszlo Ersek Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 31 ++++++++++++++----------------- 1 file changed, 14 insertions(+), 17 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index 0b8ef70359..abd8a5a07b 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -66,9 +66,6 @@ ACPI_CPU_DATA mAcpiCpuData; volatile UINT32 mNumberToFinish; MP_CPU_EXCHANGE_INFO *mExchangeInfo; BOOLEAN mRestoreSmmConfigurationInS3 = FALSE; -VOID *mGdtForAp = NULL; -VOID *mIdtForAp = NULL; -VOID *mMachineCheckHandlerForAp = NULL; MP_MSR_LOCK *mMsrSpinLocks = NULL; UINTN mMsrSpinLockCount; UINTN mMsrCount = 0; @@ -448,13 +445,6 @@ PrepareApStartupVector ( CopyMem ((VOID *) (UINTN) &mExchangeInfo->GdtrProfile, (VOID *) (UINTN) mAcpiCpuData.GdtrProfile, sizeof (IA32_DESCRIPTOR)); CopyMem ((VOID *) (UINTN) &mExchangeInfo->IdtrProfile, (VOID *) (UINTN) mAcpiCpuData.IdtrProfile, sizeof (IA32_DESCRIPTOR)); - // - // Copy AP's GDT, IDT and Machine Check handler from SMRAM to ACPI NVS memory - // - CopyMem ((VOID *) mExchangeInfo->GdtrProfile.Base, mGdtForAp, mExchangeInfo->GdtrProfile.Limit + 1); - CopyMem ((VOID *) mExchangeInfo->IdtrProfile.Base, mIdtForAp, mExchangeInfo->IdtrProfile.Limit + 1); - CopyMem ((VOID *)(UINTN) mAcpiCpuData.ApMachineCheckHandlerBase, mMachineCheckHandlerForAp, mAcpiCpuData.ApMachineCheckHandlerSize); - mExchangeInfo->StackStart = (VOID *) (UINTN) mAcpiCpuData.StackAddress; mExchangeInfo->StackSize = mAcpiCpuData.StackSize; mExchangeInfo->BufferStart = (UINT32) StartupVector; @@ -831,6 +821,9 @@ GetAcpiCpuData ( ACPI_CPU_DATA *AcpiCpuData; IA32_DESCRIPTOR *Gdtr; IA32_DESCRIPTOR *Idtr; + VOID *GdtForAp; + VOID *IdtForAp; + VOID *MachineCheckHandlerForAp; if (!mAcpiS3Enable) { return; @@ -893,14 +886,18 @@ GetAcpiCpuData ( Gdtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.GdtrProfile; Idtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.IdtrProfile; - mGdtForAp = AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) + mAcpiCpuData.ApMachineCheckHandlerSize); - ASSERT (mGdtForAp != NULL); - mIdtForAp = (VOID *) ((UINTN)mGdtForAp + (Gdtr->Limit + 1)); - mMachineCheckHandlerForAp = (VOID *) ((UINTN)mIdtForAp + (Idtr->Limit + 1)); + GdtForAp = AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) + mAcpiCpuData.ApMachineCheckHandlerSize); + ASSERT (GdtForAp != NULL); + IdtForAp = (VOID *) ((UINTN)GdtForAp + (Gdtr->Limit + 1)); + MachineCheckHandlerForAp = (VOID *) ((UINTN)IdtForAp + (Idtr->Limit + 1)); + + CopyMem (GdtForAp, (VOID *)Gdtr->Base, Gdtr->Limit + 1); + CopyMem (IdtForAp, (VOID *)Idtr->Base, Idtr->Limit + 1); + CopyMem (MachineCheckHandlerForAp, (VOID *)(UINTN)mAcpiCpuData.ApMachineCheckHandlerBase, mAcpiCpuData.ApMachineCheckHandlerSize); - CopyMem (mGdtForAp, (VOID *)Gdtr->Base, Gdtr->Limit + 1); - CopyMem (mIdtForAp, (VOID *)Idtr->Base, Idtr->Limit + 1); - CopyMem (mMachineCheckHandlerForAp, (VOID *)(UINTN)mAcpiCpuData.ApMachineCheckHandlerBase, mAcpiCpuData.ApMachineCheckHandlerSize); + Gdtr->Base = (UINTN)GdtForAp; + Idtr->Base = (UINTN)IdtForAp; + mAcpiCpuData.ApMachineCheckHandlerBase = (EFI_PHYSICAL_ADDRESS)(UINTN)MachineCheckHandlerForAp; } /** -- 2.15.0.windows.1