From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::242; helo=mail-wm0-x242.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x242.google.com (mail-wm0-x242.google.com [IPv6:2a00:1450:400c:c09::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D80EE21959CB2 for ; Fri, 17 Aug 2018 05:23:25 -0700 (PDT) Received: by mail-wm0-x242.google.com with SMTP id s9-v6so7415543wmh.3 for ; Fri, 17 Aug 2018 05:23:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=SmXspHDxPlLMZY4o9PYnY2+Er8ONpXAuHC3rWDTE9bw=; b=CZay7GqbOsUkdIn0fYrvKLuzfhAeN5OokWT5PniS5LR2oTQtUmpi0EJDU6YRuP+Cje O5GHUTScUBS9O5nrToa08/x//TP5AWQM5tkueAuPwKij6UISBx4H4Z9BS644g+1YtrPj dxI6Bpxk2hZ1dmjK9OaXRkZOwLyLvzYfl7Lio= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=SmXspHDxPlLMZY4o9PYnY2+Er8ONpXAuHC3rWDTE9bw=; b=UGvQY0x1L4FJXX+C6uMfW9pj6XLpKiOHMJMmPho0B3eO/M0wl9J7aFDchrVa3wMBDd JEZVDXxjwL++4MQ6t8cHrk2N0PhSIRYzYNyi8rzmLW9ww0XFu0zXLP+ENgmp7SEDy+x0 tikirZMSAtEYpmSOwi327e4OrxsN34jKwcT0h+wrFLDZbdYF540v7uMXkUs16+ifW2jM TT3z5+K74Ejd69DwJSAENGLs8xquwbcvRcQHgmXG1vGfkUgemHjdUlZtvGBAsDUi9qGs KatrO3DvDgZvF9IhtVUvZm3F5vQTew5VCc1j2rqaj4PKLVI95Mkq7dvX8wcTbB9iVOW1 QWMg== X-Gm-Message-State: AOUpUlE9Z7lvan5tIbP3iUcyrql5uB+IAqlHVDbi9zpVAeJUVM0Dd4f8 sYhPgC9CwlGzd8ZX/d2Q10CXgQ== X-Google-Smtp-Source: AA+uWPxsZwslCbDjGU9N1WCejHU/pPxCjVNAyHulqbvebgWP8Pc1OMPDWFTlt8w6XkXUkstAmia5pQ== X-Received: by 2002:a1c:3e8f:: with SMTP id l137-v6mr18552350wma.132.1534508604047; Fri, 17 Aug 2018 05:23:24 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id o16-v6sm2362696wmf.10.2018.08.17.05.23.22 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 17 Aug 2018 05:23:22 -0700 (PDT) Date: Fri, 17 Aug 2018 13:23:21 +0100 From: Leif Lindholm To: Ming Huang Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org Message-ID: <20180817122320.xqu6hieqvzskzass@bivouac.eciton.net> References: <20180816121239.44129-1-ming.huang@linaro.org> MIME-Version: 1.0 In-Reply-To: <20180816121239.44129-1-ming.huang@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms v3 00/36] Upload for D06 platform X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 17 Aug 2018 12:23:26 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi Ming, Please do not send new revisions while I'm still reviewing the previous one. It is possible you inferred that I wanted this from some comment I made about changes I wanted to see _when_ the next revision was sent out, but this was not my meaning. If I want a new revision sent out before I have finished reviewing the current one, I will ask for it explicitly. Do however please include a summary of what has changed since the previous revision. And keep this summary when you send a subsequent patch, so you end up with: Changes since v3: - ... - ... Changes since v2: - ... - ... - ... Changes since v1: - ... In this instance, it seems like patches 1-7 went missing. I pushed 6-7, but 1-5 were still under review. And please remember the --stat and --stat-graph-width from https://github.com/tianocore/tianocore.github.io/wiki/Laszlo's-unkempt-git-guide-for-edk2-contributors-and-maintainers#contrib-23 I will continue reviewing v2. Please do not send a v4 until I ask for it. Regards, Leif On Thu, Aug 16, 2018 at 08:12:03PM +0800, Ming Huang wrote: > The major features of this patchset include: > 1 D06 source code; > 2 Unify some D0x modules; > > This patch set is base on pcihostbridage-v2. > For compiling D06, add below hunk to edk2-platforms.config > [d06] > LONGNAME=HiSilicon D06 > DSC=Platform/Hisilicon/D06/D06.dsc > ARCH=AARCH64 > > Code can also be found in github: https://github.com/hisilicon/OpenPlatformPkg.git > branch: d06-platform-v3 > > > Heyi Guo (3): > Hisilicon/D06: Add Debug Serial Port Init Driver > Hisilicon/Hi1620: Add ACPI PPTT table > Platform/Hisilicon/D06: Enable ACPI PPTT > > Luqi Jiang (1): > Hisilicon/D06: add apei driver > > Ming Huang (27): > Hisilicon/D0x: Unify FlashFvbDxe driver > Hisilicon/D0X: Rename the global variable gDS3231RtcDevice > Hisilicon/D06: Add several base file for D06 > Platform/Hisilicon/D06: Add M41T83RealTimeClockLib > Platform/Hisilicon/D06: Add edk2-non-osi components for D06 > Hisilicon/D06: Add OemMiscLibD06 > Silicon/Hisilicon/D06: Wait for all disk ready > Silicon/Hisilicon/Acpi: Unify HisiAcipPlatformDxe > Hisilicon/D06: Add ACPI Tables for D06 > Silicon/Hisilicon/D06: Stop watchdog > Hisilicon/I2C: Modify I2CLib.c for coding style > Silicon/Hisilicon/I2C: Refactor I2C library > Silicon/Hisilicon/D06: Fix I2C enable fail issue for D06 > Silicon/Hisilicon/D06: Add I2C delay for HNS auto config > Hisilicon/I2C: Fix a typo issue > Platform/Hisilicon/D06: Add OemNicLib > Platform/Hisilicon/D06: Add OemNicConfig2P Driver > Platform/Hisilicon/D06: Add EarlyConfigPeim peim > Platform/Hisilicon/D06: Add PciHostBridgeLib > Silicon/Hisilicon/D06: Add some Lpc macro to LpcLib.h > Platform/Hisilicon/D06: Add capsule upgrade support > Silicon/Hisilicon/D06: Add I2C Bus Exception handle function > Silicon/Hisilicon/Setup: Support SPCR table switch > Silicon/Hisilicon/setup: Support SMMU switch > Hisilicon/D06: Add PciPlatformLib > Hisilicon/D06: Add edk2-non-osi Shell components > Platform/Hisilicon/D0x: Update version string to 18.08 > > Sun Yuanchen (1): > Hisilicon/D0x: Update SMBIOS type9 info > > Yang XinYi (2): > Hisilicon/D06: Add Hi1620OemConfigUiLib > Silicon/Hisilicon/Setup: Add Setup Item "EnableGOP" > > ZhenYao (1): > Silicon/Hisilicon/D06: Modify for close slave core clock. > > shaochangliang (1): > Silicon/Hisilicon/D06: Optimize HNS config CDR post time > > Platform/Hisilicon/D06/D06.dec | 29 + > Silicon/Hisilicon/HisiPkg.dec | 6 + > Platform/Hisilicon/D03/D03.dsc | 2 +- > Platform/Hisilicon/D05/D05.dsc | 2 +- > Platform/Hisilicon/D06/D06.dsc | 490 + > Platform/Hisilicon/D03/D03.fdf | 6 +- > Platform/Hisilicon/D05/D05.fdf | 6 +- > Platform/Hisilicon/D06/D06.fdf | 444 + > .../OemMiscLib2P/OemMiscLib2PHi1610.inf | 1 + > .../Library/OemMiscLibD05/OemMiscLibD05.inf | 1 + > .../OemNicConfig2PHi1620/OemNicConfig2P.inf | 43 + > .../SystemFirmwareDescriptor.inf | 50 + > .../EarlyConfigPeim/EarlyConfigPeimD06.inf | 50 + > .../Library/OemMiscLibD06/OemMiscLibD06.inf | 51 + > .../D06/Library/OemNicLib/OemNicLib.inf | 35 + > .../PciHostBridgeLib/PciHostBridgeLib.inf | 36 + > .../Drivers/FlashFvbDxe/FlashFvbDxe.inf | 7 +- > .../HisiAcpiPlatformDxe/AcpiPlatformDxe.inf | 3 +- > .../ProcessorSubClassDxe.inf | 2 + > .../Hisilicon/Hi1620/Drivers/Apei/Apei.inf | 59 + > .../Pl011DebugSerialPortInitDxe.inf | 48 + > .../Hi1620AcpiTables/AcpiTablesHi1620.inf | 59 + > .../Hi1620OemConfigUiLib/OemConfigUiLib.inf | 68 + > .../Hi1620PciPlatformLib.inf | 30 + > Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf | 48 + > .../M41T83RealTimeClockLib.inf | 46 + > .../PlatformBootManagerLib.inf | 4 + > .../OemNicConfig2PHi1620/OemNicConfig.h | 25 + > .../Hisilicon/D06/Include/Library/CpldD06.h | 39 + > .../Hisilicon/Hi1610/Include/PlatformArch.h | 6 + > Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h | 41 + > .../Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h | 43 + > .../Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h | 146 + > .../Hi1620/Drivers/Apei/ErrorSource/Ghes.h | 110 + > .../Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h | 146 + > .../Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h | 59 + > .../Hi1620/Drivers/Apei/OemApeiHi1620.h | 43 + > .../Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 27 + > .../Hi1620/Hi1620OemConfigUiLib/OemConfig.h | 142 + > .../Hi1620/Hi1620OemConfigUiLib/OemConfigUi.h | 64 + > .../Hi1620/Include/Library/SerdesLib.h | 85 + > .../Hisilicon/Hi1620/Include/PlatformArch.h | 67 + > Silicon/Hisilicon/Hi1620/Pptt/Pptt.h | 68 + > .../Hisilicon/Include/Library/AcpiNextLib.h | 31 +- > .../Hisilicon/Include/Library/IpmiCmdLib.h | 16 + > Silicon/Hisilicon/Include/Library/LpcLib.h | 51 +- > .../Include/Library/OemAddressMapLib.h | 8 + > .../Hisilicon/Include/Library/OemConfigData.h | 85 + > .../Hisilicon/Include/Library/OemMiscLib.h | 9 +- > Silicon/Hisilicon/Include/Library/OemNicLib.h | 57 + > .../Include/Library/PlatformSysCtrlLib.h | 6 + > .../Include/Protocol/PlatformSasNotify.h | 27 + > Silicon/Hisilicon/Library/I2CLib/I2CHw.h | 9 +- > .../M41T83RealTimeClock.h | 158 + > .../DS3231RealTimeClockLib.c | 8 +- > .../OemMiscLib2P/BoardFeature2PHi1610.c | 2 +- > .../Library/OemMiscLib2P/OemMiscLib2PHi1610.c | 24 + > .../Library/OemMiscLibD05/BoardFeatureD05.c | 2 +- > .../D05/Library/OemMiscLibD05/OemMiscLibD05.c | 27 +- > .../OemNicConfig2PHi1620/OemNicConfig2P.c | 71 + > .../SystemFirmwareDescriptorPei.c | 70 + > .../D06/EarlyConfigPeim/EarlyConfigPeimD06.c | 107 + > .../Library/OemMiscLibD06/BoardFeatureD06.c | 432 + > .../D06/Library/OemMiscLibD06/OemMiscLibD06.c | 209 + > .../D06/Library/OemNicLib/OemNicLib.c | 570 + > .../PciHostBridgeLib/PciHostBridgeLib.c | 635 + > .../Drivers/FlashFvbDxe/FlashFvbDxe.c | 22 +- > .../HisiAcpiPlatformDxe/UpdateAcpiTable.c | 114 +- > .../Smbios/AddSmbiosType9/AddSmbiosType9.c | 14 +- > Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c | 108 + > .../Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c | 92 + > .../Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c | 349 + > .../Hi1620/Drivers/Apei/ErrorSource/Ghes.c | 330 + > .../Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c | 374 + > .../Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c | 119 + > .../Hi1620/Drivers/Apei/OemApeiHi1620.c | 337 + > .../Pl011DebugSerialPortInitDxe.c | 64 + > .../Hi1620/Hi1620OemConfigUiLib/OemConfig.c | 364 + > .../Hi1620PciPlatformLib.c | 67 + > Silicon/Hisilicon/Hi1620/Pptt/Pptt.c | 543 + > .../DS3231RealTimeClockLib.c | 8 +- > Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 975 +- > .../M41T83RealTimeClockLib.c | 564 + > .../PlatformBootManagerLib/PlatformBm.c | 59 + > .../SystemFirmwareUpdateConfig.ini | 46 + > .../SystemFirmwareDescriptor.aslc | 81 + > .../OemMiscLibD06/BoardFeatureD06Strings.uni | 64 + > .../Hi1620/Hi1620AcpiTables/Dsdt/CPU.asl | 409 + > .../Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 30 + > .../Hi1620AcpiTables/Dsdt/DsdtHi1620.asl | 35 + > .../Hi1620AcpiTables/Dsdt/Hi1620Apei.asl | 93 + > .../Hi1620AcpiTables/Dsdt/Hi1620Ged.asl | 58 + > .../Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 1459 +++ > .../Hi1620AcpiTables/Dsdt/Hi1620Mctp.asl | 41 + > .../Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 1216 ++ > .../Hi1620AcpiTables/Dsdt/Hi1620Power.asl | 28 + > .../Hi1620AcpiTables/Dsdt/Hi1620Rde.asl | 47 + > .../Hi1620AcpiTables/Dsdt/Hi1620Sec.asl | 57 + > .../Dsdt/Hi1620Socip4_i2c100k.asl | 249 + > .../Dsdt/Hi1620Socip4_i2c400k.asl | 249 + > .../Hi1620AcpiTables/Dsdt/LpcUart_clk.asl | 49 + > .../Hi1620AcpiTables/Dsdt/Pv680UncorePmu.asl | 1658 +++ > .../Hi1620/Hi1620AcpiTables/Dsdt/ipmi.asl | 49 + > .../Hi1620/Hi1620AcpiTables/Facs.aslc | 67 + > .../Hi1620/Hi1620AcpiTables/Fadt.aslc | 91 + > .../Hi1620/Hi1620AcpiTables/Gtdt.aslc | 86 + > .../Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 86 + > .../Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 1989 +++ > .../Hi1620AcpiTables/Hi1620IortNoSmmu.asl | 1736 +++ > .../Hi1620/Hi1620AcpiTables/Hi1620Mcfg.aslc | 64 + > .../Hi1620/Hi1620AcpiTables/Hi1620Slit.aslc | 64 + > .../Hi1620/Hi1620AcpiTables/Hi1620Spcr.aslc | 81 + > .../Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 166 + > .../Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 375 + > .../Hi1620OemConfigUiLib/MemoryConfig.hfr | 154 + > .../Hi1620OemConfigUiLib/MemoryConfig.uni | 103 + > .../Hi1620OemConfigUiLib/MiscConfig.hfr | 48 + > .../Hi1620OemConfigUiLib/MiscConfig.uni | 27 + > .../Hi1620OemConfigUiLib/OemConfigUiLib.uni | 24 + > .../OemConfigUiLibStrings.uni | 42 + > .../Hi1620OemConfigUiLib/OemConfigVfr.Vfr | 89 + > .../Hi1620OemConfigUiLib/PcieConfig.hfr | 219 + > .../PcieConfigStrings.uni | 111 + > .../Hi1620OemConfigUiLib/PciePortConfig.hfr | 167 + > .../Hi1620/Hi1620OemConfigUiLib/RasConfig.hfr | 172 + > .../Hi1620/Hi1620OemConfigUiLib/RasConfig.uni | 85 + > .../Hi1620OemConfigUiLib/iBMCConfig.hfr | 81 + > .../Hi1620OemConfigUiLib/iBMCConfig.uni | 34 + > v2/v2-0000-cover-letter.patch | 316 + > ...icon-Modify-the-MRC-interface-for-ot.patch | 553 + > ...on-Hisilicon-Separate-PlatformArch.h.patch | 64 + > ...icon-Acpi-Move-some-macro-to-Platfor.patch | 168 + > ...icon-D0x-Move-dimm-size-definition-t.patch | 57 + > ...icon-D0x-Move-RAS-macro-to-PlatformA.patch | 68 + > ...-Move-CustomData.Fv-to-common-path-o.patch | 45 + > ...-Move-IpmiCmdLib-to-common-path-of-H.patch | 45 + > ...silicon-D0x-Unify-FlashFvbDxe-driver.patch | 170 + > ...-Rename-the-global-variable-gDS3231R.patch | 142 + > ...on-D06-Add-several-base-file-for-D06.patch | 1160 ++ > ...licon-D06-Add-M41T83RealTimeClockLib.patch | 818 ++ > ...licon-D06-Add-edk2-non-osi-component.patch | 149 + > ...0013-Hisilicon-D06-Add-OemMiscLibD06.patch | 751 ++ > ...isilicon-D06-Wait-for-all-disk-ready.patch | 132 + > ...licon-Acpi-Unify-HisiAcipPlatformDxe.patch | 126 + > ...06-Add-Debug-Serial-Port-Init-Driver.patch | 172 + > ...isilicon-D06-Add-ACPI-Tables-for-D06.patch | 10864 ++++++++++++++++ > ...silicon-D06-Add-Hi1620OemConfigUiLib.patch | 2268 ++++ > ...-Silicon-Hisilicon-D06-Stop-watchdog.patch | 125 + > ...I2C-Modify-I2CLib.c-for-coding-style.patch | 1161 ++ > ...n-Hisilicon-I2C-Refactor-I2C-library.patch | 302 + > ...icon-D06-Fix-I2C-enable-fail-issue-f.patch | 55 + > ...icon-D06-Add-I2C-delay-for-HNS-auto-.patch | 80 + > ...-0024-Hisilicon-I2C-Fix-a-typo-issue.patch | 43 + > ...icon-D06-Optimize-HNS-config-CDR-pos.patch | 44 + > ...licon-Setup-Add-Setup-Item-EnableGOP.patch | 73 + > ...Hisilicon-Hi1620-Add-ACPI-PPTT-table.patch | 701 + > ...tform-Hisilicon-D06-Enable-ACPI-PPTT.patch | 41 + > ...Platform-Hisilicon-D06-Add-OemNicLib.patch | 647 + > ...ilicon-D06-Add-OemNicConfig2P-Driver.patch | 204 + > ...silicon-D0x-Update-SMBIOS-type9-info.patch | 325 + > ...silicon-D06-Add-EarlyConfigPeim-peim.patch | 227 + > ...m-Hisilicon-D06-Add-PciHostBridgeLib.patch | 716 + > ...2-0034-Hisilicon-D06-add-apei-driver.patch | 2508 ++++ > ...icon-D06-Add-some-Lpc-macro-to-LpcLi.patch | 85 + > ...licon-D06-Add-capsule-upgrade-suppor.patch | 434 + > ...icon-D06-Modify-for-close-slave-core.patch | 33 + > ...icon-D06-Add-I2C-Bus-Exception-handl.patch | 38 + > ...icon-Setup-Support-SPCR-table-switch.patch | 84 + > ...-Hisilicon-setup-Support-SMMU-switch.patch | 124 + > ...041-Hisilicon-D06-Add-PciPlatformLib.patch | 141 + > ...06-Add-edk2-non-osi-Shell-components.patch | 74 + > ...licon-D0x-Update-version-string-to-1.patch | 62 + > 172 files changed, 47754 insertions(+), 574 deletions(-) > create mode 100644 Platform/Hisilicon/D06/D06.dec > create mode 100644 Platform/Hisilicon/D06/D06.dsc > create mode 100644 Platform/Hisilicon/D06/D06.fdf > create mode 100644 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf > create mode 100644 Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf > create mode 100644 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf > create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf > create mode 100644 Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf > create mode 100644 Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf > create mode 100644 Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf > create mode 100644 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig.h > create mode 100644 Platform/Hisilicon/D06/Include/Library/CpldD06.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.h > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUi.h > create mode 100644 Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h > create mode 100644 Silicon/Hisilicon/Hi1620/Include/PlatformArch.h > create mode 100644 Silicon/Hisilicon/Hi1620/Pptt/Pptt.h > create mode 100644 Silicon/Hisilicon/Include/Library/OemConfigData.h > create mode 100644 Silicon/Hisilicon/Include/Library/OemNicLib.h > create mode 100644 Silicon/Hisilicon/Include/Protocol/PlatformSasNotify.h > create mode 100644 Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h > create mode 100644 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c > create mode 100644 Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c > create mode 100644 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c > create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c > create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c > create mode 100644 Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c > create mode 100644 Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.c > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c > create mode 100644 Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c > create mode 100644 Silicon/Hisilicon/Hi1620/Pptt/Pptt.c > create mode 100644 Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c > create mode 100644 Platform/Hisilicon/D06/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini > create mode 100644 Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc > create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06Strings.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/CPU.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/DsdtHi1620.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Apei.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Ged.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mctp.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Power.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Rde.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Sec.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Socip4_i2c100k.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Socip4_i2c400k.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/LpcUart_clk.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Pv680UncorePmu.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/ipmi.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Facs.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620IortNoSmmu.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Mcfg.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Slit.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Spcr.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MemoryConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MemoryConfig.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLibStrings.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.Vfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PciePortConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/RasConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/RasConfig.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/iBMCConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/iBMCConfig.uni > create mode 100644 v2/v2-0000-cover-letter.patch > create mode 100644 v2/v2-0001-Silicon-Hisilicon-Modify-the-MRC-interface-for-ot.patch > create mode 100644 v2/v2-0002-Silicon-Hisilicon-Separate-PlatformArch.h.patch > create mode 100644 v2/v2-0003-Silicon-Hisilicon-Acpi-Move-some-macro-to-Platfor.patch > create mode 100644 v2/v2-0004-Silicon-Hisilicon-D0x-Move-dimm-size-definition-t.patch > create mode 100644 v2/v2-0005-Silicon-Hisilicon-D0x-Move-RAS-macro-to-PlatformA.patch > create mode 100644 v2/v2-0006-Hisilicon-D0x-Move-CustomData.Fv-to-common-path-o.patch > create mode 100644 v2/v2-0007-Hisilicon-D0x-Move-IpmiCmdLib-to-common-path-of-H.patch > create mode 100644 v2/v2-0008-Hisilicon-D0x-Unify-FlashFvbDxe-driver.patch > create mode 100644 v2/v2-0009-Hisilicon-D0X-Rename-the-global-variable-gDS3231R.patch > create mode 100644 v2/v2-0010-Hisilicon-D06-Add-several-base-file-for-D06.patch > create mode 100644 v2/v2-0011-Platform-Hisilicon-D06-Add-M41T83RealTimeClockLib.patch > create mode 100644 v2/v2-0012-Platform-Hisilicon-D06-Add-edk2-non-osi-component.patch > create mode 100644 v2/v2-0013-Hisilicon-D06-Add-OemMiscLibD06.patch > create mode 100644 v2/v2-0014-Silicon-Hisilicon-D06-Wait-for-all-disk-ready.patch > create mode 100644 v2/v2-0015-Silicon-Hisilicon-Acpi-Unify-HisiAcipPlatformDxe.patch > create mode 100644 v2/v2-0016-Hisilicon-D06-Add-Debug-Serial-Port-Init-Driver.patch > create mode 100644 v2/v2-0017-Hisilicon-D06-Add-ACPI-Tables-for-D06.patch > create mode 100644 v2/v2-0018-Hisilicon-D06-Add-Hi1620OemConfigUiLib.patch > create mode 100644 v2/v2-0019-Silicon-Hisilicon-D06-Stop-watchdog.patch > create mode 100644 v2/v2-0020-Hisilicon-I2C-Modify-I2CLib.c-for-coding-style.patch > create mode 100644 v2/v2-0021-Silicon-Hisilicon-I2C-Refactor-I2C-library.patch > create mode 100644 v2/v2-0022-Silicon-Hisilicon-D06-Fix-I2C-enable-fail-issue-f.patch > create mode 100644 v2/v2-0023-Silicon-Hisilicon-D06-Add-I2C-delay-for-HNS-auto-.patch > create mode 100644 v2/v2-0024-Hisilicon-I2C-Fix-a-typo-issue.patch > create mode 100644 v2/v2-0025-Silicon-Hisilicon-D06-Optimize-HNS-config-CDR-pos.patch > create mode 100644 v2/v2-0026-Silicon-Hisilicon-Setup-Add-Setup-Item-EnableGOP.patch > create mode 100644 v2/v2-0027-Hisilicon-Hi1620-Add-ACPI-PPTT-table.patch > create mode 100644 v2/v2-0028-Platform-Hisilicon-D06-Enable-ACPI-PPTT.patch > create mode 100644 v2/v2-0029-Platform-Hisilicon-D06-Add-OemNicLib.patch > create mode 100644 v2/v2-0030-Platform-Hisilicon-D06-Add-OemNicConfig2P-Driver.patch > create mode 100644 v2/v2-0031-Hisilicon-D0x-Update-SMBIOS-type9-info.patch > create mode 100644 v2/v2-0032-Platform-Hisilicon-D06-Add-EarlyConfigPeim-peim.patch > create mode 100644 v2/v2-0033-Platform-Hisilicon-D06-Add-PciHostBridgeLib.patch > create mode 100644 v2/v2-0034-Hisilicon-D06-add-apei-driver.patch > create mode 100644 v2/v2-0035-Silicon-Hisilicon-D06-Add-some-Lpc-macro-to-LpcLi.patch > create mode 100644 v2/v2-0036-Platform-Hisilicon-D06-Add-capsule-upgrade-suppor.patch > create mode 100644 v2/v2-0037-Silicon-Hisilicon-D06-Modify-for-close-slave-core.patch > create mode 100644 v2/v2-0038-Silicon-Hisilicon-D06-Add-I2C-Bus-Exception-handl.patch > create mode 100644 v2/v2-0039-Silicon-Hisilicon-Setup-Support-SPCR-table-switch.patch > create mode 100644 v2/v2-0040-Silicon-Hisilicon-setup-Support-SMMU-switch.patch > create mode 100644 v2/v2-0041-Hisilicon-D06-Add-PciPlatformLib.patch > create mode 100644 v2/v2-0042-Hisilicon-D06-Add-edk2-non-osi-Shell-components.patch > create mode 100644 v2/v2-0043-Platform-Hisilicon-D0x-Update-version-string-to-1.patch > > -- > 2.17.0 >