From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::444; helo=mail-wr1-x444.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr1-x444.google.com (mail-wr1-x444.google.com [IPv6:2a00:1450:4864:20::444]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4DC4A210E8D56 for ; Tue, 21 Aug 2018 10:48:46 -0700 (PDT) Received: by mail-wr1-x444.google.com with SMTP id v90-v6so13419337wrc.0 for ; Tue, 21 Aug 2018 10:48:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=27fke1Nu82ghlJX6j41jDJygR730V/jg/iKLuHZP4tg=; b=Vadkx1VH1HRaFrm8swvrnj/HErlWMNLpI4a5DG2ms+lKvfQaAYWHHos3vOQ/sN2SBm fT94U8CojSkLV6QAfHAjwvxBPWEJJp2olXMmJDKcly3IKCvSug41qedRM/fJNQA5oLEk HQ+mM4S3zEA5/ChudwxwnRb88fm9ehUedvASM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=27fke1Nu82ghlJX6j41jDJygR730V/jg/iKLuHZP4tg=; b=RbFWD8sEsrMqPKzva50foxZdd+r4ELeElh0zes86cawvmM5sKPw0zwjl/9cwvMu/SH Yd/gu2E2QkRZRNG9M5ExttGuTmJcbxAZ9QAo3QivmGJlcHwTeMOsbbnrX86InG1x/bSC Jey7mpwFhFv5/Ppwv9s+2t24DVT6CLjdT6NAY1jKiFIXWfPhd4abMgB7ej+9fSnm6Uen py2n/HtKd/noFzgHgE1RorBdVn4dZu7I9Jpc71sLW96T1aMIYZMPkQLNZ6Gs1dPYQ/cV P757rBLf/MrKaULl2nAsQedTZ7P7uD3yOsP3F9aIFrnNsZEZ7KGea9PUx6e2XogCNQQF 9Wlg== X-Gm-Message-State: APzg51A3iavzLmHR5vwZ+6H049mGDEiFENhAkNQ/O72drm2XHjXZWL2N ufMKQenoRn6eN5ewv4cl/AkS1Q== X-Google-Smtp-Source: ANB0VdZS7S1oC4zjSdPZGbfxTlSaTDaQQq9XTryN2QV9rjrejikQGGOEs4wYbf2bk6Ki4NhGXZyi+Q== X-Received: by 2002:adf:d4c6:: with SMTP id w6-v6mr2002815wrk.185.1534873724370; Tue, 21 Aug 2018 10:48:44 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id u65-v6sm3905093wmd.31.2018.08.21.10.48.42 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 Aug 2018 10:48:43 -0700 (PDT) Date: Tue, 21 Aug 2018 18:48:41 +0100 From: Leif Lindholm To: Ming Huang Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org, Sun Yuanchen Message-ID: <20180821174841.5cjlk6h3xwld5kpc@bivouac.eciton.net> References: <20180814080903.50466-1-ming.huang@linaro.org> <20180814080903.50466-6-ming.huang@linaro.org> MIME-Version: 1.0 In-Reply-To: <20180814080903.50466-6-ming.huang@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms v2 05/43] Silicon/Hisilicon/D0x: Move RAS macro to PlatformArch.h X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 21 Aug 2018 17:48:46 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline This one needs to be rebased onto the modified 3/43. I have no other issues with it, so when you resubmit: Reviewed-by: Leif Lindholm On Tue, Aug 14, 2018 at 04:08:25PM +0800, Ming Huang wrote: > From: Sun Yuanchen > > Move some RAS macros definition to PlatformArch.h for > unifying D0x > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Sun Yuanchen > --- > Silicon/Hisilicon/Hi1610/Include/PlatformArch.h | 9 +++++++-- > Silicon/Hisilicon/Hi1616/Include/PlatformArch.h | 12 ++++++++++++ > 2 files changed, 19 insertions(+), 2 deletions(-) > > diff --git a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h > index 2ff076901e..f39ae0748c 100644 > --- a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h > +++ b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h > @@ -1,7 +1,7 @@ > /** @file > * > -* Copyright (c) 2015, Hisilicon Limited. All rights reserved. > -* Copyright (c) 2015, Linaro Limited. All rights reserved. > +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved. > +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved. > * > * This program and the accompanying materials > * are licensed and made available under the terms and conditions of the BSD License > @@ -32,6 +32,11 @@ > > #define S1_BASE 0x40000000000 > > +#define RASC_BASE (0x5000) > +/* configuration register for Rank statistical information */ > +#define RASC_CFG_INFOIDX_REG (RASC_BASE + 0x5C) > +/* configuration register for Sparing level */ > +#define RASC_CFG_SPLVL_REG (RASC_BASE + 0xB8) > > // > // ACPI table information used to initialize tables. > diff --git a/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h > index 60a60593be..e02e4bdabd 100644 > --- a/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h > +++ b/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h > @@ -30,6 +30,18 @@ > // Max NUMA node number for each node type > #define MAX_NUM_PER_TYPE 8 > > +#define RASC_BASE (0x5000) > +/* configuration register for Rank statistical information */ > +#define RASC_CFG_INFOIDX_REG (RASC_BASE + 0x5C) > +/* configuration register for Sparing level */ > +#define RASC_CFG_SPLVL_REG (RASC_BASE + 0xB8) > + > +// for acpi > +#define NODE_IN_SOCKET 2 > +#define CORE_NUM_PER_SOCKET 32 > +#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 10 > +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8 > + > #define S1_BASE 0x40000000000 > > // > -- > 2.17.0 >