From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::243; helo=mail-wm0-x243.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CF0F7210F93FD for ; Tue, 21 Aug 2018 14:49:00 -0700 (PDT) Received: by mail-wm0-x243.google.com with SMTP id f21-v6so207050wmc.5 for ; Tue, 21 Aug 2018 14:49:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=+cP5xOhEZEFFpwJ0LA4ZOfVcdnPxZxPKxFgwCUxjyI4=; b=bTfnTb/FQA+iROyY2uBJutXleQTTzghKrakHXuRQgOSSOLa9eIgC6Q3VMA2Osx97mg JB9+beL9SEcOhyIm0xh2YJlgzDxusm3+QO2IokAB8NOdTd6WEXJl6g+KxQDhz1Lhozjk IBAc+ILt9r9d709hsCaLjgoxy2717zUNuSKXs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=+cP5xOhEZEFFpwJ0LA4ZOfVcdnPxZxPKxFgwCUxjyI4=; b=O3RFLDqjUq/uEmBU7qozt4QiKDb7U6d4miynQxwTZv4oiBTSSFSRBFHoGP4Zm68yL5 XeYb2tZqeUZhpOqROoAftTc5OuqSCXJeU00u7LX7v3PPBhOvaioaIETok528i3IZcppx PEt9ih68trBGmNe/wdUTo37ci7K7v2fcw5UOm5ARQ5DNKMtOqhDt9F40U9CyrI3LDx+h kIkDldTAiR3FbNa1xmXAUS9OTvNhA0ok3gliBTR+/jwB7OzFuzi+M0kVGYrYVEzUP1+W 8ThORB5T9pkHf3zzZNYe1g35m8menMgaeqKhtoy91pk22xa+bZkjA8r505oU1zhmerCz yQvQ== X-Gm-Message-State: APzg51Au1cElh2PEPwPZESjx8NpYksyA9yZZi5uIWrIfXXikU1AToKNM fDx0HKmsk1F2zfjXMYb5BMs5ug== X-Google-Smtp-Source: ANB0VdbQTZL+2tde7Xk9CBxSWOnxQ8W3z/xHeoxt5M44Y/zcHgWY13lR26APLMG2eXTPhaXIKQ7h1A== X-Received: by 2002:a1c:4d09:: with SMTP id o9-v6mr743693wmh.111.1534888139406; Tue, 21 Aug 2018 14:48:59 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id x16-v6sm3763255wrm.69.2018.08.21.14.48.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 Aug 2018 14:48:58 -0700 (PDT) Date: Tue, 21 Aug 2018 22:48:56 +0100 From: Leif Lindholm To: Ming Huang Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org Message-ID: <20180821214856.nezdolpmjahb3gnn@bivouac.eciton.net> References: <20180816121239.44129-1-ming.huang@linaro.org> <20180816121239.44129-18-ming.huang@linaro.org> <20180821214544.ukuogabw5vp6wpq3@bivouac.eciton.net> MIME-Version: 1.0 In-Reply-To: <20180821214544.ukuogabw5vp6wpq3@bivouac.eciton.net> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms v3 17/36] Hisilicon/I2C: Fix a typo issue X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 21 Aug 2018 21:49:01 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Err, that was 13, 14 and 17 in v3. In v2, it's 20, 21, 24. (I pushed the right patches, I just replied to the wrong email.) On Tue, Aug 21, 2018 at 10:45:44PM +0100, Leif Lindholm wrote: > Patches 13, 14 and 17/43 are just cleanup and refactoring of I2C > library. It can (and should) go in before D06 support. > > For the three patches: > Reviewed-by: Leif Lindholm > > Pushed as 4e6af5fa1b..342330470f. > > On Thu, Aug 16, 2018 at 08:12:20PM +0800, Ming Huang wrote: > > Modify spedd to Speed. > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Ming Huang > > --- > > Silicon/Hisilicon/Library/I2CLib/I2CHw.h | 2 +- > > Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 2 +- > > 2 files changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h > > index d77aea509e..6fd7b8183e 100644 > > --- a/Silicon/Hisilicon/Library/I2CLib/I2CHw.h > > +++ b/Silicon/Hisilicon/Library/I2CLib/I2CHw.h > > @@ -81,7 +81,7 @@ > > struct > > { > > UINT32 master : 1 ; > > - UINT32 spedd : 2 ; > > + UINT32 Speed : 2 ; > > UINT32 slave_10bit : 1 ; > > UINT32 master_10bit : 1 ; > > UINT32 restart_en : 1 ; > > diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c > > index 59633106ce..ed44ac204f 100644 > > --- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c > > +++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c > > @@ -158,7 +158,7 @@ I2CInit ( > > > > I2C_REG_READ (Base + I2C_CON_OFFSET, I2cControlReg.Val32); > > I2cControlReg.bits.master = 1; > > - I2cControlReg.bits.spedd = 0x1; > > + I2cControlReg.bits.Speed = 0x1; > > I2cControlReg.bits.restart_en = 1; > > I2cControlReg.bits.slave_disable = 1; > > I2C_REG_WRITE (Base + I2C_CON_OFFSET, I2cControlReg.Val32); > > -- > > 2.17.0 > >