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[2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id w8-v6sm3201963wra.22.2018.08.22.04.49.14 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 22 Aug 2018 04:49:15 -0700 (PDT) Date: Wed, 22 Aug 2018 12:49:13 +0100 From: Leif Lindholm To: Ming Huang Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org Message-ID: <20180822114913.tj54vwz4v44kykby@bivouac.eciton.net> References: <20180814080903.50466-1-ming.huang@linaro.org> <20180814080903.50466-18-ming.huang@linaro.org> MIME-Version: 1.0 In-Reply-To: <20180814080903.50466-18-ming.huang@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms v2 17/43] Hisilicon/D06: Add ACPI Tables for D06 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 22 Aug 2018 11:49:19 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Aug 14, 2018 at 04:08:37PM +0800, Ming Huang wrote: > ACPI tables for D06 2P, especially,Hi1620Iort.asl is include smmu > and Hi1620IortNoSmmu.asl is without smmu. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang As per last feedback: Reviewed-by: Leif Lindholm (The only modification I asked for has been done.) > --- > Platform/Hisilicon/D06/D06.dsc | 1 + > Platform/Hisilicon/D06/D06.fdf | 1 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf | 59 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 27 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/CPU.asl | 409 ++++ > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 30 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/DsdtHi1620.asl | 35 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Apei.asl | 93 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Ged.asl | 58 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 1459 ++++++++++++++ > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mctp.asl | 41 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 1216 ++++++++++++ > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Power.asl | 28 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Rde.asl | 47 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Sec.asl | 57 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Socip4_i2c100k.asl | 249 +++ > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Socip4_i2c400k.asl | 249 +++ > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/LpcUart_clk.asl | 49 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Pv680UncorePmu.asl | 1658 ++++++++++++++++ > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/ipmi.asl | 49 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Facs.aslc | 67 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc | 91 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc | 86 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 86 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 1989 ++++++++++++++++++++ > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620IortNoSmmu.asl | 1736 +++++++++++++++++ > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Mcfg.aslc | 64 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Slit.aslc | 64 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Spcr.aslc | 81 + > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 166 ++ > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 375 ++++ > 31 files changed, 10620 insertions(+)