From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::441; helo=mail-wr1-x441.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com [IPv6:2a00:1450:4864:20::441]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 10AF4210F3D66 for ; Wed, 22 Aug 2018 07:21:44 -0700 (PDT) Received: by mail-wr1-x441.google.com with SMTP id z96-v6so1764610wrb.8 for ; Wed, 22 Aug 2018 07:21:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=6JpGraVHtDPRelN3fFLvfYufycFYVSi1N4GMMnxYCIo=; b=MWz7hB1BufKknxZeFytiHeP8Mggn2pQ6C4nMegAPTjCTwIH5innGWv8ns/BmmYl21M tpZywaCsMdsAMmxTjFx5GUZB5vsHTuBx0IxvSBGGrP70Qcnwx+r0OsP26O+kXfoJx5Tm RjgZ+RmaV1WHA+sS01CNhlHCG/VXGvUyMZvmk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=6JpGraVHtDPRelN3fFLvfYufycFYVSi1N4GMMnxYCIo=; b=Elb3lExTuNtJgM9yY4o4tBv+hVmNwbcUZ06MWWXnz/Cd3b+85gBUkOa+t8fnlSNigq RVGzGZMmng5O08YJWdP6cWDro7JxJo7ZITB9Vcm4/UcFh/Inx9lJ9LmY+rEfXmYhtHne bVQs0SYR9s1vKyVv2X8QxpGlY/4OHDpQNNTNxXIPUWg5OFb4aZTxjO1swIbsGkQjD7/F exM4BwhjIwQ9fHb2Wkb+Z8cHFzDZYywzhe7K4RVIDUFWStadG8rlOHyw5ykw0QeEbv7F 7QKpdQwoyTVIA/STjJ2Dc0QpZyze1QGKBa8SsihbGKgKfU4d0DlMQBYx1EVpaWbu1Mvx D7/Q== X-Gm-Message-State: AOUpUlH+eduiKaggRF5BqzpdVvXmr89S4U4R4hXenCfFBBXLrE4WHRCT tp9AtjIc3M7YeAiJ3MthB7HQXg== X-Google-Smtp-Source: AA+uWPx10aujLNsfVETBD2gJ2RIn8e/JeXc1AdAox1utWwjOvG5N3aG897uldS9G6ritouVMxacoxQ== X-Received: by 2002:adf:dbc3:: with SMTP id e3-v6mr33565672wrj.217.1534947703327; Wed, 22 Aug 2018 07:21:43 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id b144-v6sm2871881wmd.23.2018.08.22.07.21.41 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 22 Aug 2018 07:21:42 -0700 (PDT) Date: Wed, 22 Aug 2018 15:21:40 +0100 From: Leif Lindholm To: Ming Huang Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org Message-ID: <20180822142140.rprs7j64ikwe7dkl@bivouac.eciton.net> References: <20180814080903.50466-1-ming.huang@linaro.org> <20180814080903.50466-23-ming.huang@linaro.org> MIME-Version: 1.0 In-Reply-To: <20180814080903.50466-23-ming.huang@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms v2 22/43] Silicon/Hisilicon/D06: Fix I2C enable fail issue for D06 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 22 Aug 2018 14:21:45 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Aug 14, 2018 at 04:08:42PM +0800, Ming Huang wrote: > I2C may enable failed in D06, so retry I2C enable while > enable failed. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang > --- > Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 18 ++++++++++++------ > 1 file changed, 12 insertions(+), 6 deletions(-) Please change subject line to: Silicon/Hisilicon: Fix I2CLib enable fail issue and reorder it before the first D06 patch. With that: Reviewed-by: Leif Lindholm > diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c > index 9174e50dd4..d67ddc7f9b 100644 > --- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c > +++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c > @@ -86,6 +86,7 @@ I2C_Enable ( > { > I2C0_ENABLE_U I2cEnableReg; > I2C0_ENABLE_STATUS_U I2cEnableStatusReg; > + UINT32 TimeCnt = I2C_READ_TIMEOUT; > > UINTN Base = GetI2cBase (Socket, Port); > > @@ -93,13 +94,18 @@ I2C_Enable ( > I2cEnableReg.bits.enable = 1; > I2C_REG_WRITE (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32); > > + do { > + // This is a empirical value for I2C delay. MemoryFance is no need here. > + I2C_Delay (10000); > > - I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32); > - if (I2cEnableStatusReg.bits.ic_en == 1) { > - return EFI_SUCCESS; > - } else { > - return EFI_DEVICE_ERROR; > - } > + TimeCnt--; > + I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32); > + if (TimeCnt == 0) { > + return EFI_DEVICE_ERROR; > + } > + } while (I2cEnableStatusReg.bits.ic_en == 0); > + > + return EFI_SUCCESS; > } > > VOID > -- > 2.17.0 >