From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::442; helo=mail-pf1-x442.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x442.google.com (mail-pf1-x442.google.com [IPv6:2607:f8b0:4864:20::442]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id ADC8C21103DC7 for ; Thu, 23 Aug 2018 09:08:11 -0700 (PDT) Received: by mail-pf1-x442.google.com with SMTP id k21-v6so2970707pff.11 for ; Thu, 23 Aug 2018 09:08:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ypiB23RsswqNJGEBngoLI4Sh5ffXACMdw+UpXvZZRgk=; b=NxpS55KNHZEn5+Zws5jvI8lkgyMsVTBm9Ecu5nyeLHjND972haA7q1/lJrDMPztFIN Zz/UE9/5DqHPbhVt2ojvXaRjLRmM0jPFeY8LuQMlncJwy9C8SzMIvoR5p/Abn1l2baqF wTWRYiFw1hWmZWapTpqZ4r4C8srITAbp386VU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ypiB23RsswqNJGEBngoLI4Sh5ffXACMdw+UpXvZZRgk=; b=D0bvUn5N4kur33TYugehmBg4oGrsu6Y9y7Gq/5j/ARJMFU5LvHFQ6OPWh/cjA52QSh ht0dXZgeA1KFDpp/CMVDjCtLHdEGtyldITgrJW3wfo1Eh5WW0zebcX42cta1Q+Gc0rnm vAiZGIZtOF4QkQgvAG+viMoqEYRAYjtQV58nNb5Pe87cOkrepFaLyAV6/y4Ih20KEWqy XWJTyhuZIH8Iam0odC4l+dyfQrT4CLXXBEG1OhDeW8+pUMJIfCu2tb1Gf6oLXhPW+KIt DLswJX2qX3L6HR8f9LRgwcbulmA6SJXl1PWlqqAGoElJPfSRaCj1B1gMu+m7xHQCGHWQ Pwvg== X-Gm-Message-State: AOUpUlFHVhudHCVJwu9m/FNNS9v/TVr6iYvbFZq19Gr/uf+kj0On7KFt 1fLrF6/RBBHrl15IMe77Yz0dIQ== X-Google-Smtp-Source: AA+uWPxw4AEpPkaLUfRcDDXy55ObqvOEuA6ZpxpFDMVnXxc2UtMKJx2MLk02WjgqSKQJ/MaWJbAjSA== X-Received: by 2002:a17:902:9a48:: with SMTP id x8-v6mr30962095plv.72.1535040491407; Thu, 23 Aug 2018 09:08:11 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id d19-v6sm5788083pgv.61.2018.08.23.09.08.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 23 Aug 2018 09:08:10 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org, Ming Huang Date: Fri, 24 Aug 2018 00:07:15 +0800 Message-Id: <20180823160743.45638-4-ming.huang@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180823160743.45638-1-ming.huang@linaro.org> References: <20180823160743.45638-1-ming.huang@linaro.org> Subject: [PATCH edk2-platforms v4 03/31] Silicon/Hisilicon: Fix I2CLib enable fail issue X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 23 Aug 2018 16:08:11 -0000 I2C may enable failed in D06, so retry I2C enable while enable failed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Reviewed-by: Leif Lindholm --- Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 22 +++++++++++++------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c index 3cf5ff3d14..e3d9906135 100644 --- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c +++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c @@ -86,6 +86,7 @@ I2C_Enable ( { I2C0_ENABLE_U I2cEnableReg; I2C0_ENABLE_STATUS_U I2cEnableStatusReg; + UINT32 TimeCnt = I2C_READ_TIMEOUT; UINTN Base = GetI2cBase (Socket, Port); @@ -93,13 +94,18 @@ I2C_Enable ( I2cEnableReg.bits.enable = 1; I2C_REG_WRITE (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32); + do { + // This is a empirical value for I2C delay. MemoryFence is no need here. + I2C_Delay (10000); - I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32); - if (I2cEnableStatusReg.bits.ic_en == 1) { - return EFI_SUCCESS; - } else { - return EFI_DEVICE_ERROR; - } + TimeCnt--; + I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32); + if (TimeCnt == 0) { + return EFI_DEVICE_ERROR; + } + } while (I2cEnableStatusReg.bits.ic_en == 0); + + return EFI_SUCCESS; } VOID @@ -252,7 +258,7 @@ CheckI2CTimeOut ( if (Transfer == I2CTx) { Fifo = I2C_GetTxStatus (Socket, Port); while (Fifo != 0) { - // This is a empirical value for I2C delay. MemoryFance is no need here. + // This is a empirical value for I2C delay. MemoryFence is no need here. I2C_Delay (2); if (++Times > I2C_READ_TIMEOUT) { (VOID)I2C_Disable (Socket, Port); @@ -263,7 +269,7 @@ CheckI2CTimeOut ( } else { Fifo = I2C_GetRxStatus (Socket, Port); while (Fifo == 0) { - // This is a empirical value for I2C delay. MemoryFance is no need here. + // This is a empirical value for I2C delay. MemoryFence is no need here. I2C_Delay (2); if (++Times > I2C_READ_TIMEOUT) { (VOID)I2C_Disable (Socket, Port); -- 2.18.0