From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::443; helo=mail-wr1-x443.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4050F21107454 for ; Thu, 30 Aug 2018 11:39:45 -0700 (PDT) Received: by mail-wr1-x443.google.com with SMTP id n2-v6so8961958wrw.7 for ; Thu, 30 Aug 2018 11:39:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=RFii5pxeCM4rdNBFWwzAzyeQ2UwN8Sm0nGgKXDcZjN4=; b=GyTpLgkLtl/ZnqoCdDxarNs03+AcHnk+tdQIGePwI/v7l5TU0Jeg2kTnwiuaWIA88r HZyvDheVornTwOYgclarhpxxgqJuY8NZAcjwRVcGYKjszHmFw5m7YC69iutruK08KVHy TP1OYnBlQMOLkU8feS5IYLniYr9o5/XmK5K8s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=RFii5pxeCM4rdNBFWwzAzyeQ2UwN8Sm0nGgKXDcZjN4=; b=DoF5Ip1fghrMrXVDDt8vemQhSflHjPoY0tx6E0mXqwBsow33rvAkGmk2b1C0inqzkZ s9gl8PiRr+LXBCoJFYoqr5hkwli268AWWgGojW/5+/EHqDd8XYhHt9eDdNiqqdlZGpDj EaOSPeFEgs0o2+uNQD+XLA5gMC5vmB9YtytkHUYXfh85Aoyn4lyLgK0GKVt2yZIOQvKo aPBhPrd4go2Pphf4/oftxjtO5szcetw9PLusE2OTzW1/wpUAmPufDO/lfZgp92TeD3Jj aBE5xXWY5pD4Yp7kqRliZdklHiF6nVp9yvPz6ELrKKHH2gDHQm+DmfD8emaXfmlIxDuu veyA== X-Gm-Message-State: APzg51AV7nyt44wWrXLRsNzZeK4KfQ04KoWmtS6ajPjSquGsV7QXqYld BmwKqwPZTuuDjFr2v8tiNbrHjQ== X-Google-Smtp-Source: ANB0VdbjW4qUGvowxx39NNEcoQ7Y0NfacdMXssTBQQTlSZOnusY3xPr3octgROyjDv2FFG7oYdZxlA== X-Received: by 2002:a5d:4e0a:: with SMTP id p10-v6mr8413047wrt.48.1535654383693; Thu, 30 Aug 2018 11:39:43 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id k5-v6sm11507530wrm.96.2018.08.30.11.39.42 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 30 Aug 2018 11:39:42 -0700 (PDT) Date: Thu, 30 Aug 2018 19:39:40 +0100 From: Leif Lindholm To: Ming Huang Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org Message-ID: <20180830183940.4uynhkgd4h5qudvw@bivouac.eciton.net> References: <20180823160743.45638-1-ming.huang@linaro.org> <20180823160743.45638-12-ming.huang@linaro.org> MIME-Version: 1.0 In-Reply-To: <20180823160743.45638-12-ming.huang@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms v4 11/31] Silicon/Hisilicon/Acpi: Unify HisiAcpiPlatformDxe X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 30 Aug 2018 18:39:46 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Aug 24, 2018 at 12:07:23AM +0800, Ming Huang wrote: > The EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE struct is used by > UpdateAcpiTable.c and Srat aslc. The struct may be different > according to chips, so move some macro to PlatformArch.h. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang > Reviewed-by: Leif Lindholm Right, so I missed one bit on this last time around. Could you leave changes to Silicon/Hisilicon/Hi1620/Include/PlatformArch.h out here and just add that in the initial d06 patch? Then, could you move this patch immediately after "Move RAS macro to PlatformArch"? / Leif > --- > Silicon/Hisilicon/Hi1610/Include/PlatformArch.h | 6 ++++ > Silicon/Hisilicon/Hi1620/Include/PlatformArch.h | 6 ++++ > Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 31 ++++++++++++++------ > Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c | 2 -- > 4 files changed, 34 insertions(+), 11 deletions(-) > > diff --git a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h > index f39ae0748c..1ebddca4e5 100644 > --- a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h > +++ b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h > @@ -30,6 +30,12 @@ > // Max NUMA node number for each node type > #define MAX_NUM_PER_TYPE 8 > > +// for acpi > +#define NODE_IN_SOCKET 2 > +#define CORE_NUM_PER_SOCKET 32 > +#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 10 > +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8 > + > #define S1_BASE 0x40000000000 > > #define RASC_BASE (0x5000) > diff --git a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h > index 9539cfdada..f3ad45f6c6 100644 > --- a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h > +++ b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h > @@ -57,5 +57,11 @@ > EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \ > } > > +// for acpi > +#define NODE_IN_SOCKET 2 > +#define CORE_NUM_PER_SOCKET 48 > +#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 16 > +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 1 > + > #endif > > diff --git a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h > index fd05a3b960..2abffb65fc 100644 > --- a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h > +++ b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h > @@ -19,6 +19,21 @@ > #ifndef __ACPI_NEXT_LIB_H__ > #define __ACPI_NEXT_LIB_H__ > > +#include > + > +/// > +/// ITS Affinity Structure Definition > +/// > +#pragma pack(1) > +typedef struct { > + UINT8 Type; > + UINT8 Length; > + UINT32 ProximityDomain; > + UINT16 Reserved; > + UINT32 ItsHwId; > +} EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE; > +#pragma pack() > + > #define EFI_ACPI_6_1_GIC_ITS_INIT(GicITSHwId, GicITSBase) \ > { \ > EFI_ACPI_6_1_GIC_ITS, sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE), EFI_ACPI_RESERVED_WORD, \ > @@ -42,8 +57,8 @@ > #define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT( \ > ProximityDomain, ItsId) \ > { \ > - 4, sizeof (EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE), ProximityDomain, \ > - {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, ItsId \ > + 4, sizeof (EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE), ProximityDomain, \ > + EFI_ACPI_RESERVED_WORD, ItsId \ > } > > #define EFI_ACPI_6_1_MEMORY_AFFINITY_STRUCTURE_INIT( \ > @@ -75,15 +90,13 @@ > // Define the number of each table type. > // This is where the table layout is modified. > // > -#define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT 64 > -#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 10 > -#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8 > +#define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT (MAX_SOCKET*CORE_NUM_PER_SOCKET) > > typedef struct { > - EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header; > - EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT]; > - EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT]; > - EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT]; > + EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header; > + EFI_ACPI_6_2_MEMORY_AFFINITY_STRUCTURE Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT]; > + EFI_ACPI_6_2_GICC_AFFINITY_STRUCTURE Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT]; > + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT]; > } EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE; > > #pragma pack() > diff --git a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c > index f5869841dc..54f49977c3 100644 > --- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c > +++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c > @@ -20,8 +20,6 @@ > #include > #include > > -#define CORE_NUM_PER_SOCKET 32 > -#define NODE_IN_SOCKET 2 > #define CORECOUNT(X) ((X) * CORE_NUM_PER_SOCKET) > > STATIC > -- > 2.18.0 >