From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.136; helo=mga12.intel.com; envelope-from=eric.dong@intel.com; receiver=edk2-devel@lists.01.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B975F2113A0FF for ; Mon, 17 Sep 2018 18:44:04 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Sep 2018 18:44:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,387,1531810800"; d="scan'208";a="91414950" Received: from ydong10-win10.ccr.corp.intel.com ([10.239.9.125]) by orsmga001.jf.intel.com with ESMTP; 17 Sep 2018 18:43:50 -0700 From: Eric Dong To: edk2-devel@lists.01.org Cc: Michael D Kinney , Ruiyu Ni , Laszlo Ersek Date: Tue, 18 Sep 2018 09:43:16 +0800 Message-Id: <20180918014330.28336-1-eric.dong@intel.com> X-Mailer: git-send-email 2.15.0.windows.1 Subject: [Patch 00/14] Update MSR definitions. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 18 Sep 2018 01:44:04 -0000 Current MSR definition are follow the SDM 2016-09 version. The latest SDM is 2018-05. This patch serial update the MSR related definition to follow the latest SDM 2018-05 version. MSR related defintion are saved at UefiCpuPkg\Include\Register\. The changes for this serial includes: 1. Add new MSR definition and file. 2. Remove old MSR definition which not defined in new SDM. 3. Change MSR name to follow new SDM, keep old one for compatibility. 4. Change MSR data structure definition to follow new SDM. 5. Update comments to follow the new SDM, mainly related to chapter info. Below changes are incompatible changes: 2. Remove old MSR definition which not defined in new SDM. For this one, i search edk2 codebase, not found any code uses it. so no impact for edk2 codebase. Detail changes see patch 9 ~ 11. 4. Change MSR data structure definition to follow new SDM. For this one, new data structure just change the original reserved bits to valid bits, should have no impact for the current code. Detail see patch 8 and patch 14 Cc: Michael D Kinney Cc: Ruiyu Ni Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong Eric Dong (14): UefiCpuPkg/Include/Register/Msr: Update reference spec info. UefiCpuPkg/Include/Register/Msr/GoldmontPlusMsr.h: Add new MSR file for goldmont plus microarchitecture. UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h: Add new MSR. UefiCpuPkg/Include/Register/Msr/*.h: Add new MSR. UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: Add new MSR. UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSRs. UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Add new MSR. UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Change structure definition. UefiCpuPkg/Include/Register/Msr/Core2Msr.h: Remove old MSR. UefiCpuPkg/Include/Register/Msr/P6Msr.h: Remove old MSR. UefiCpuPkg/Include/Register/Msr/CoreMsr.h: Remove old MSR. UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSR name and keep old one. UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h: Add new MSR name and keep old one. UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: Change structure definition. UefiCpuPkg/Include/Register/ArchitecturalMsr.h | 130 +- UefiCpuPkg/Include/Register/Msr.h | 7 +- UefiCpuPkg/Include/Register/Msr/AtomMsr.h | 28 +- UefiCpuPkg/Include/Register/Msr/BroadwellMsr.h | 62 +- UefiCpuPkg/Include/Register/Msr/Core2Msr.h | 102 +- UefiCpuPkg/Include/Register/Msr/CoreMsr.h | 74 +- UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h | 88 +- UefiCpuPkg/Include/Register/Msr/GoldmontPlusMsr.h | 272 ++++ UefiCpuPkg/Include/Register/Msr/HaswellEMsr.h | 62 +- UefiCpuPkg/Include/Register/Msr/HaswellMsr.h | 34 +- UefiCpuPkg/Include/Register/Msr/IvyBridgeMsr.h | 8 +- UefiCpuPkg/Include/Register/Msr/NehalemMsr.h | 52 +- UefiCpuPkg/Include/Register/Msr/P6Msr.h | 60 +- UefiCpuPkg/Include/Register/Msr/Pentium4Msr.h | 202 +-- UefiCpuPkg/Include/Register/Msr/PentiumMMsr.h | 22 +- UefiCpuPkg/Include/Register/Msr/PentiumMsr.h | 12 +- UefiCpuPkg/Include/Register/Msr/SandyBridgeMsr.h | 49 +- UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h | 100 +- UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h | 1602 ++++++++++++++++++++- UefiCpuPkg/Include/Register/Msr/Xeon5600Msr.h | 8 +- UefiCpuPkg/Include/Register/Msr/XeonDMsr.h | 84 +- UefiCpuPkg/Include/Register/Msr/XeonE7Msr.h | 6 +- UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h | 326 ++++- 23 files changed, 2813 insertions(+), 577 deletions(-) create mode 100644 UefiCpuPkg/Include/Register/Msr/GoldmontPlusMsr.h -- 2.15.0.windows.1