From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.136; helo=mga12.intel.com; envelope-from=eric.dong@intel.com; receiver=edk2-devel@lists.01.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DD63D2114B146 for ; Fri, 21 Sep 2018 00:42:31 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Sep 2018 00:42:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,284,1534834800"; d="scan'208";a="92479683" Received: from ydong10-win10.ccr.corp.intel.com ([10.239.9.125]) by orsmga001.jf.intel.com with ESMTP; 21 Sep 2018 00:41:49 -0700 From: Eric Dong To: edk2-devel@lists.01.org Cc: Michael D Kinney , Ruiyu Ni , Laszlo Ersek Date: Fri, 21 Sep 2018 15:41:29 +0800 Message-Id: <20180921074133.9140-11-eric.dong@intel.com> X-Mailer: git-send-email 2.15.0.windows.1 In-Reply-To: <20180921074133.9140-1-eric.dong@intel.com> References: <20180921074133.9140-1-eric.dong@intel.com> Subject: [Patch v2 10/14] UefiCpuPkg/Include/Register/Msr/P6Msr.h: Remove old MSR. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 21 Sep 2018 07:42:32 -0000 Changes includes: 1. Remove MSR which not existed in 2018-05 version spec: MSR_P6_ROB_CR_BKUPTMPDR6. Cc: Michael D Kinney Cc: Ruiyu Ni Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong --- UefiCpuPkg/Include/Register/Msr/P6Msr.h | 48 --------------------------------- 1 file changed, 48 deletions(-) diff --git a/UefiCpuPkg/Include/Register/Msr/P6Msr.h b/UefiCpuPkg/Include/Register/Msr/P6Msr.h index d8af2db3da..9cef72b239 100644 --- a/UefiCpuPkg/Include/Register/Msr/P6Msr.h +++ b/UefiCpuPkg/Include/Register/Msr/P6Msr.h @@ -1153,54 +1153,6 @@ typedef union { **/ #define MSR_P6_LASTINTTOIP 0x000001DE - -/** - - - @param ECX MSR_P6_ROB_CR_BKUPTMPDR6 (0x000001E0) - @param EAX Lower 32-bits of MSR value. - Described by the type MSR_P6_ROB_CR_BKUPTMPDR6_REGISTER. - @param EDX Upper 32-bits of MSR value. - Described by the type MSR_P6_ROB_CR_BKUPTMPDR6_REGISTER. - - Example usage - @code - MSR_P6_ROB_CR_BKUPTMPDR6_REGISTER Msr; - - Msr.Uint64 = AsmReadMsr64 (MSR_P6_ROB_CR_BKUPTMPDR6); - AsmWriteMsr64 (MSR_P6_ROB_CR_BKUPTMPDR6, Msr.Uint64); - @endcode - @note MSR_P6_ROB_CR_BKUPTMPDR6 is defined as ROB_CR_BKUPTMPDR6 in SDM. -**/ -#define MSR_P6_ROB_CR_BKUPTMPDR6 0x000001E0 - -/** - MSR information returned for MSR index #MSR_P6_ROB_CR_BKUPTMPDR6 -**/ -typedef union { - /// - /// Individual bit fields - /// - struct { - UINT32 Reserved1:2; - /// - /// [Bit 2] Fast Strings Enable bit. Default is enabled. - /// - UINT32 FastStrings:1; - UINT32 Reserved2:29; - UINT32 Reserved3:32; - } Bits; - /// - /// All bit fields as a 32-bit value - /// - UINT32 Uint32; - /// - /// All bit fields as a 64-bit value - /// - UINT64 Uint64; -} MSR_P6_ROB_CR_BKUPTMPDR6_REGISTER; - - /** -- 2.15.0.windows.1