From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=104.47.40.111; helo=nam03-co1-obe.outbound.protection.outlook.com; envelope-from=christopher.co@microsoft.com; receiver=edk2-devel@lists.01.org Received: from NAM03-CO1-obe.outbound.protection.outlook.com (mail-co1nam03on0111.outbound.protection.outlook.com [104.47.40.111]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 93C48211518D1 for ; Fri, 21 Sep 2018 01:26:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=BoZLqqpBnNdUZLA2iIXbN/zXfpexQCXYDpVRbWyT5HA=; b=LQ0LKraFDu/eowkt7dUuvFowg6XXZ/50gn17EiUguShRCc7MoqF7Beg7D/FdC1to/HPv9X0PFv6YfLlKKQh6wWK6mfwrgaxHyHM3oxbPshUIuml+17mNEcgIXdNAQxACM7Pl8OV2nFiK8NuSexhi/RfR3arpX0Wp3KQRa9Nlsk8= Received: from DM5PR2101MB1128.namprd21.prod.outlook.com (52.132.133.20) by DM5PR2101MB0727.namprd21.prod.outlook.com (10.167.110.39) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1185.6; Fri, 21 Sep 2018 08:26:00 +0000 Received: from DM5PR2101MB1128.namprd21.prod.outlook.com ([fe80::81f8:300e:d90:d49]) by DM5PR2101MB1128.namprd21.prod.outlook.com ([fe80::81f8:300e:d90:d49%3]) with mapi id 15.20.1164.008; Fri, 21 Sep 2018 08:26:00 +0000 From: Chris Co To: "edk2-devel@lists.01.org" CC: Ard Biesheuvel , Leif Lindholm , Michael D Kinney Thread-Topic: [PATCH edk2-platforms 09/27] Silicon/NXP: Add headers for SoC-specific i.MX packages to use Thread-Index: AQHUUYS6Td0Qdv51FkilLzYFFMJClg== Date: Fri, 21 Sep 2018 08:26:00 +0000 Message-ID: <20180921082542.35768-10-christopher.co@microsoft.com> References: <20180921082542.35768-1-christopher.co@microsoft.com> In-Reply-To: <20180921082542.35768-1-christopher.co@microsoft.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MWHPR17CA0054.namprd17.prod.outlook.com (2603:10b6:300:93::16) To DM5PR2101MB1128.namprd21.prod.outlook.com (2603:10b6:4:a8::20) x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [2001:4898:80e8:8:388a:edc9:7085:c18] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; DM5PR2101MB0727; 6:2oPldu0pvrgZLVNI5yH5qahDP/6sIEksb2BZM7vH2SXGsr9vLCrSJWy2Hv1qRdG+BTWT2pf80jUuPFy2UEJvFqjXT8LNfd1qS3lJ8FipcQOQAsVWoh0HDlWjoBSG42rscQ9wzz8hz4ObuVdTxvD5TG6zdoWvRzYB/9bSWR21zr1/leHcjRdoZyHwa6y79Zx7yz/NHhq/gWfJHTH8JZ4DlY7aRT1rv6HwB5TsN1kW7Px/o3cnZlTNbUgWb2Ukypnn7qB5YNUn7M5GLkzxK2X4C+/DtGZ6vUeuNvsl1yHdA9tKKOFUnZQiGjP7gCEe0JfCP3wdE9b7TIH3PjfEo44Lfh9REeRB/CMl1JZKPB9kqjaGbcAUZYjZ1xqxGJLkturOkfQPKGeJAZgRnJsF07g3l9W0IaBNsOK4Y82zArskHPg3wL3Y3g95DG0FyvvapvXb6tZBrCIVnXSkuOefM7d+VQ==; 5:8u7Xfft/F0EPIuO2MmybuwGjkCxPbq8mtE2+C9QF7cvihUwHUO57nuHYVwhMd5pLsgUpMQgY6a8JjMjV4KudyFKmSeOJPIG8RjV0LApKTlCnQfMRXnCwOBNNKpTfgcBJti+hIp9dR8b3TtbhbjEzXzI5ancD6X3hFSaI+xGQgqA=; 7:+KV4N1wx8fz4pexq8HekXD0t6yxDqte4rqDBA4nLCoemv5fLuZ6R0vkPXpJe8ELv8E1Lj/N5TlGLroPFGHrsA+JXrEGZD6fpHT0ks1xnyGGA6cECJzxzmb5mVL0sOw8u3s3LEHM5FABXTq5gHjKrbHFO2EatZ17CmaKi8VTttSMaNy+tOrHs4wFJluNXPyMFAdDrgFSuE+qzXy37u6VyyRnW8btNlzc1Van97uj/S4q7DhpPrquLPQbBfnNcYBh/ x-ms-office365-filtering-correlation-id: 1cf94f51-73d9-4cac-3651-08d61f9bdc75 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(7020095)(4652040)(8989299)(4534165)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7193020); SRVR:DM5PR2101MB0727; x-ms-traffictypediagnostic: DM5PR2101MB0727: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(105169848403564)(28532068793085)(89211679590171)(12401385986421)(228905959029699); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3231355)(2280164)(944501410)(52105095)(2018427008)(93006095)(93001095)(3002001)(10201501046)(6055026)(149027)(150027)(6041310)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123562045)(20161123560045)(20161123564045)(20161123558120)(201708071742011)(7699051)(76991041); SRVR:DM5PR2101MB0727; BCL:0; PCL:0; RULEID:; SRVR:DM5PR2101MB0727; x-forefront-prvs: 0802ADD973 x-forefront-antispam-report: SFV:NSPM; SFS:(10019020)(39860400002)(396003)(136003)(376002)(366004)(346002)(199004)(189003)(8676002)(81156014)(25786009)(446003)(2900100001)(102836004)(46003)(52116002)(6346003)(81166006)(11346002)(105586002)(2351001)(8936002)(386003)(4326008)(76176011)(6506007)(10090500001)(5250100002)(7736002)(2616005)(486006)(305945005)(53376002)(6116002)(186003)(16799955002)(1076002)(2501003)(476003)(6916009)(99286004)(22452003)(97736004)(71200400001)(71190400001)(72206003)(478600001)(966005)(6306002)(10290500003)(5640700003)(14454004)(36756003)(86362001)(575784001)(6436002)(15188155005)(2906002)(86612001)(106356001)(54906003)(316002)(6486002)(256004)(6512007)(68736007)(5660300001)(53936002)(60540400001); DIR:OUT; SFP:1102; SCL:1; SRVR:DM5PR2101MB0727; H:DM5PR2101MB1128.namprd21.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: microsoft.com does not designate permitted sender hosts) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Christopher.Co@microsoft.com; x-microsoft-antispam-message-info: i9j2QUoJEBa1xbquR3/NN79IqLbTvaXRRp0tCUovV788MKCs8bJpA92igW0G1+2X3Z5qddsmo7jf+jmUNixzvpbbpIyYX9uotDSGaQjsdJyBKvyIdcJnxzhPrS3i49bSkGsgwQXjvGDW539Md2yMFA2pkYCfSp1cjVruhMXwAczhKop2Gjx8P+3UOm0pLjqInPugcMPMbCV6IFdYbcMojQXBMH2tlM7EhzriMnkCj2NxqSGXI5GQBsADdFrbyTRSRpvRhheX1IyzUmllZhwtQin9IRz/b6epnIcmTmWUb42367wabu3Dxv3bCR/NQfnsH/XhF7rb6OWkvuTnmtDMLk0iwgLHX/ZHeQz963y3pMiQav2m3u6junmLB7nGW3vRhX8hSfa7ESQUv2i7e08nJpstaMLimQt5dvJigQt5zTlW4EicttljbWbBffxAUbocCFsdHOPu2TMQsDFOrNRFBAQcrW0dTa8tcZQSqHDqB2bZZcg69csVScZlcaIo6AN0ISC4FEAa2tb280CyOETSQdBShJgGD5HV9qsPeoWPxJ8xt5DYb/PWJ4PorWXa/Xk7 spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1cf94f51-73d9-4cac-3651-08d61f9bdc75 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Sep 2018 08:26:00.1533 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR2101MB0727 Subject: [PATCH edk2-platforms 09/27] Silicon/NXP: Add headers for SoC-specific i.MX packages to use X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 21 Sep 2018 08:26:01 -0000 Content-Language: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable This adds common headers for other NXP i.MX SoC packages. More specifically, this adds i.MX-generic GPIO, IoMux, and Platform definitions. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Christopher Co Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Michael D Kinney --- Silicon/NXP/iMXPlatformPkg/Include/Platform.h | 67 ++++++++++++++ Silicon/NXP/iMXPlatformPkg/Include/iMXGpio.h | 92 ++++++++++++++++++++ Silicon/NXP/iMXPlatformPkg/Include/iMXIoMux.h | 24 +++++ 3 files changed, 183 insertions(+) diff --git a/Silicon/NXP/iMXPlatformPkg/Include/Platform.h b/Silicon/NXP/iM= XPlatformPkg/Include/Platform.h new file mode 100644 index 000000000000..8a1e828f68ea --- /dev/null +++ b/Silicon/NXP/iMXPlatformPkg/Include/Platform.h @@ -0,0 +1,67 @@ +/** @file +* +* i.MX Platform specific defines for constructing ACPI tables +* +* Copyright (c) 2018 Microsoft Corporation. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#ifndef _PLATFORM_IMX_H_ +#define _PLATFORM_IMX_H_ + +#include + +#define EFI_ACPI_OEM_ID {'M','C','R','S','F','T'} // OEMID 6= bytes +#define EFI_ACPI_VENDOR_ID SIGNATURE_32('N','X','P','I') +#define EFI_ACPI_CSRT_REVISION 0x00000005 +#define EFI_ACPI_5_0_CSRT_REVISION 0x00000000 + +// Resource Descriptor Types +#define EFI_ACPI_CSRT_RD_TYPE_INTERRUPT 1 +#define EFI_ACPI_CSRT_RD_TYPE_TIMER 2 +#define EFI_ACPI_CSRT_RD_TYPE_DMA 3 +#define EFI_ACPI_CSRT_RD_TYPE_CACHE 4 + +// Resource Descriptor Subtypes +#define EFI_ACPI_CSRT_RD_SUBTYPE_INTERRUPT_LINES 0 +#define EFI_ACPI_CSRT_RD_SUBTYPE_INTERRUPT_CONTROLLER 1 +#define EFI_ACPI_CSRT_RD_SUBTYPE_TIMER 0 +#define EFI_ACPI_CSRT_RD_SUBTYPE_DMA_CHANNEL 0 +#define EFI_ACPI_CSRT_RD_SUBTYPE_DMA_CONTROLLER 1 +#define EFI_ACPI_CSRT_RD_SUBTYPE_CACHE 0 + +#pragma pack(push, 1) +//------------------------------------------------------------------------ +// CSRT Resource Group header 24 bytes long +//------------------------------------------------------------------------ +typedef struct { + UINT32 Length; + UINT32 VendorID; + UINT32 SubVendorId; + UINT16 DeviceId; + UINT16 SubdeviceId; + UINT16 Revision; + UINT16 Reserved; + UINT32 SharedInfoLength; +} EFI_ACPI_5_0_CSRT_RESOURCE_GROUP_HEADER; + +//------------------------------------------------------------------------ +// CSRT Resource Descriptor 12 bytes total +//------------------------------------------------------------------------ +typedef struct { + UINT32 Length; + UINT16 ResourceType; + UINT16 ResourceSubType; + UINT32 UID; +} EFI_ACPI_5_0_CSRT_RESOURCE_DESCRIPTOR_HEADER; +#pragma pack (pop) + +#endif // !_PLATFORM_IMX_H_ diff --git a/Silicon/NXP/iMXPlatformPkg/Include/iMXGpio.h b/Silicon/NXP/iMX= PlatformPkg/Include/iMXGpio.h new file mode 100644 index 000000000000..dce01f789058 --- /dev/null +++ b/Silicon/NXP/iMXPlatformPkg/Include/iMXGpio.h @@ -0,0 +1,92 @@ +/** @file +* +* Copyright (c) 2018 Microsoft Corporation. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#ifndef _IMX_GPIO_H_ +#define _IMX_GPIO_H_ + +#include + +typedef enum { + IMX_GPIO_LOW =3D 0, + IMX_GPIO_HIGH =3D 1 +} IMX_GPIO_VALUE; + +typedef enum { + IMX_GPIO_DIR_INPUT, + IMX_GPIO_DIR_OUTPUT +} IMX_GPIO_DIR; + +typedef enum { + IMX_GPIO_BANK1 =3D 1, + IMX_GPIO_BANK2, + IMX_GPIO_BANK3, + IMX_GPIO_BANK4, + IMX_GPIO_BANK5, + IMX_GPIO_BANK6, + IMX_GPIO_BANK7, +} IMX_GPIO_BANK; + +#pragma pack(push, 1) + +#define GPIO_RESERVED_SIZE \ + ((FixedPcdGet32(PcdGpioBankMemoryRange) / 4) - 8) + +typedef struct { + UINT32 DR; // 0x00 GPIO data register (GPIO1_= DR) + UINT32 GDIR; // 0x04 GPIO direction register (G= PIO1_GDIR) + UINT32 PSR; // 0x08 GPIO pad status register (= GPIO1_PSR) + UINT32 ICR1; // 0x0C GPIO interrupt configurati= on register1 (GPIO1_ICR1) + UINT32 ICR2; // 0x10 GPIO interrupt configurati= on register2 (GPIO1_ICR2) + UINT32 IMR; // 0x14 GPIO interrupt mask regist= er (GPIO1_IMR) + UINT32 ISR; // 0x18 GPIO interrupt status regi= ster (GPIO1_ISR) + UINT32 EDGE_SEL; // 0x1C GPIO edge select register = (GPIO1_EDGE_SEL) + UINT32 reserved[GPIO_RESERVED_SIZE]; +} IMX_GPIO_BANK_REGISTERS; + +#pragma pack(pop) + +typedef struct { + IMX_GPIO_BANK_REGISTERS Banks[7]; +} IMX_GPIO_REGISTERS; + +/** + Set the specified GPIO to the specified direction. +**/ +VOID +ImxGpioDirection ( + IMX_GPIO_BANK Bank, + UINT32 IoNumber, + IMX_GPIO_DIR Direction + ); + +/** + Write a value to a GPIO pin. +**/ +VOID +ImxGpioWrite ( + IMX_GPIO_BANK Bank, + UINT32 IoNumber, + IMX_GPIO_VALUE Value + ); + +/** + Read a GPIO pin input value. +**/ +IMX_GPIO_VALUE +ImxGpioRead ( + IMX_GPIO_BANK Bank, + UINT32 IoNumber + ); + +#endif diff --git a/Silicon/NXP/iMXPlatformPkg/Include/iMXIoMux.h b/Silicon/NXP/iM= XPlatformPkg/Include/iMXIoMux.h new file mode 100644 index 000000000000..7696af57d7ea --- /dev/null +++ b/Silicon/NXP/iMXPlatformPkg/Include/iMXIoMux.h @@ -0,0 +1,24 @@ +/** @file +* +* Copyright (c) 2018 Microsoft Corporation. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#ifndef _IMX_IO_MUX_H_ +#define _IMX_IO_MUX_H_ + +#define _IMX_PAD(CtlRegOffset, MuxRegOffset) \ + ((((CtlRegOffset) & 0xffff) << 16) | ((MuxRegOffset) & 0xffff)) + +#define _IMX_PAD_CTL_OFFSET(ImxPadVal) ((ImxPadVal) >> 16) +#define _IMX_PAD_MUX_OFFSET(ImxPadVal) ((ImxPadVal) & 0xffff) + +#endif // _IMX_IO_MUX_H_ --=20 2.16.2.gvfs.1.33.gf5370f1