From: Chris Co <Christopher.Co@microsoft.com>
To: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: Michael D Kinney <michael.d.kinney@intel.com>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Leif Lindholm <leif.lindholm@linaro.org>
Subject: [PATCH edk2-platforms 26/27] Platform/SolidRun: Add i.MX 6Quad Hummingboard Edge ACPI tables
Date: Fri, 21 Sep 2018 08:26:18 +0000 [thread overview]
Message-ID: <20180921082542.35768-27-christopher.co@microsoft.com> (raw)
In-Reply-To: <20180921082542.35768-1-christopher.co@microsoft.com>
This adds ACPI table support for SolidRun's i.MX 6Quad Hummingboard Edge
platform.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Christopher Co <christopher.co@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
---
Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/AcpiTables.inf | 55 ++++
Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/DSDT.asl | 38 +++
Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Audio.asl | 71 ++++
Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-AudioCodec.asl | 33 ++
Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-I2c.asl | 54 +++
Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Pwm.asl | 32 ++
Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Rhp.asl | 234 +++++++++++++
Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Sdhc.asl | 144 ++++++++
Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Spi.asl | 43 +++
Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Uart.asl | 198 +++++++++++
Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Usb.asl | 343 ++++++++++++++++++++
11 files changed, 1245 insertions(+)
diff --git a/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/AcpiTables.inf b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/AcpiTables.inf
new file mode 100644
index 000000000000..2386c60d211d
--- /dev/null
+++ b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/AcpiTables.inf
@@ -0,0 +1,55 @@
+## @file
+#
+# Copyright (c) 2018 Microsoft Corporation. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = PlatformAcpiTables
+ FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD
+ MODULE_TYPE = USER_DEFINED
+ VERSION_STRING = 1.0
+ DEFINE COMMON_ACPI_DIR = Silicon/NXP/iMX6Pkg/AcpiTables
+
+[Sources]
+ DSDT.asl
+ $(COMMON_ACPI_DIR)/Csrt.aslc
+ $(COMMON_ACPI_DIR)/Dbg2.aslc
+ $(COMMON_ACPI_DIR)/Fadt.aslc
+ $(COMMON_ACPI_DIR)/Madt.aslc
+ $(COMMON_ACPI_DIR)/Mcfg.aslc
+ $(COMMON_ACPI_DIR)/Tpm2.aslc
+ $(COMMON_ACPI_DIR)/Spcr.aslc
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Platform/Microsoft/OpteeClientPkg/OpteeClientPkg.dec
+ Silicon/NXP/iMX6Pkg/iMX6Pkg.dec
+ Silicon/NXP/iMXPlatformPkg/iMXPlatformPkg.dec
+
+[FixedPcd]
+ gArmPlatformTokenSpaceGuid.PcdCoreCount
+
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
+
+ giMX6TokenSpaceGuid.PcdPcieDeviceConfigBase
+ giMX6TokenSpaceGuid.PcdPcieHostConfigBase
+
+ giMXPlatformTokenSpaceGuid.PcdKdUartInstance
+
+ gOpteeClientPkgTokenSpaceGuid.PcdTpm2AcpiBufferBase
+ gOpteeClientPkgTokenSpaceGuid.PcdTpm2AcpiBufferSize
diff --git a/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/DSDT.asl b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/DSDT.asl
new file mode 100644
index 000000000000..6e639bb838a6
--- /dev/null
+++ b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/DSDT.asl
@@ -0,0 +1,38 @@
+/** @file
+*
+* Copyright (c) 2018 Microsoft Corporation. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "Dsdt-Common.h"
+
+#define SOC_TYPE 0x00000063 // iMX6 Quad
+
+DefinitionBlock ("DSDT.aml", "DSDT", 5, "MSFT", "EDK2", 1)
+{
+ Scope (\_SB_) {
+ include ("Dsdt-Platform.asl")
+ include ("Dsdt-Gpio.asl")
+ include ("Dsdt-Gfx.asl")
+ include ("Dsdt-Usb.asl")
+ include ("Dsdt-PCIe.asl")
+ include ("Dsdt-Sdhc.asl")
+ include ("Dsdt-Enet.asl")
+ include ("Dsdt-Audio.asl")
+ include ("Dsdt-AudioCodec.asl")
+ include ("Dsdt-Uart.asl")
+ include ("Dsdt-I2c.asl")
+ include ("Dsdt-Spi.asl")
+ include ("Dsdt-Rhp.asl")
+ include ("Dsdt-Pwm.asl")
+ include ("Dsdt-TrEE.asl")
+ } // \_SB_
+}
diff --git a/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Audio.asl b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Audio.asl
new file mode 100644
index 000000000000..23fbf5f52677
--- /dev/null
+++ b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Audio.asl
@@ -0,0 +1,71 @@
+/** @file
+*
+* iMX6 Quad Synchronous Serial Interface (SSI)
+*
+* Copyright (c) 2018 Microsoft Corporation. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+Device (SSI1)
+{
+ Name (_HID, "NXP010A")
+ Name (_UID, 0x1)
+
+ Method (_STA) {
+ Return (0xf)
+ }
+
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x02028000, 0x4000, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 78 }
+ })
+ Return (RBUF)
+ }
+}
+
+Device (SSI2)
+{
+ Name (_HID, "NXP010A")
+ Name (_UID, 0x2)
+
+ Method (_STA) {
+ Return (0xf)
+ }
+
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x0202C000, 0x4000, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 79 }
+ })
+ Return (RBUF)
+ }
+}
+
+Device (SSI3)
+{
+ Name (_HID, "NXP010A")
+ Name (_UID, 0x3)
+
+ Method (_STA) {
+ Return (0xf)
+ }
+
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x02030000, 0x4000, )
+ MEMORY32FIXED (ReadWrite, 0x021d8000, 0x38, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 80 }
+ MsftFunctionConfig (Shared, PullDown, 0, "\\_SB.SSI3", 0, ResourceConsumer, ) { 7, 5 }
+ })
+ Return (RBUF)
+ }
+}
diff --git a/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-AudioCodec.asl b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-AudioCodec.asl
new file mode 100644
index 000000000000..8ab9bece73d7
--- /dev/null
+++ b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-AudioCodec.asl
@@ -0,0 +1,33 @@
+/** @file
+*
+* iMX6 Quad Freescale SGTL5000 audio codec
+*
+* Copyright (c) 2018 Microsoft Corporation. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+Device (ACDK)
+{
+ Name (_HID, "SGTL5000")
+ Name (_UID, 0x0)
+
+ Method (_STA) {
+ Return (0xf)
+ }
+
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ I2CSerialBus (0x0a, ControllerInitiated, 400000, AddressingMode7Bit,
+ "\\_SB.I2C1", 0, ResourceConsumer)
+ })
+ Return (RBUF)
+ }
+}
diff --git a/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-I2c.asl b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-I2c.asl
new file mode 100644
index 000000000000..7e1d0cc2c9ab
--- /dev/null
+++ b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-I2c.asl
@@ -0,0 +1,54 @@
+/** @file
+*
+* iMX6 Quad I2C Controllers
+*
+* Copyright (c) 2018 Microsoft Corporation. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+Device (I2C1)
+{
+ Name (_HID, "NXP0104")
+ Name (_UID, 0x1)
+
+ Method (_STA) {
+ Return (0xf)
+ }
+
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x021A0000, 0x14, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 68 }
+ })
+ Return (RBUF)
+ }
+}
+
+// Device (I2C2)
+// do not include I2C2 resources since it is pin muxed to HDMI
+
+Device (I2C3)
+{
+ Name (_HID, "NXP0104")
+ Name (_UID, 0x3)
+
+ Method (_STA) {
+ Return (0xf)
+ }
+
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x021A8000, 0x14, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 70 }
+ })
+ Return (RBUF)
+ }
+}
diff --git a/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Pwm.asl b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Pwm.asl
new file mode 100644
index 000000000000..59565c576a71
--- /dev/null
+++ b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Pwm.asl
@@ -0,0 +1,32 @@
+/** @file
+* iMX6 Quad Pulse Width Modulator (PWM)
+*
+* Copyright (c) 2018 Microsoft Corporation. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+Device (PWM1)
+{
+ Name (_HID, "NXP010E")
+ Name (_UID, 0x1)
+
+ Method (_STA) {
+ Return (0xf)
+ }
+
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x02080000, 0x4000, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 115 }
+ })
+ Return (RBUF)
+ }
+}
diff --git a/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Rhp.asl b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Rhp.asl
new file mode 100644
index 000000000000..be5048fe3963
--- /dev/null
+++ b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Rhp.asl
@@ -0,0 +1,234 @@
+/** @file
+*
+* iMX6 Quad Resource Hub Proxy
+*
+* Copyright (c) 2018 Microsoft Corporation. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+Device (RHPX)
+{
+ Name (_HID, "MSFT8000")
+ Name (_CID, "MSFT8000")
+ Name (_UID, 1)
+
+ Name (_CRS, ResourceTemplate() {
+ // Index 0
+ I2CSerialBus (0xFFFF,, 0,, "\\_SB.I2C3",,,,)
+
+ // Index 1
+ SPISerialBus ( // SCKL
+ // MOSI
+ // MISO
+ // CE0
+ 0, // Device selection (CE0)
+ PolarityLow, // Device selection polarity
+ FourWireMode, // wiremode
+ 8, // databit len
+ ControllerInitiated, // slave mode
+ 4000000, // connection speed
+ ClockPolarityLow, // clock polarity
+ ClockPhaseFirst, // clock phase
+ "\\_SB.SPI2", // ResourceSource: SPI bus controller name
+ 0, // ResourceSourceIndex
+ // Resource usage
+ // DescriptorName: creates name for
+ // offset of resource descriptor
+ ) // Vendor Data
+
+ // SPDIF_IN - GPIO1_IO24 PAD_ENET_RX_ER
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 24 } // 0 * 32 + 24
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 24 }
+
+ // DISP1_DATA17 - GPIO2_IO16 PAD_EIM_ADDR22
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 48 } // 1 * 32 + 16
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 48 }
+
+ // DISP1_DATA16 - GPIO2_IO17 PAD_EIM_ADDR21
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 49 } // 1 * 32 + 17
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 49 }
+
+ // DISP1_DATA15 - GPIO2_IO18 PAD_EIM_ADDR20
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 50 } // 1 * 32 + 18
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 50 }
+
+ // DISP1_DATA14 - GPIO2_IO19 PAD_EIM_ADDR19
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 51 } // 1 * 32 + 19
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 51 }
+
+ // DISP1_DATA13 - GPIO2_IO20 PAD_EIM_ADDR18
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 52 } // 1 * 32 + 20
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 52 }
+
+ // DISP1_DATA12 - GPIO2_IO21 PAD_EIM_ADDR17
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 53 } // 1 * 32 + 21
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 53 }
+
+ // DI1_DISP_CLK - GPIO2_IO22 PAD_EIM_ADDR16
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 54 } // 1 * 32 + 22
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 54 }
+
+ // DISP1_DATA11 - GPIO2_IO28 PAD_EIM_EB0
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 60 } // 1 * 32 + 28
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 60 }
+
+ // DISP1_DATA10 - GPIO2_IO29 PAD_EIM_EB1
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 61 } // 1 * 32 + 29
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 61 }
+
+ // DISP1_DATA09 - GPIO3_IO00 PAD_EIM_AD00
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 64 } // 2 * 32 + 0
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 64 }
+
+ // DISP1_DATA08 - GPIO3_IO01 PAD_EIM_AD01
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 65 } // 2 * 32 + 1
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 65 }
+
+ // DISP1_DATA07 - GPIO3_IO02 PAD_EIM_AD02
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 66 } // 2 * 32 + 2
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 66 }
+
+ // DISP1_DATA06 - GPIO3_IO03 PAD_EIM_AD03
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 67 } // 2 * 32 + 3
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 67 }
+
+ // DISP1_DATA05 - GPIO3_IO04 PAD_EIM_AD04
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 68 } // 2 * 32 + 4
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 68 }
+
+ // DISP1_DATA04 - GPIO3_IO05 PAD_EIM_AD05
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 69 } // 2 * 32 + 5
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 69 }
+
+ // DISP1_DATA03 - GPIO3_IO06 PAD_EIM_AD06
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 70 } // 2 * 32 + 6
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 70 }
+
+ // DISP1_DATA02 - GPIO3_IO07 PAD_EIM_AD07
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 71 } // 2 * 32 + 7
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 71 }
+
+ // DISP1_DATA01 - GPIO3_IO08 PAD_EIM_AD08
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 72 } // 2 * 32 + 8
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 72 }
+
+ // DISP1_DATA00 - GPIO3_IO09 PAD_EIM_AD09
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 73 } // 2 * 32 + 9
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 73 }
+
+ // DI1_PIN15 - GPIO3_IO10 PAD_EIM_AD10
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 74 } // 2 * 32 + 10
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 74 }
+
+ // DI1_PIN02 - GPIO3_IO11 PAD_EIM_AD11
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 75 } // 2 * 32 + 11
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 75 }
+
+ // DI1_PIN03 - GPIO3_IO12 PAD_EIM_AD12
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 76 } // 2 * 32 + 12
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 76 }
+
+ // DI1_D0_CS - GPIO3_IO13 PAD_EIM_AD13
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 77 } // 2 * 32 + 13
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 77 }
+
+ // DI1_D1_CS - GPIO3_IO14 PAD_EIM_AD14
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 78 } // 2 * 32 + 14
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 78 }
+
+ // DI1_PIN01 - GPIO3_IO15 PAD_EIM_AD15
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 79 } // 2 * 32 + 15
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 79 }
+
+ // DISP1_DATA22 - GPIO3_IO26 PAD_EIM_DATA26
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 90 } // 2 * 32 + 26
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 90 }
+
+ // DISP1_DATA23 - GPIO3_IO27 PAD_EIM_DATA27
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 91 } // 2 * 32 + 27
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 91 }
+
+ // DISP1_DATA21 - GPIO3_IO30 PAD_EIM_DATA30
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 94 } // 2 * 32 + 20
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 94 }
+
+ // DISP1_DATA20 - GPIO3_IO31 PAD_EIM_DATA31
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 95 } // 2 * 32 + 31
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 95 }
+
+ // DISP1_DATA19 - GPIO5_IO04 PAD_EIM_ADDR24
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 132 } // 4 * 32 + 4
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 132 }
+
+ // DISP1_DATA18 - GPIO6_IO06 PAD_EIM_ADDR23
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 166 } // 5 * 32 + 6
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 166 }
+
+ // SPDIF_OUT - GPIO7_IO12 PAD_GPIO17
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 204 } // 6 * 32 + 12
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPIO",) { 204 }
+ })
+
+ Name (_DSD, Package() {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package() {
+ // I2C3
+ Package (2) { "bus-I2C-I2C3", Package() { 0 } },
+
+ // SPI 2
+ Package (2) { "bus-SPI-SPI2", Package() { 1 } }, // Index 1
+ Package (2) { "SPI2-MinClockInHz", 115 }, // 115 Hz
+ Package (2) { "SPI2-MaxClockInHz", 12000000 }, // 12 MHz
+ // Data bit length
+ Package (2) { "SPI2-SupportedDataBitLengths", Package() { 8, 16, 32 } },
+
+ // GPIO Pin Count and supported drive modes
+ Package (2) { "GPIO-PinCount", 206 },
+ Package (2) { "GPIO-UseDescriptorPinNumbers", 1 },
+
+ // InputHighImpedance, InputPullUp, InputPullDown, OutputCmos
+ Package (2) { "GPIO-SupportedDriveModes", 0xf },
+ }
+ })
+}
diff --git a/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Sdhc.asl b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Sdhc.asl
new file mode 100644
index 000000000000..d3f275d21473
--- /dev/null
+++ b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Sdhc.asl
@@ -0,0 +1,144 @@
+/** @file
+*
+* iMX6 Quad Ultra Secured Digital Host Controllers (uSDHC)
+*
+* Copyright (c) 2018 Microsoft Corporation. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+// uSDHC1: WLAN SDIO Socket
+Device (SDH1)
+{
+ Name (_HID, "NXP0108")
+ Name (_UID, 0x1)
+
+ Method (_STA) {
+ Return (0xf)
+ }
+
+ Name (_S1D, 0x1)
+ Name (_S2D, 0x1)
+ Name (_S3D, 0x1)
+ Name (_S4D, 0x1)
+
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x02190000, 0x4000, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 54 }
+ })
+ Return (RBUF)
+ }
+
+ Device (SD0) {
+ Method (_ADR) {
+ Return (0)
+ }
+
+ Method (_RMV) {
+ Return (0)
+ }
+ }
+
+ Device (TIWL)
+ {
+ Name (_ADR, 0)
+ // TODO: We must replace these HID and CID values with valid ones
+ Name (_HID, "TI_WLAN")
+ Name (_CID, "TI_WLAN")
+ Name (_UID, 1)
+
+ Method (_STA) {
+ Return(0xf)
+ }
+
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ GpioInt(Edge, ActiveHigh, Exclusive, PullNone, 0, "\\_SB.GPIO", 0,
+ ResourceConsumer,,) { 164 } // WLAN_EN
+ GpioIo(Exclusive, PullNone, 0, 2, IoRestrictionOutputOnly,
+ "\\_SB.GPIO",0, ResourceConsumer,,) { 154 }
+ })
+ Return (RBUF)
+ }
+ }
+}
+
+// uSDHC2: SDCard Socket
+Device (SDH2)
+{
+ Name (_HID, "NXP0108")
+ Name (_UID, 0x2)
+
+ Method (_STA) {
+ Return (0xf)
+ }
+
+ Name (_S1D, 0x1)
+ Name (_S2D, 0x1)
+ Name (_S3D, 0x1)
+ Name (_S4D, 0x1)
+
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x02194000, 0x4000, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 55 }
+ })
+ Return (RBUF)
+ }
+
+ Device (SD0) {
+ Method (_ADR) {
+ Return (0)
+ }
+
+ // Despite the SDCard is a removal device, UWF requires the
+ // boot device to be non-removable. This is required for the
+ // Windows SDCard boot scenario with UWF enabled.
+ Method (_RMV) {
+ Return (0)
+ }
+ }
+}
+
+// uSDHC3: eMMC
+Device (SDH3)
+{
+ Name (_HID, "NXP0108")
+ Name (_UID, 0x3)
+
+ Method (_STA) {
+ Return (0xf)
+ }
+
+ Name (_S1D, 0x1)
+ Name (_S2D, 0x1)
+ Name (_S3D, 0x1)
+ Name (_S4D, 0x1)
+
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x02198000, 0x4000, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 56 }
+ })
+ Return (RBUF)
+ }
+
+ Device (MMC0) {
+ Method (_ADR) {
+ Return (0)
+ }
+
+ // eMMC is non-removable
+ Method (_RMV) {
+ Return (0)
+ }
+ }
+}
diff --git a/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Spi.asl b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Spi.asl
new file mode 100644
index 000000000000..2eb9fe41f127
--- /dev/null
+++ b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Spi.asl
@@ -0,0 +1,43 @@
+/** @file
+*
+* iMX6 Quad SPI Controller
+*
+* Copyright (c) 2018 Microsoft Corporation. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+Device (SPI2)
+{
+ Name (_HID, "NXP0105")
+ Name (_UID, 0x2)
+ Method (_STA) {
+ Return (0xf)
+ }
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x0200C000, 0x4000, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 64 }
+
+ // CS0 (PAD_EIM_RW) GPIO2_IO26
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 58 }
+ // CS1 (PAD_EIM_LBA) GPIO2_IO27
+ GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,, ) { 59 }
+
+ // MISO: PAD_EIM_OE_B (GPIO2_IO25) Alt2
+ // MOSI: PAD_EIM_CS1_B (GPIO2_IO24) Alt2
+ // SCLK: PAD_EIM_CS0_B (GPIO2_IO23) Alt2
+ MsftFunctionConfig (Exclusive, PullDown, IMX_ALT2, "\\_SB.GPIO", 0,
+ ResourceConsumer, ) { 57, 56, 55 } })
+ Return (RBUF)
+ }
+}
diff --git a/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Uart.asl b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Uart.asl
new file mode 100644
index 000000000000..c64c4664c442
--- /dev/null
+++ b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Uart.asl
@@ -0,0 +1,198 @@
+/** @file
+*
+* iMX6 Quad UART Controllers
+*
+* Copyright (c) 2018 Microsoft Corporation. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+Device (UAR1)
+{
+ Name (_HID, "NXP0106")
+ Name (_UID, 0x1)
+ Name (_DDN, "UART1")
+ Method (_STA) {
+ Return (0xf)
+ }
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x02020000, 0x4000, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { 58 }
+
+ // UART1_TX_DATA - CSI0_DAT10 - GPIO5_IO28 - 156
+ // UART1_RX_DATA - CSI0_DAT11 - GPIO5_IO29 - 157
+ MsftFunctionConfig (Exclusive, PullUp, IMX_ALT3, "\\_SB.GPIO", 0,
+ ResourceConsumer, ) { 156, 157 }
+
+ // DMA channel 2, SDMA_REQ_UART1_RX for UART1 RX DMA
+ FixedDMA (SDMA_REQ_UART1_RX, 2, Width8Bit, )
+ // DMA channel 1, SDMA_REQ_UART1_TX for UART1 TX DMA
+ FixedDMA (SDMA_REQ_UART1_TX, 1, Width8Bit, )
+
+ UARTSerialBus (
+ 115200,
+ DataBitsEight,
+ StopBitsOne,
+ 0, // LinesInUse
+ LittleEndian,
+ ParityTypeNone,
+ FlowControlNone,
+ 0,
+ 0,
+ "\\_SB.CPU0",
+ 0,
+ ResourceConsumer,
+ ,)
+ })
+ Return (RBUF)
+ }
+}
+
+Device (UAR2)
+{
+ Name (_HID, "NXP0107")
+ Name (_UID, 0x2)
+ Name (_DDN, "UART2")
+ Method (_STA) {
+ Return (0xf)
+ }
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x021E8000, 0x4000, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 59 }
+
+ // DMA channel 4, SDMA_REQ_UART2_RX for UART2 RX DMA
+ FixedDMA (SDMA_REQ_UART2_RX, 4, Width8Bit, )
+ // DMA channel 3, SDMA_REQ_UART2_TX for UART2 TX DMA
+ FixedDMA (SDMA_REQ_UART2_TX, 3, Width8Bit, )
+
+ // UART2_TX_DATA - SD4_DAT7 - GPIO2_IO15 - 47
+ // UART2_RX_DATA - SD4_DAT4 - GPIO2_IO12 - 44
+ // UART2_CTS_B - SD4_DAT6 - GPIO2_IO14 - 46
+ // UART2_RTSB is not pinned out because it is connected to USB
+ MsftFunctionConfig (Exclusive, PullUp, IMX_ALT2, "\\_SB.GPIO", 0,
+ ResourceConsumer, ) { 44, 46, 47 }
+
+ UARTSerialBus (
+ 115200,
+ DataBitsEight,
+ StopBitsOne,
+ 0xC0, // LinesInUse
+ LittleEndian,
+ ParityTypeNone,
+ FlowControlNone,
+ 0,
+ 0,
+ "\\_SB.CPU0",
+ 0,
+ ResourceConsumer,
+ ,)
+ })
+ Return (RBUF)
+ }
+}
+
+Device (UAR3)
+{
+ Name (_HID, "NXP0107")
+ Name (_UID, 0x3)
+ Name (_DDN, "UART3")
+ Method (_STA) {
+ Return (0xf)
+ }
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x021EC000, 0x4000, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 60 }
+
+ // DMA channel 6, SDMA_REQ_UART3_RX for UART3 RX DMA
+ FixedDMA (SDMA_REQ_UART3_RX, 6, Width8Bit, )
+ // DMA channel 5, SDMA_REQ_UART3_TX for UART3 TX DMA
+ FixedDMA (SDMA_REQ_UART3_TX, 5, Width8Bit, )
+
+ // UART3_TX - EIM_D24 - GPIO3_IO24 - 88
+ // UART3_RX - EIM_D25 - GPIO3_IO25 - 89
+ MsftFunctionConfig (Exclusive, PullUp, IMX_ALT2, "\\_SB.GPIO", 0,
+ ResourceConsumer, ) { 88, 89 }
+
+ UARTSerialBus (
+ 115200,
+ DataBitsEight,
+ StopBitsOne,
+ 0, // LinesInUse
+ LittleEndian,
+ ParityTypeNone,
+ FlowControlNone,
+ 0,
+ 0,
+ "\\_SB.CPU0",
+ 0,
+ ResourceConsumer,
+ ,)
+ })
+ Return (RBUF)
+ }
+}
+
+// Connected to bluetooth module
+Device (UAR4)
+{
+ Name (_HID, "NXP0107")
+ Name (_UID, 0x4)
+ Name (_DDN, "UART4")
+ Method (_STA) {
+ Return (0xf)
+ }
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x021F0000, 0x4000, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 61 }
+
+ // DMA channel 8, SDMA_REQ_UART4_RX for UART4 RX DMA
+ FixedDMA (SDMA_REQ_UART4_RX, 8, Width8Bit, )
+ // DMA channel 7, SDMA_REQ_UART4_TX for UART4 TX DMA
+ FixedDMA (SDMA_REQ_UART4_TX, 7, Width8Bit, )
+
+ // UART4_TX_DATA - CSI0_DAT12 - GPIO5_IO30 - 158
+ // UART4_RX_DATA - CSI0_DAT13 - GPIO5_IO31 - 159
+ MsftFunctionConfig (Exclusive, PullUp, IMX_ALT3, "\\_SB.GPIO", 0,
+ ResourceConsumer, ) { 158, 159 }
+
+ // UART4_RTS_B - CSI0_DAT16 - GPIO6_IO02 - 162
+ // UART4_CTS_B - CSI0_DAT17 - GPIO6_IO03 - 163
+ MsftFunctionConfig (Exclusive, PullUp, IMX_ALT3, "\\_SB.GPIO", 0,
+ ResourceConsumer, ) { 162, 163 }
+ })
+ Return (RBUF)
+ }
+}
+
+Device (UAR5)
+{
+ Name (_HID, "NXP0107")
+ Name (_UID, 0x5)
+ Name (_DDN, "UART5")
+ Method (_STA) {
+ Return (0)
+ }
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x021F4000, 0x4000, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 62 }
+
+ // DMA channel 10, SDMA_REQ_UART5_RX for UART5 RX DMA
+ FixedDMA (SDMA_REQ_UART5_RX, 10, Width8Bit, )
+ // DMA channel 9, SDMA_REQ_UART5_TX for UART5 TX DMA
+ FixedDMA (SDMA_REQ_UART5_TX, 9, Width8Bit, )
+ })
+ Return (RBUF)
+ }
+}
diff --git a/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Usb.asl b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Usb.asl
new file mode 100644
index 000000000000..65a0782d2705
--- /dev/null
+++ b/Platform/SolidRun/HummingBoardEdge_iMX6Q_2GB/AcpiTables/Dsdt-Usb.asl
@@ -0,0 +1,343 @@
+/** @file
+*
+* iMX6 Quad EHCI USB Controllers
+*
+* Copyright (c) 2018 Microsoft Corporation. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+Device (URS0)
+{
+ Name (_HID, "PNP0C90")
+ Name (_UID, 0x0)
+
+ // URS requires device to at least be wake-able from D2 state
+ // WDF also requires that _DSW (enable & disable wake ability) to be present
+ Name (_S0W, 0x3)
+ Name (_PRW, Package() { 0, 0 })
+ Method (_DSW, 0x3, NotSerialized) {
+ }
+
+ Method (_STA) {
+ Return (0xf)
+ }
+
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ // Controller register address space. URS driver would add 0x0100
+ // offset for host mode
+ MEMORY32FIXED (ReadWrite, 0x02184000, 0x200, )
+
+ // USB_OTG_ID pin, needs to be declared as *Wake as this device is
+ // expected to be wakable. The USB PHY is capable to detect
+ // USB ID changes but the interrupt cannot be acknowledge
+ // and the behaviour is undefined based on NXP feedback. So
+ // the the only way to reliably detect USB ID changed is to
+ // either to share interrupts or assign a GPIO to detect.
+ // The URS driver does not properly handle level sensitive
+ // interrupts which can lead to an interrupt storm. Therefore we use
+ // an edge sensitive GPIO interrupt.
+ //
+ // USB_OTG_ID connected to GPIO_1 (GPIO1_IO01). Use 1ms debounce.
+ GpioInt (Edge, ActiveBoth, SharedAndWake, PullDefault, 100, "\\_SB.GPIO",) { 1 }
+ })
+ Return (RBUF)
+ }
+
+ Name (OTGR, ResourceTemplate() {
+ GpioIO (Shared, PullDefault, 0, 0, IoRestrictionNone, "\\_SB.GPIO", 0,
+ ResourceConsumer,,) {
+ 1
+ }
+ })
+
+ Scope (\_SB_.GPIO) {
+ OperationRegion (OTGP, GeneralPurposeIO, Zero, One)
+ }
+
+ Field (\_SB_.GPIO.OTGP, ByteAcc, NoLock, Preserve) {
+ Connection (\_SB_.URS0.OTGR),
+ OTGF, 1
+ }
+
+ // Device Specific Method takes 4 args:
+ // Arg0 : Buffer containing a UUID [16 bytes]
+ // Arg1 : Integer containing the Revision ID
+ // Arg2 : Integer containing the Function Index
+ // Arg3 : Package that contains function-specific arguments (Unused?)
+ Method (_DSM, 0x4, NotSerialized) {
+ Name (RET, 0x0); // Declare return variable
+ Name (PVAL, 0x0); // Declare pin value variable
+
+ // Check UUID
+ switch (ToBuffer (Arg0)) {
+ // URS UUID
+ case (ToUUID ("14EB0A6A-79ED-4B37-A8C7-84604B55C5C3")) {
+ // Function index
+ switch (Arg2) {
+
+ // Function 0: Return supported functions, based on revision
+ // Return value and revision ID lack documentation
+ case (0) {
+ switch (Arg1) {
+ // Revision 0: function {1,2} supported
+ case (0) {
+ Return (0x03);
+ }
+ default {
+ Return (0x0);
+ }
+ }
+ }
+
+ // Function 1: Read USB_OTG_ID pin value
+ //
+ // Return value
+ // 0 = UrsHardwareEventIdFloat (Function)
+ // 1 = UrsHardwareEventIdGround (Host)
+ case (1) {
+ Store (OTGF, PVAL); // Read value of OTG_ID Pin
+ Store (LEqual (PVAL, 0), RET); // Complement value
+ Return (RET);
+ }
+
+ // Function 2: Read USB_OTG_ID pin value
+ //
+ // Return value
+ // 0 = UrsHardwareEventIdFloat (Function)
+ // 1 = UrsHardwareEventIdGround (Host)
+ case (2) {
+ Store (OTGF, PVAL); // Read value of OTG_ID Pin
+ Store (LEqual (PVAL, 0), RET); // Complement value
+ Return (RET);
+ }
+
+ // Unknown function index
+ default {
+ Return (0x0);
+ }
+ } // Function index
+ }
+
+ // Unknown UUID
+ default {
+ Return (0x0);
+ }
+ } // Check UUID
+ } // _DSM
+
+ Device (USB0) {
+ // The host controller device node needs to have an address of '0'
+ Name (_ADR, 0x0)
+ Name (_UID, 0x0)
+ Name (_S0W, 0x0) // D0 is the lowest supported state to wake itself up
+ Method (_STA) {
+ Return (0xf)
+ }
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, SharedAndWake) { 75 }
+ })
+ Return (RBUF)
+ }
+
+ OperationRegion (OTGM, SystemMemory, 0x02184100, 0x100)
+ Field (OTGM, WordAcc, NoLock, Preserve) {
+ Offset (0x84), // skip to register 84h
+ PTSC, 32, // port status control
+ Offset (0xA8), // skip to register A8h
+ DSBM, 32, // UOG_USBMOD
+ }
+
+ Name (REG, 0x0); // Declare register read variable
+ Method (_UBF, 0x0, NotSerialized) {
+ // Reset handled by driver so no reset required here
+ Store (0x03, DSBM); // set host mode & little endian
+ Store (PTSC, REG); // read PORTSC status
+ Store (OR (REG, 0x2), PTSC); // clear current PORTSC status
+ }
+ }
+
+ Device (UFN0) {
+ // The function controller device node needs to have an address of '1'
+ Name (_ADR, 0x1)
+
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, SharedAndWake) { 75 }
+ })
+ Return (RBUF)
+ }
+
+ OperationRegion (OTGM, SystemMemory, 0x02184100, 0x100)
+ Field (OTGM, WordAcc, NoLock, Preserve) {
+ Offset (0x84), // skip to register 84h
+ PTSC, 32, // port status control
+ Offset (0xA8), // skip to register A8h
+ DSBM, 32, // UOG_USBMOD
+ }
+
+ Name (REG, 0x0); // Declare register read variable
+ Method (_UBF, 0x0, NotSerialized) {
+ // Reset handled by driver so no reset required here
+ Store (0x02, DSBM); // set device mode & little endian
+ Store (PTSC, REG); // read PORTSC status
+ Store (OR (REG, 0x2), PTSC); // clear current PORTSC status
+ }
+
+ // Device Specific Method takes 4 args:
+ // Arg0 : Buffer containing a UUID [16 bytes]
+ // Arg1 : Integer containing the Revision ID
+ // Arg2 : Integer containing the Function Index
+ // Arg3 : Package that contains function-specific arguments
+ Method (_DSM, 0x4, NotSerialized) {
+ switch (ToBuffer (Arg0)) {
+ // UFX Chipidea interface identifier
+ case (ToUUID ("732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511")) {
+ // Function selector
+ switch (Arg2) {
+
+ // Function 0: Query support
+ // Bit Description
+ // --- -------------------------------
+ // 0 Get property
+ // 1 Get properties (Function 1)
+ // 2 Set USB device state
+ case (0) {
+ switch (Arg1) {
+ // Revision 0: functions {0,1} supported
+ case (0) {
+ Return (Buffer() { 0x03 });
+ }
+ default {
+ Return (Buffer() { 0x01 });
+ }
+ }
+ }
+
+ // Function 1: Return device capabilities bitmap
+ // Bit Description
+ // --- -------------------------------
+ // 0 Attach detach
+ // 1 Software charging
+ case (1) {
+ Return (0x01);
+ }
+
+ // Function 2: Get port type
+ // 0x00 Unknown port
+ // 0x01 Standard downstream
+ // 0x02 Charging downstream
+ // 0x03 Dedicated charging
+ case (2) {
+ Return (0x01);
+ }
+
+ // Function 3: Set device state
+ case (3) {
+ Return (Buffer() { 0x0 });
+ }
+
+ // Unknown function
+ default {
+ Return (Buffer() { 0x0 });
+ }
+ }
+ }
+
+ // UFX interface identifier
+ case (ToUUID ("FE56CFEB-49D5-4378-A8A2-2978DBE54AD2")) {
+ // Function selector
+ switch (Arg2) {
+ // Function 1: Return number of supported USB PHYSICAL endpoints
+ // Up to 8 bidirectional endpoints
+ case (1) {
+ Return (8);
+ }
+ default {
+ Return (Buffer() { 0x0 });
+ }
+ }
+ }
+
+ //
+ // Unknown UUID
+ //
+ default {
+ Return (0x0);
+ }
+ } // UUID
+ } // _DSM
+ }
+}
+
+Device (USB1)
+{
+ Name (_HID, "NXP010C")
+ Name (_CID, "PNP0D20")
+ Name (_UID, 0x1)
+ Name (_S0W, 0x0)
+
+ // USB Host controller registers
+ OperationRegion (USBH, SystemMemory, 0x02184000, 0x1000)
+ Field (USBH, DWordAcc, NoLock, Preserve) {
+ Offset (0x00000344),
+ USTS, 32, // USB_UH1_USBSTS
+ Offset (0x00000348),
+ INTR, 32, // USB_UH1_USBINTR
+ Offset (0x00000384), // skip to register 0x384
+ PSC1, 32, // USB_UH1_PORTSC1
+ Offset (0x00000804), // skip to register 0x804
+ NCTL, 32, // USBNC_USB_UH1_CTRL
+ }
+
+ // USBPHY2 Registers
+ OperationRegion (PHY2, SystemMemory, 0x020CA000, 0x1000)
+ Field (PHY2, DWordAcc, NoLock, Preserve) {
+ Offset (0x0000000), // skip to register 0
+ PPWD, 32, // USBPHY2_PWD
+ Offset (0x00000030), // skip to register 0x30
+ PCTL, 32, // USBPHY2_CTRL
+ Offset (0x00000034), // skip to register 0x34
+ PCTS, 32, // USBPHY2_CTRL_SET
+ Offset (0x00000038), // skip to register 0x38
+ PCTC, 32, // USBPHY2_CTRL_CLR
+ Offset (0x00000050), // skip to register 0x50
+ PDBG, 32, // USBPHY2_DEBUG
+ Offset (0x00000054), // skip to register 0x54
+ PDBS, 32, // USBPHY2_DEBUG_SET
+ Offset (0x00000058), // skip to register 0x58
+ PDBC, 32, // USBPHY2_DEBUG_CLR
+ }
+
+ // Anatop Registers
+ OperationRegion (ANAT, SystemMemory, 0x020C8000, 0x1000)
+ Field (ANAT, DWordAcc, NoLock, Preserve) {
+ Offset (0x0000244), // skip to register 0x244
+ LPBS, 32, // ANADIG_USB2_LOOPBACK_SET
+ Offset (0x0000248), // skip to register 0x248
+ LPBC, 32, // ANADIG_USB2_LOOPBACK_CLR
+ }
+
+ Method (_STA) {
+ Return (0xf)
+ }
+ Method (_CRS, 0x0, NotSerialized) {
+ Name (RBUF, ResourceTemplate () {
+ MEMORY32FIXED (ReadWrite, 0x02184300, 0x100, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake) { 72 }
+ })
+ Return (RBUF)
+ }
+
+ Method (_UBF, 0x0, NotSerialized) {
+ }
+}
--
2.16.2.gvfs.1.33.gf5370f1
next prev parent reply other threads:[~2018-09-21 8:26 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-21 8:25 [PATCH edk2-platforms 00/27] Import Hummingboard Edge platform for Windows IoT Core Chris Co
2018-09-21 8:25 ` [PATCH edk2-platforms 01/27] Platform/Microsoft: Add OpteeClientPkg dec Chris Co
2018-10-31 20:43 ` Leif Lindholm
2018-11-01 10:55 ` Sumit Garg
2018-11-02 0:41 ` Chris Co
2018-11-02 5:24 ` Sumit Garg
2018-11-02 23:55 ` Chris Co
2018-11-05 10:07 ` Sumit Garg
2018-11-06 1:53 ` Chris Co
2018-11-06 11:09 ` Sumit Garg
2018-09-21 8:25 ` [PATCH edk2-platforms 02/27] Platform/Microsoft: Add SdMmc Dxe Driver Chris Co
2018-09-21 8:25 ` [PATCH edk2-platforms 04/27] Silicon/NXP: Add iMXPlatformPkg dec Chris Co
2018-09-21 8:25 ` [PATCH edk2-platforms 03/27] Platform/Microsoft: Add MsPkg Chris Co
2018-10-31 21:00 ` Leif Lindholm
2018-09-21 8:25 ` [PATCH edk2-platforms 05/27] Silicon/NXP: Add UART library support for i.MX platforms Chris Co
2018-11-01 8:59 ` Leif Lindholm
2018-11-02 1:46 ` Chris Co
2018-09-21 8:25 ` [PATCH edk2-platforms 06/27] Silicon/NXP: Add I2C " Chris Co
2018-11-01 17:53 ` Leif Lindholm
2018-09-21 8:25 ` [PATCH edk2-platforms 07/27] Silicon/NXP: Add i.MX display library support Chris Co
2018-11-01 18:05 ` Leif Lindholm
2018-11-29 0:55 ` Chris Co
2018-09-21 8:25 ` [PATCH edk2-platforms 08/27] Silicon/NXP: Add Virtual RTC support for i.MX platform Chris Co
2018-12-15 13:26 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 09/27] Silicon/NXP: Add headers for SoC-specific i.MX packages to use Chris Co
2018-11-01 18:20 ` Leif Lindholm
2018-12-01 0:22 ` Chris Co
2018-12-03 9:42 ` Leif Lindholm
2018-12-04 1:44 ` Chris Co
2018-12-04 9:33 ` Ard Biesheuvel
2018-12-04 12:22 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 10/27] Silicon/NXP: Add iMX6Pkg dec Chris Co
2018-11-01 18:25 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 11/27] Silicon/NXP: Add i.MX6 SoC header files Chris Co
2018-12-13 17:11 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 12/27] Silicon/NXP: Add i.MX6 I/O MUX library Chris Co
2018-11-08 18:00 ` Leif Lindholm
2018-12-04 1:41 ` Chris Co
2018-09-21 8:26 ` [PATCH edk2-platforms 13/27] Silicon/NXP: Add support for iMX SDHC Chris Co
2018-12-05 10:31 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 14/27] Silicon/NXP: Add i.MX6 GPT and EPIT timer headers Chris Co
2018-11-08 18:14 ` Leif Lindholm
2018-12-04 2:06 ` Chris Co
2018-12-04 12:58 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 15/27] Silicon/NXP: Add i.MX6 GPT Timer library Chris Co
2018-12-13 17:26 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 16/27] Silicon/NXP: Add i.MX6 Timer DXE driver Chris Co
2018-12-13 17:33 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 17/27] Silicon/NXP: Add i.MX6 USB Phy Library Chris Co
2018-12-14 17:10 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 18/27] Silicon/NXP: Add i.MX6 Clock Library Chris Co
2018-12-14 18:12 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 19/27] Silicon/NXP: Add i.MX6 ACPI tables Chris Co
2018-12-14 19:53 ` Leif Lindholm
2018-12-17 11:14 ` Ard Biesheuvel
2019-01-08 21:43 ` Chris Co
2019-01-29 14:09 ` Ard Biesheuvel
2018-09-21 8:26 ` [PATCH edk2-platforms 20/27] Silicon/NXP: Add i.MX6 Board init library Chris Co
2018-12-14 20:12 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 21/27] Silicon/NXP: Add i.MX6 PCIe DXE driver Chris Co
2018-12-14 21:59 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 23/27] Silicon/NXP: Add i.MX6 Smbios Driver Chris Co
2018-12-14 23:07 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 22/27] Silicon/NXP: Add i.MX6 GOP driver Chris Co
2018-12-14 22:37 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 24/27] Silicon/NXP: Add i.MX6 common dsc and fdf files Chris Co
2018-12-14 23:36 ` Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 25/27] Platform/Solidrun: Add Hummingboard Peripheral Initialization Chris Co
2018-12-15 12:12 ` Leif Lindholm
2018-09-21 8:26 ` Chris Co [this message]
2018-12-15 12:19 ` [PATCH edk2-platforms 26/27] Platform/SolidRun: Add i.MX 6Quad Hummingboard Edge ACPI tables Leif Lindholm
2018-09-21 8:26 ` [PATCH edk2-platforms 27/27] Platform/Solidrun: Add i.MX 6Quad Hummingboard Edge dsc and fdf files Chris Co
2018-12-15 12:28 ` Leif Lindholm
2018-12-15 13:32 ` [PATCH edk2-platforms 00/27] Import Hummingboard Edge platform for Windows IoT Core Leif Lindholm
2018-12-19 18:28 ` Chris Co
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