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From: Eric Dong <eric.dong@intel.com>
To: edk2-devel@lists.01.org
Cc: Michael D Kinney <michael.d.kinney@intel.com>,
	Ruiyu Ni <ruiyu.ni@intel.com>, Laszlo Ersek <lersek@redhat.com>
Subject: [Patch v3 13/14] UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h: Add new MSR name and keep old one.
Date: Tue, 25 Sep 2018 10:08:52 +0800	[thread overview]
Message-ID: <20180925020853.25804-14-eric.dong@intel.com> (raw)
In-Reply-To: <20180925020853.25804-1-eric.dong@intel.com>

Changes includes:
  1. Change MSR name:
    1. MSR_GOLDMONT_SGXOWNER0 => MSR_GOLDMONT_SGXOWNEREPOCH0
    2. MSR_GOLDMONT_SGXOWNER1 => MSR_GOLDMONT_SGXOWNEREPOCH1
  2. Keep old MSR definition (MSR_GOLDMONT_SGXOWNER0/1) for compatibility.
    1. Define old MSR like below style:
           #define MSR_GOLDMONT_SGXOWNER0   MSR_GOLDMONT_SGXOWNEREPOCH0

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
---
 UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h | 34 +++++++++++++++++++--------
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h b/UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h
index a9061133c9..383f31ee55 100644
--- a/UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h
+++ b/UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h
@@ -843,10 +843,12 @@ typedef union {
 
 
 /**
-  Package. Lower 64 Bit OwnerEpoch Component of SGX Key (RO). Low 64 bits of
-  an 128-bit external entropy value for key derivation of an enclave.
+  Package. Lower 64 Bit CR_SGXOWNEREPOCH (W) Writes do not update
+  CR_SGXOWNEREPOCH if CPUID.(EAX=12H, ECX=0):EAX.SGX1 is 1 on any thread in
+  the package. Lower 64 bits of an 128-bit external entropy value for key
+  derivation of an enclave.
 
-  @param  ECX  MSR_GOLDMONT_SGXOWNER0 (0x00000300)
+  @param  ECX  MSR_GOLDMONT_SGXOWNEREPOCH0 (0x00000300)
   @param  EAX  Lower 32-bits of MSR value.
   @param  EDX  Upper 32-bits of MSR value.
 
@@ -854,18 +856,24 @@ typedef union {
   @code
   UINT64  Msr;
 
-  Msr = AsmReadMsr64 (MSR_GOLDMONT_SGXOWNER0);
+  Msr = AsmReadMsr64 (MSR_GOLDMONT_SGXOWNEREPOCH0);
   @endcode
-  @note MSR_GOLDMONT_SGXOWNER0 is defined as MSR_SGXOWNER0 in SDM.
+  @note MSR_GOLDMONT_SGXOWNEREPOCH0 is defined as MSR_SGXOWNEREPOCH0 in SDM.
 **/
-#define MSR_GOLDMONT_SGXOWNER0                   0x00000300
+#define MSR_GOLDMONT_SGXOWNEREPOCH0                   0x00000300
+
+
+//
+// Define MSR_GOLDMONT_SGXOWNER0 for compatibility due to name change in the SDM.
+//
+#define MSR_GOLDMONT_SGXOWNER0                        MSR_GOLDMONT_SGXOWNEREPOCH0
 
 
 /**
   Package. Upper 64 Bit OwnerEpoch Component of SGX Key (RO). Upper 64 bits of
   an 128-bit external entropy value for key derivation of an enclave.
 
-  @param  ECX  MSR_GOLDMONT_SGXOWNER1 (0x00000301)
+  @param  ECX  MSR_GOLDMONT_SGXOWNEREPOCH1 (0x00000301)
   @param  EAX  Lower 32-bits of MSR value.
   @param  EDX  Upper 32-bits of MSR value.
 
@@ -873,11 +881,17 @@ typedef union {
   @code
   UINT64  Msr;
 
-  Msr = AsmReadMsr64 (MSR_GOLDMONT_SGXOWNER1);
+  Msr = AsmReadMsr64 (MSR_GOLDMONT_SGXOWNEREPOCH1);
   @endcode
-  @note MSR_GOLDMONT_SGXOWNER1 is defined as MSR_SGXOWNER1 in SDM.
+  @note MSR_GOLDMONT_SGXOWNEREPOCH1 is defined as MSR_SGXOWNEREPOCH1 in SDM.
 **/
-#define MSR_GOLDMONT_SGXOWNER1                   0x00000301
+#define MSR_GOLDMONT_SGXOWNEREPOCH1                   0x00000301
+
+
+//
+// Define MSR_GOLDMONT_SGXOWNER1 for compatibility due to name change in the SDM.
+//
+#define MSR_GOLDMONT_SGXOWNER1                        MSR_GOLDMONT_SGXOWNEREPOCH1
 
 
 /**
-- 
2.15.0.windows.1



  parent reply	other threads:[~2018-09-25  2:13 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-25  2:08 [Patch v3 00/14] Update MSR definitions Eric Dong
2018-09-25  2:08 ` [Patch v3 01/14] UefiCpuPkg/Include/Register/Msr: Update reference spec info Eric Dong
2018-09-25  2:08 ` [Patch v3 02/14] UefiCpuPkg/Include/Register/Msr/GoldmontPlusMsr.h: Add new MSR file for goldmont plus microarchitecture Eric Dong
2018-09-25  2:08 ` [Patch v3 03/14] UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h: Add new MSR Eric Dong
2018-09-25  2:08 ` [Patch v3 04/14] UefiCpuPkg/Include/Register/Msr/*.h: " Eric Dong
2018-09-25  2:08 ` [Patch v3 05/14] UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: " Eric Dong
2018-09-25  2:08 ` [Patch v3 06/14] UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSRs Eric Dong
2018-09-25  2:08 ` [Patch v3 07/14] UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Add new MSR Eric Dong
2018-09-25  2:08 ` [Patch v3 08/14] UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Change structure definition Eric Dong
2018-09-25  2:08 ` [Patch v3 09/14] UefiCpuPkg/Include/Register/Msr/Core2Msr.h: Remove old MSR Eric Dong
2018-09-25  2:08 ` [Patch v3 10/14] UefiCpuPkg/Include/Register/Msr/P6Msr.h: " Eric Dong
2018-09-25  2:08 ` [Patch v3 11/14] UefiCpuPkg/Include/Register/Msr/CoreMsr.h: " Eric Dong
2018-09-25  2:08 ` [Patch v3 12/14] UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSR name and keep old one Eric Dong
2018-09-25  2:08 ` Eric Dong [this message]
2018-09-25  2:08 ` [Patch v3 14/14] UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: Change structure definition Eric Dong
2018-09-25 10:05 ` [Patch v3 00/14] Update MSR definitions Laszlo Ersek
2018-09-26  5:02 ` Ni, Ruiyu

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