From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.20; helo=mga02.intel.com; envelope-from=eric.dong@intel.com; receiver=edk2-devel@lists.01.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 652762112FAC0 for ; Mon, 24 Sep 2018 19:13:49 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Sep 2018 19:13:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,300,1534834800"; d="scan'208";a="93410466" Received: from ydong10-win10.ccr.corp.intel.com ([10.239.9.125]) by orsmga001.jf.intel.com with ESMTP; 24 Sep 2018 19:09:06 -0700 From: Eric Dong To: edk2-devel@lists.01.org Cc: Michael D Kinney , Ruiyu Ni , Laszlo Ersek Date: Tue, 25 Sep 2018 10:08:47 +0800 Message-Id: <20180925020853.25804-9-eric.dong@intel.com> X-Mailer: git-send-email 2.15.0.windows.1 In-Reply-To: <20180925020853.25804-1-eric.dong@intel.com> References: <20180925020853.25804-1-eric.dong@intel.com> Subject: [Patch v3 08/14] UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Change structure definition. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 25 Sep 2018 02:13:49 -0000 V3 changes include: 1. Keep ReservedX not change if bit info not changed for this field. V2 changes include: 1. Use X in ReservedX fields from totally new value if MSR structure definition changed. For example, if in current structure, the max reserved variable is Reserved2, in new definition, reserved variable is begin with Reserved3. V1 Changes includes: 1. Change fields which is reserved in old version: MSR_IA32_RTIT_CTL_REGISTER Cc: Michael D Kinney Cc: Ruiyu Ni Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong --- UefiCpuPkg/Include/Register/ArchitecturalMsr.h | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h index b467ffaf26..22d64e995b 100644 --- a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h +++ b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h @@ -4647,7 +4647,14 @@ typedef union { /// [Bit 3] User. /// UINT32 User:1; - UINT32 Reserved1:2; + /// + /// [Bit 4] PwrEvtEn. + /// + UINT32 PwrEvtEn:1; + /// + /// [Bit 5] FUPonPTW. + /// + UINT32 FUPonPTW:1; /// /// [Bit 6] FabricEn. If (CPUID.(EAX=07H, ECX=0):ECX[3] = 1). /// @@ -4672,7 +4679,10 @@ typedef union { /// [Bit 11] DisRETC. /// UINT32 DisRETC:1; - UINT32 Reserved2:1; + /// + /// [Bit 12] PTWEn. + /// + UINT32 PTWEn:1; /// /// [Bit 13] BranchEn. /// -- 2.15.0.windows.1