From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.151; helo=mga17.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 56D2E21A09130 for ; Mon, 24 Sep 2018 23:22:21 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Sep 2018 23:22:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,301,1534834800"; d="scan'208";a="91651465" Received: from ray-dev.ccr.corp.intel.com ([10.239.9.8]) by fmsmga004.fm.intel.com with ESMTP; 24 Sep 2018 23:20:24 -0700 From: Ruiyu Ni To: edk2-devel@lists.01.org Cc: Star Zeng Date: Tue, 25 Sep 2018 14:21:16 +0800 Message-Id: <20180925062117.34772-4-ruiyu.ni@intel.com> X-Mailer: git-send-email 2.16.1.windows.1 In-Reply-To: <20180925062117.34772-1-ruiyu.ni@intel.com> References: <20180925062117.34772-1-ruiyu.ni@intel.com> Subject: [PATCH v2 3/4] MdeModulePkg/PciHostBridge: Add RESOURCE_VALID() to simplify code X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 25 Sep 2018 06:22:21 -0000 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni Cc: Star Zeng Reviewed-by: Laszlo Ersek Reviewed-by: Garrett Kirkendall --- .../Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 26 ++++++++++------------ 1 file changed, 12 insertions(+), 14 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c index 87385aa172..16413b60a6 100644 --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c @@ -21,6 +21,8 @@ extern EDKII_IOMMU_PROTOCOL *mIoMmuProtocol; #define NO_MAPPING (VOID *) (UINTN) -1 +#define RESOURCE_VALID(Resource) ((Resource)->Base <= (Resource)->Limit) + // // Lookup table for increment values based on transfer widths // @@ -122,25 +124,25 @@ CreateRootBridge ( // // Make sure Mem and MemAbove4G apertures are valid // - if (Bridge->Mem.Base <= Bridge->Mem.Limit) { + if (RESOURCE_VALID (&Bridge->Mem)) { ASSERT (Bridge->Mem.Limit < SIZE_4GB); if (Bridge->Mem.Limit >= SIZE_4GB) { return NULL; } } - if (Bridge->MemAbove4G.Base <= Bridge->MemAbove4G.Limit) { + if (RESOURCE_VALID (&Bridge->MemAbove4G)) { ASSERT (Bridge->MemAbove4G.Base >= SIZE_4GB); if (Bridge->MemAbove4G.Base < SIZE_4GB) { return NULL; } } - if (Bridge->PMem.Base <= Bridge->PMem.Limit) { + if (RESOURCE_VALID (&Bridge->PMem)) { ASSERT (Bridge->PMem.Limit < SIZE_4GB); if (Bridge->PMem.Limit >= SIZE_4GB) { return NULL; } } - if (Bridge->PMemAbove4G.Base <= Bridge->PMemAbove4G.Limit) { + if (RESOURCE_VALID (&Bridge->PMemAbove4G)) { ASSERT (Bridge->PMemAbove4G.Base >= SIZE_4GB); if (Bridge->PMemAbove4G.Base < SIZE_4GB) { return NULL; @@ -157,11 +159,9 @@ CreateRootBridge ( // support separate windows for Non-prefetchable and Prefetchable // memory. // - ASSERT (Bridge->PMem.Base > Bridge->PMem.Limit); - ASSERT (Bridge->PMemAbove4G.Base > Bridge->PMemAbove4G.Limit); - if ((Bridge->PMem.Base <= Bridge->PMem.Limit) || - (Bridge->PMemAbove4G.Base <= Bridge->PMemAbove4G.Limit) - ) { + ASSERT (!RESOURCE_VALID (&Bridge->PMem)); + ASSERT (!RESOURCE_VALID (&Bridge->PMemAbove4G)); + if (RESOURCE_VALID (&Bridge->PMem) || RESOURCE_VALID (&Bridge->PMemAbove4G)) { return NULL; } } @@ -171,11 +171,9 @@ CreateRootBridge ( // If this bit is not set, then the PCI Root Bridge does not support // 64 bit memory windows. // - ASSERT (Bridge->MemAbove4G.Base > Bridge->MemAbove4G.Limit); - ASSERT (Bridge->PMemAbove4G.Base > Bridge->PMemAbove4G.Limit); - if ((Bridge->MemAbove4G.Base <= Bridge->MemAbove4G.Limit) || - (Bridge->PMemAbove4G.Base <= Bridge->PMemAbove4G.Limit) - ) { + ASSERT (!RESOURCE_VALID (&Bridge->MemAbove4G)); + ASSERT (!RESOURCE_VALID (&Bridge->PMemAbove4G)); + if (RESOURCE_VALID (&Bridge->MemAbove4G) || RESOURCE_VALID (&Bridge->PMemAbove4G)) { return NULL; } } -- 2.16.1.windows.1