From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 26B4B2115BE3D for ; Sat, 29 Sep 2018 15:23:27 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A8FFB308338E; Sat, 29 Sep 2018 22:23:26 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-26.ams2.redhat.com [10.36.116.26]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7906F3091373; Sat, 29 Sep 2018 22:23:24 +0000 (UTC) From: Laszlo Ersek To: edk2-devel-01 Cc: Liming Gao , Michael D Kinney Date: Sun, 30 Sep 2018 00:23:11 +0200 Message-Id: <20180929222312.32150-5-lersek@redhat.com> In-Reply-To: <20180929222312.32150-1-lersek@redhat.com> References: <20180929222312.32150-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.26 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Sat, 29 Sep 2018 22:23:26 +0000 (UTC) Subject: [PATCH 4/5] MdePkg/BaseSynchronizationLib GCC: fix X64 InternalSyncCompareExchange64() X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 29 Sep 2018 22:23:27 -0000 (This patch is identical to the X64 half of the last one, except for the InternalSyncCompareExchange32() -> InternalSyncCompareExchange64() and "cmpxchgl" -> "cmpxchgq" replacements.) The CMPXCHG instruction has the following operands: - AX (implicit, CompareValue): input and output - destination operand (*Value): input and output - source operand (ExchangeValue): input The X64 version of InternalSyncCompareExchange64() attempts to mark both CompareValue and (*Value) as input/output, but it doesn't use the appropriate constraints for either operand. Fix these issues. Furthermore, prefer the short "+" constraint for I/O operands over the constraint that can be applied to the input instances of I/O operands. Cc: Liming Gao Cc: Michael D Kinney Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1208 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek --- MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c b/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c index a85cf0265c8b..edb904c00704 100644 --- a/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c +++ b/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c @@ -194,12 +194,10 @@ InternalSyncCompareExchange64 ( { __asm__ __volatile__ ( "lock \n\t" - "cmpxchgq %3, %1 \n\t" - : "=a" (CompareValue), // %0 - "=m" (*Value) // %1 - : "a" (CompareValue), // %2 - "r" (ExchangeValue), // %3 - "m" (*Value) // %4 + "cmpxchgq %2, %1 \n\t" + : "+a" (CompareValue), // %0 + "+m" (*Value) // %1 + : "r" (ExchangeValue) // %2 : "memory", "cc" ); -- 2.14.1.3.gb7cf6e02401b