[PATCH v1 2/6] PcAtChipsetPkg: Add MMIO Support to RTC driver

[Sami Mujawar <sami.mujawar@arm.com>]

Some virtual machine managers like kvmtool emulate the MC146818
RTC controller in the MMIO space so that architectures that do
not support I/O Mapped I/O can use the RTC. This patch adds MMIO
support to the RTC controller driver.

The PCD PcdRtcUseMmio has been added to select I/O or MMIO support.
  If PcdRtcUseMmio is:
    TRUE  - Indicates the RTC port registers are in MMIO space.
    FALSE - Indicates the RTC port registers are in I/O space.
            Default is I/O space.

When MMIO support is selected (PcdRtcUseMmio == TRUE) the driver
maps the MMIO region used by the RTC as runtime memory so that the
RTC registers are accessible post ExitBootServices.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
The changes can be seen at https://github.com/samimujawar/edk2/commit/d9fa7df2204c12883a795c7df429578c310725bf

Notes:
    v1:
    - Add support to read/write from RTC registers using MMIO access  [SAMI]

 PcAtChipsetPkg/PcAtChipsetPkg.dec                                          |   8 ++
 PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c                         |  38 ++++++-
 PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c                    | 112 +++++++++++++++++++-
 PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf |   8 ++
 4 files changed, 162 insertions(+), 4 deletions(-)

diff --git a/PcAtChipsetPkg/PcAtChipsetPkg.dec b/PcAtChipsetPkg/PcAtChipsetPkg.dec
index 0e66ff0ba3770cf765cfe36d592151d72eaa238a..5aaf5e73811c4dba3b83768f1535e028938ead1f 100644
--- a/PcAtChipsetPkg/PcAtChipsetPkg.dec
+++ b/PcAtChipsetPkg/PcAtChipsetPkg.dec
@@ -6,6 +6,7 @@
 #
 # Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
 # Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
+# Copyright (c) 2018, ARM Limited. All rights reserved.<BR>
 #
 # This program and the accompanying materials
 # are licensed and made available under the terms and conditions of the BSD License
@@ -202,5 +203,12 @@ [PcdsFixedAtBuild, PcdsPatchableInModule]
   # @Prompt RTC Target Register address
   gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|0x71|UINT8|0x0000001F
 
+  ## Indicates the RTC port registers are in MMIO space, or in I/O space.
+  #  Default is I/O space.<BR><BR>
+  #   TRUE  - RTC port registers are in MMIO space.<BR>
+  #   FALSE - RTC port registers are in I/O space.<BR>
+  # @Prompt RTC port registers use MMIO.
+  gPcAtChipsetPkgTokenSpaceGuid.PcdRtcUseMmio|FALSE|BOOLEAN|0x00000020
+
 [UserExtensions.TianoCore."ExtraFiles"]
   PcAtChipsetPkgExtra.uni
diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
index 7965eb8aa55b92caef7a63834695506123935e2d..ee746add57b9778bf09a4d9eb6881d06caa14aba 100644
--- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
+++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
@@ -3,6 +3,7 @@
 
 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
 Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
+Copyright (c) 2018, ARM Limited. All rights reserved.<BR>
 
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD License
@@ -16,6 +17,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 
 #include "PcRtc.h"
 
+extern EFI_PHYSICAL_ADDRESS   mRtcRegisterBase;
+
 //
 // Days of month.
 //
@@ -72,7 +75,21 @@ RtcRead (
   IN  UINT8 Address
   )
 {
-  IoWrite8 (PcdGet8 (PcdRtcIndexRegister), (UINT8) (Address | (UINT8) (IoRead8 (PcdGet8 (PcdRtcIndexRegister)) & 0x80)));
+  if (FixedPcdGetBool (PcdRtcUseMmio)) {
+    MmioWrite8 (
+      mRtcRegisterBase,
+      (UINT8)(Address | (UINT8)(MmioRead8 (mRtcRegisterBase) & 0x80))
+      );
+    return MmioRead8 (
+             mRtcRegisterBase + (PcdGet8 (PcdRtcTargetRegister) -
+               PcdGet8 (PcdRtcIndexRegister))
+             );
+  }
+
+  IoWrite8 (
+    PcdGet8 (PcdRtcIndexRegister),
+    (UINT8)(Address | (UINT8)(IoRead8 (PcdGet8 (PcdRtcIndexRegister)) & 0x80))
+    );
   return IoRead8 (PcdGet8 (PcdRtcTargetRegister));
 }
 
@@ -90,8 +107,23 @@ RtcWrite (
   IN  UINT8   Data
   )
 {
-  IoWrite8 (PcdGet8 (PcdRtcIndexRegister), (UINT8) (Address | (UINT8) (IoRead8 (PcdGet8 (PcdRtcIndexRegister)) & 0x80)));
-  IoWrite8 (PcdGet8 (PcdRtcTargetRegister), Data);
+  if (FixedPcdGetBool (PcdRtcUseMmio)) {
+    MmioWrite8 (
+      mRtcRegisterBase,
+      (UINT8)(Address | (UINT8)(MmioRead8 (mRtcRegisterBase) & 0x80))
+      );
+    MmioWrite8 (
+      mRtcRegisterBase + (PcdGet8 (PcdRtcTargetRegister) -
+        PcdGet8 (PcdRtcIndexRegister)),
+      Data
+      );
+  } else {
+    IoWrite8 (
+      PcdGet8 (PcdRtcIndexRegister),
+      (UINT8)(Address | (UINT8)(IoRead8 (PcdGet8 (PcdRtcIndexRegister)) & 0x80))
+      );
+    IoWrite8 (PcdGet8 (PcdRtcTargetRegister), Data);
+  }
 }
 
 /**
diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c
index 56ddc3ed5b1accc2b1a99ab4515f851f89fb6e43..d6d7251309001a203282eb7022cc71ac4f0ef62e 100644
--- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c
+++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c
@@ -2,6 +2,7 @@
   Provides Set/Get time operations.
 
 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2018, ARM Limited. All rights reserved.<BR>
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD License
 which accompanies this distribution.  The full text of the license may be found at
@@ -12,12 +13,17 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 
 **/
 
+#include <Library/DxeServicesTableLib.h>
 #include "PcRtc.h"
 
 PC_RTC_MODULE_GLOBALS  mModuleGlobal;
 
 EFI_HANDLE             mHandle = NULL;
 
+STATIC EFI_EVENT       mVirtualAddrChangeEvent;
+
+EFI_PHYSICAL_ADDRESS   mRtcRegisterBase;
+
 /**
   Returns the current time and date information, and the time-keeping capabilities
   of the hardware platform.
@@ -112,6 +118,29 @@ PcRtcEfiSetWakeupTime (
 }
 
 /**
+  Fixup internal data so that EFI can be called in virtual mode.
+  Call the passed in Child Notify event and convert any pointers in
+  lib to virtual mode.
+
+  @param[in]    Event   The Event that is being processed
+  @param[in]    Context Event Context
+**/
+VOID
+EFIAPI
+LibRtcVirtualNotifyEvent (
+  IN EFI_EVENT        Event,
+  IN VOID             *Context
+  )
+{
+  // Only needed if you are going to support the OS calling RTC functions in
+  // virtual mode. You will need to call EfiConvertPointer (). To convert any
+  // stored physical addresses to virtual address. After the OS transitions to
+  // calling in virtual mode, all future runtime calls will be made in virtual
+  // mode.
+  EfiConvertPointer (0x0, (VOID**)&mRtcRegisterBase);
+}
+
+/**
   The user Entry Point for PcRTC module.
 
   This is the entrhy point for PcRTC module. It installs the UEFI runtime service
@@ -133,10 +162,75 @@ InitializePcRtc (
 {
   EFI_STATUS  Status;
   EFI_EVENT   Event;
+  EFI_PHYSICAL_ADDRESS   RtcPageBase;
 
   EfiInitializeLock (&mModuleGlobal.RtcLock, TPL_CALLBACK);
   mModuleGlobal.CenturyRtcAddress = GetCenturyRtcAddress ();
 
+  if (FixedPcdGetBool (PcdRtcUseMmio)) {
+    mRtcRegisterBase = PcdGet8 (PcdRtcIndexRegister);
+    RtcPageBase = mRtcRegisterBase & ~(EFI_PAGE_SIZE - 1);
+
+    // Declare the controller as EFI_MEMORY_RUNTIME
+    Status = gDS->AddMemorySpace (
+                    EfiGcdMemoryTypeMemoryMappedIo,
+                    RtcPageBase,
+                    EFI_PAGE_SIZE,
+                    EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
+                    );
+    if (EFI_ERROR (Status)) {
+      DEBUG ((
+        DEBUG_ERROR, "Failed to add memory space. Status = %r\n",
+        Status
+        ));
+      return Status;
+    }
+
+    Status = gDS->AllocateMemorySpace (
+                    EfiGcdAllocateAddress,
+                    EfiGcdMemoryTypeMemoryMappedIo,
+                    0,
+                    EFI_PAGE_SIZE,
+                    &RtcPageBase,
+                    ImageHandle,
+                    NULL
+                    );
+    if (EFI_ERROR (Status)) {
+      DEBUG ((
+        DEBUG_ERROR,
+        "Failed to allocate memory space. Status = %r\n",
+        Status
+        ));
+      gDS->RemoveMemorySpace (
+             RtcPageBase,
+             EFI_PAGE_SIZE
+             );
+      return Status;
+    }
+
+    Status = gDS->SetMemorySpaceAttributes (
+                    RtcPageBase,
+                    EFI_PAGE_SIZE,
+                    EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
+                    );
+    if (EFI_ERROR (Status)) {
+      DEBUG ((
+        DEBUG_ERROR,
+        "Failed to set memory attributes. Status = %r\n",
+        Status
+        ));
+      gDS->FreeMemorySpace (
+               RtcPageBase,
+               EFI_PAGE_SIZE
+               );
+      gDS->RemoveMemorySpace (
+             RtcPageBase,
+             EFI_PAGE_SIZE
+             );
+      return Status;
+    }
+  }
+
   Status = PcRtcInit (&mModuleGlobal);
   ASSERT_EFI_ERROR (Status);
 
@@ -171,7 +265,23 @@ InitializePcRtc (
                   NULL,
                   NULL
                   );
-  ASSERT_EFI_ERROR (Status);
+  if (EFI_ERROR (Status)) {
+    ASSERT_EFI_ERROR (Status);
+    return Status;
+  }
+
+  if (FixedPcdGetBool (PcdRtcUseMmio)) {
+    // Register for the virtual address change event
+    Status = gBS->CreateEventEx (
+                    EVT_NOTIFY_SIGNAL,
+                    TPL_NOTIFY,
+                    LibRtcVirtualNotifyEvent,
+                    NULL,
+                    &gEfiEventVirtualAddressChangeGuid,
+                    &mVirtualAddrChangeEvent
+                    );
+    ASSERT_EFI_ERROR (Status);
+  }
 
   return Status;
 }
diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
index 876298e1e0f3745cd3213509ffed4e091fbedef8..2dee5a77cfc23878a64a809bcb64e3745230ea5a 100644
--- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
+++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
@@ -6,6 +6,7 @@
 #
 # Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
 # Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
+# Copyright (c) 2018, ARM Limited. All rights reserved.<BR>
 #
 # This program and the accompanying materials
 # are licensed and made available under the terms and conditions of the BSD License
@@ -55,6 +56,7 @@ [LibraryClasses]
   BaseLib
   PcdLib
   ReportStatusCodeLib
+  DxeServicesTableLib
 
 [Protocols]
   gEfiRealTimeClockArchProtocolGuid             ## PRODUCES
@@ -68,10 +70,13 @@ [Guids]
   ## SOMETIMES_CONSUMES ## SystemTable
   gEfiAcpiTableGuid
 
+  gEfiEventVirtualAddressChangeGuid
+
 [FixedPcd]
   gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterA     ## CONSUMES
   gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterB     ## CONSUMES
   gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD     ## CONSUMES
+  gPcAtChipsetPkgTokenSpaceGuid.PcdRtcUseMmio                   ## CONSUMES
 
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout  ## CONSUMES
@@ -83,5 +88,8 @@ [Pcd]
 [Depex]
   gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid
 
+[Depex.common.DXE_RUNTIME_DRIVER]
+  gEfiCpuArchProtocolGuid
+
 [UserExtensions.TianoCore."ExtraFiles"]
   PcRtcExtra.uni
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'