From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.120; helo=mga04.intel.com; envelope-from=jian.j.wang@intel.com; receiver=edk2-devel@lists.01.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 30B04211799F7 for ; Wed, 17 Oct 2018 01:35:16 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Oct 2018 01:35:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,391,1534834800"; d="scan'208";a="99926650" Received: from shwdeopenpsi777.ccr.corp.intel.com ([10.239.158.27]) by fmsmga001.fm.intel.com with ESMTP; 17 Oct 2018 01:35:15 -0700 From: Jian J Wang To: edk2-devel@lists.01.org Cc: Eric Dong , Laszlo Ersek , Ruiyu Ni Date: Wed, 17 Oct 2018 16:34:48 +0800 Message-Id: <20181017083448.3436-1-jian.j.wang@intel.com> X-Mailer: git-send-email 2.16.2.windows.1 Subject: [PATCH] UefiCpuPkg/CpuExceptionHandlerLib: always clear descriptor data in advance X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Oct 2018 08:35:17 -0000 REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1237 Sometimes the memory will be contaminated by random data left in last boot (warm reset). The code should not assume the allocated memory is always filled with zero. This patch add code to clear data structure used for stack switch to prevent such problem from happening. Cc: Eric Dong Cc: Laszlo Ersek Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang --- UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c | 3 +++ UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c index 031d0d35fa..eebd27a25d 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c @@ -214,6 +214,7 @@ ArchSetupExcpetionStack ( // TssBase = (UINTN)Tss; + TssDesc->Uint64 = 0; TssDesc->Bits.LimitLow = sizeof(IA32_TASK_STATE_SEGMENT) - 1; TssDesc->Bits.BaseLow = (UINT16)TssBase; TssDesc->Bits.BaseMid = (UINT8)(TssBase >> 16); @@ -238,6 +239,7 @@ ArchSetupExcpetionStack ( // TssBase = (UINTN)Tss; + TssDesc->Uint64 = 0; TssDesc->Bits.LimitLow = sizeof(IA32_TASK_STATE_SEGMENT) - 1; TssDesc->Bits.BaseLow = (UINT16)TssBase; TssDesc->Bits.BaseMid = (UINT8)(TssBase >> 16); @@ -255,6 +257,7 @@ ArchSetupExcpetionStack ( continue; } + SetMem (Tss, sizeof (IA32_TASK_STATE_SEGMENT), 0); Tss->EIP = (UINT32)(TemplateMap.ExceptionStart + Vector * TemplateMap.ExceptionStubHeaderSize); Tss->EFLAGS = 0x2; diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c index 93ecf5ae5a..6745bc77c0 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c @@ -219,6 +219,8 @@ ArchSetupExcpetionStack ( // TssBase = (UINTN)Tss; + TssDesc->Uint128.Uint64 = 0; + TssDesc->Uint128.Uint64_1= 0; TssDesc->Bits.LimitLow = sizeof(IA32_TASK_STATE_SEGMENT) - 1; TssDesc->Bits.BaseLow = (UINT16)TssBase; TssDesc->Bits.BaseMidl = (UINT8)(TssBase >> 16); @@ -231,6 +233,7 @@ ArchSetupExcpetionStack ( // // Fixup exception task descriptor and task-state segment // + SetMem (Tss, sizeof (IA32_TASK_STATE_SEGMENT), 0); StackTop = StackSwitchData->X64.KnownGoodStackTop - CPU_STACK_ALIGNMENT; StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT); IdtTable = StackSwitchData->X64.IdtTable; -- 2.16.2.windows.1