From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.120; helo=mga04.intel.com; envelope-from=hao.a.wu@intel.com; receiver=edk2-devel@lists.01.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 35A072117A2B0 for ; Wed, 17 Oct 2018 23:42:07 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Oct 2018 23:42:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,395,1534834800"; d="scan'208";a="82135297" Received: from shwdeopenpsi014.ccr.corp.intel.com ([10.239.9.9]) by orsmga007.jf.intel.com with ESMTP; 17 Oct 2018 23:42:05 -0700 From: Hao Wu To: edk2-devel@lists.01.org Cc: Hao Wu , Jiewen Yao , Ruiyu Ni , Star Zeng Date: Thu, 18 Oct 2018 14:42:00 +0800 Message-Id: <20181018064200.2068-4-hao.a.wu@intel.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20181018064200.2068-1-hao.a.wu@intel.com> References: <20181018064200.2068-1-hao.a.wu@intel.com> Subject: [PATCH v1 3/3] MdeModulePkg/NvmExpressDxe: Refine PassThru IO queue creation behavior X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Oct 2018 06:42:07 -0000 REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1260 For the PassThru() service of NVM Express Pass Through Protocol, the current implementation (function NvmExpressPassThru()) will only use the IO Completion/Submission queues created internally by this driver during the controller initialization process. Any other IO queues created will not be consumed. So the value is little to accept external IO Completion/Submission queue creation request. This commit will refine the behavior of function NvmExpressPassThru(), it will only accept driver internal IO queue creation commands and will return "EFI_UNSUPPORTED" for external ones. Cc: Jiewen Yao Cc: Ruiyu Ni Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu --- MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c | 42 ++++++++++++++++---- 1 file changed, 34 insertions(+), 8 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c index c52e960771..0c550bd52c 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c @@ -476,6 +476,7 @@ NvmExpressPassThru ( UINT32 Data; NVME_PASS_THRU_ASYNC_REQ *AsyncRequest; EFI_TPL OldTpl; + UINT32 CrIoQid; // // check the data fields in Packet parameter. @@ -587,14 +588,39 @@ NvmExpressPassThru ( } Sq->Prp[0] = (UINT64)(UINTN)Packet->TransferBuffer; - // - // If the NVMe cmd has data in or out, then mapping the user buffer to the PCI controller specific addresses. - // Note here we don't handle data buffer for CreateIOSubmitionQueue and CreateIOCompletionQueue cmds because - // these two cmds are special which requires their data buffer must support simultaneous access by both the - // processor and a PCI Bus Master. It's caller's responsbility to ensure this. - // - if (((Sq->Opc & (BIT0 | BIT1)) != 0) && - !((Packet->QueueType == NVME_ADMIN_QUEUE) && ((Sq->Opc == NVME_ADMIN_CRIOCQ_CMD) || (Sq->Opc == NVME_ADMIN_CRIOSQ_CMD)))) { + if ((Packet->QueueType == NVME_ADMIN_QUEUE) && + ((Sq->Opc == NVME_ADMIN_CRIOCQ_CMD) || (Sq->Opc == NVME_ADMIN_CRIOSQ_CMD))) { + // + // Command Dword 10 should be valid for CreateIOCompletionQueue and + // CreateIOSubmissionQueue commands. + // + if (!(Packet->NvmeCmd->Flags & CDW10_VALID)) { + return EFI_INVALID_PARAMETER; + } + + // + // Bits 15:0 of Command Dword 10 is the Queue Identifier (QID) for + // CreateIOCompletionQueue and CreateIOSubmissionQueue commands. + // + CrIoQid = Packet->NvmeCmd->Cdw10 & 0xFFFF; + + // + // Currently, we only use the IO Completion/Submission queues created internally + // by this driver during controller initialization. Any other IO queues created + // will not be consumed here. The value is little to accept external IO queue + // creation requests, so here we will return EFI_UNSUPPORTED for external IO + // queue creation request. + // + if ((CrIoQid >= NVME_MAX_QUEUES) || + ((Sq->Opc == NVME_ADMIN_CRIOCQ_CMD) && (Packet->TransferBuffer != Private->CqBufferPciAddr[CrIoQid])) || + ((Sq->Opc == NVME_ADMIN_CRIOSQ_CMD) && (Packet->TransferBuffer != Private->SqBufferPciAddr[CrIoQid]))) { + DEBUG ((DEBUG_ERROR, "NvmExpressPassThru: Does not support external IO queues creation request.\n")); + return EFI_UNSUPPORTED; + } + } else if ((Sq->Opc & (BIT0 | BIT1)) != 0) { + // + // If the NVMe cmd has data in or out, then mapping the user buffer to the PCI controller specific addresses. + // if (((Packet->TransferLength != 0) && (Packet->TransferBuffer == NULL)) || ((Packet->TransferLength == 0) && (Packet->TransferBuffer != NULL))) { return EFI_INVALID_PARAMETER; -- 2.12.0.windows.1