From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.20; helo=mga02.intel.com; envelope-from=eric.dong@intel.com; receiver=edk2-devel@lists.01.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 947072117FD4F for ; Wed, 24 Oct 2018 19:26:09 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2018 19:26:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,422,1534834800"; d="scan'208";a="268574350" Received: from ydong10-win10.ccr.corp.intel.com ([10.239.9.125]) by orsmga005.jf.intel.com with ESMTP; 24 Oct 2018 19:26:08 -0700 From: Eric Dong To: edk2-devel@lists.01.org Cc: Ruiyu Ni , Laszlo Ersek , Dandan Bi Date: Thu, 25 Oct 2018 10:25:59 +0800 Message-Id: <20181025022601.25136-5-eric.dong@intel.com> X-Mailer: git-send-email 2.15.0.windows.1 In-Reply-To: <20181025022601.25136-1-eric.dong@intel.com> References: <20181025022601.25136-1-eric.dong@intel.com> Subject: [Patch 4/6] UefiCpuPkg/PiSmmCpuDxeSmm: Remove white space at line end. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 Oct 2018 02:26:09 -0000 Remove extra white space at the end of line. Cc: Ruiyu Ni Cc: Laszlo Ersek Cc: Dandan Bi Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index fec53c522f..5193fea2b3 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -346,7 +346,7 @@ ProgramProcessorRegister ( // n * P(0) n * P(1) ... n * P(n) // ASSERT ( - (ApLocation != NULL) && + (ApLocation != NULL) && (CpuStatus->ValidCoreCountPerPackage != 0) && (CpuFlags->SemaphoreCount) != NULL ); @@ -428,7 +428,7 @@ ProgramProcessorRegister ( /** Set Processor register for one AP. - + @param PreSmmRegisterTable Use pre Smm register table or register table. **/ -- 2.15.0.windows.1