From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=siyuan.fu@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A444221184ACB for ; Wed, 7 Nov 2018 00:02:02 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Nov 2018 00:02:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,474,1534834800"; d="scan'208";a="94301067" Received: from shwdeopenpsi787.ccr.corp.intel.com ([10.239.158.24]) by FMSMGA003.fm.intel.com with ESMTP; 07 Nov 2018 00:02:01 -0800 From: Fu Siyuan To: edk2-devel@lists.01.org Cc: Leif Lindholm , Ard Biesheuvel , Michael D Kinney Date: Wed, 7 Nov 2018 16:01:39 +0800 Message-Id: <20181107080140.72500-2-siyuan.fu@intel.com> X-Mailer: git-send-email 2.19.1.windows.1 In-Reply-To: <20181107080140.72500-1-siyuan.fu@intel.com> References: <20181107080140.72500-1-siyuan.fu@intel.com> MIME-Version: 1.0 Subject: [PATCH v2 1/2] Platform/Hisilicon: CRLF fixups for D05.dsc X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 Nov 2018 08:02:02 -0000 Content-Transfer-Encoding: 8bit From: Leif Lindholm Commit 1a13dfd37fe7 ("Hisilicon/D0x: Switch to generic PciHostBridge driver") introduced some incorrect line endings, fix those here. Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Michael D Kinney Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leif Lindholm --- Platform/Hisilicon/D05/D05.dsc | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 1040466633..e5fb5411d7 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -97,10 +97,10 @@ LpcLib|Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf - PlatformPciLib|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf + PlatformPciLib|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf PciHostBridgeLib|Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf PciSegmentLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf - PciPlatformLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.inf + PciPlatformLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.inf [LibraryClasses.common.SEC] ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf @@ -138,7 +138,7 @@ [PcdsFixedAtBuild.common] gArmPlatformTokenSpaceGuid.PcdCoreCount|8 - gArmTokenSpaceGuid.PcdPciIoTranslation|0 + gArmTokenSpaceGuid.PcdPciIoTranslation|0 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 @@ -477,7 +477,7 @@ ArmPkg/Drivers/CpuDxe/CpuDxe.inf MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf - ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf + ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf @@ -618,10 +618,10 @@ NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf } - Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf { + Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf { - NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf - } + NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf + } MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf { NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf -- 2.19.1.windows.1