* [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve
@ 2018-10-29 3:32 Ming Huang
2018-10-29 3:32 ` [PATCH edk2-platforms v1 01/12] Silicon/Hisilicon/D06: Add watchdog to GTDT Ming Huang
` (12 more replies)
0 siblings, 13 replies; 35+ messages in thread
From: Ming Huang @ 2018-10-29 3:32 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang,
huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu,
zhangfeng56, Ming Huang
The major features of this patchset include:
1. Modify acpi table for ACS test;
2. Enable secure boot for SBBR-SCT;
3. Other change for ACS test;
For this SCT issue:
RT.SetVariable - Create one Time Base Auth Variable, the expect return status
should be EFI_SUCCESS – FAILURE
The resule of fail is effected by the edk2 commit(67943427).
If Modify Variable.c as below, this case will pass.
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
@@ -3188,7 +3188,7 @@ VariableServiceSetVariable (
// Maybe it's the delete operation of common authenticated variable at
// user physical presence.
//
if (DataSize != AUTHINFO_SIZE) {
- return EFI_UNSUPPORTED;
+ return EFI_SECURITY_VIOLATION;
I supect ACS SCT compatible with UEFI 2.7 spec. We will analyze this issue
continue.
Code can also be found in github:
https://github.com/hisilicon/OpenPlatformPkg.git
branch: d06-acs-platforms
Ming Huang (12):
Silicon/Hisilicon/D06: Add watchdog to GTDT
Silicon/Hisilicon/D06: Drop _CID for fwts issue
Silicon/Hisilicon/D06: Fix fwts issue in Dbg2
Silicon/Hisilicon/D06: Fix fwts issue in FADT
Hisilicon/D06: Move some functions to OemMiscLib
Silicon/Hisilicon: Modify for SBBR fwts SetTime_Func test case
Hisilicon/D0x: Fix secure boot bug in FlashFvbDxe
Hisilicon/D06: Fix SBBR-SCT AuthVar issue
Silicon/Hisilicon/D06: Reserve ECAM resource in DSDT
Silicon/Hisilicon/D06: Modify GTDT timer flag
Hisilicon/D06: Modify Gic base
Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot
Silicon/Hisilicon/HisiPkg.dec | 1 +
Silicon/Hisilicon/Hisilicon.dsc.inc | 16 ++
Platform/Hisilicon/D03/D03.dsc | 5 +
Platform/Hisilicon/D05/D05.dsc | 5 +
Platform/Hisilicon/D06/D06.dsc | 9 +-
.../Drivers/FlashFvbDxe/FlashFvbDxe.inf | 2 +
.../M41T83RealTimeClockLib.inf | 3 +-
.../Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 2 +-
.../Hisilicon/Include/Library/OemMiscLib.h | 9 +
.../M41T83RealTimeClock.h | 8 +-
.../D06/Library/OemMiscLibD06/OemMiscLibD06.c | 82 ++++++
.../Drivers/FlashFvbDxe/FlashFvbDxe.c | 14 +-
.../M41T83RealTimeClockLib.c | 263 ++++++++++++------
.../Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 1 -
.../Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 48 ----
.../Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 36 ++-
.../Hi1620/Hi1620AcpiTables/Fadt.aslc | 2 +-
.../Hi1620/Hi1620AcpiTables/Gtdt.aslc | 35 +--
.../Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 4 +-
.../Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 18 +-
.../Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 194 ++++++-------
.../Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 2 +-
22 files changed, 475 insertions(+), 284 deletions(-)
--
2.18.0
^ permalink raw reply [flat|nested] 35+ messages in thread* [PATCH edk2-platforms v1 01/12] Silicon/Hisilicon/D06: Add watchdog to GTDT 2018-10-29 3:32 [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Ming Huang @ 2018-10-29 3:32 ` Ming Huang 2018-11-14 0:39 ` Leif Lindholm 2018-10-29 3:32 ` [PATCH edk2-platforms v1 02/12] Silicon/Hisilicon/D06: Drop _CID for fwts issue Ming Huang ` (11 subsequent siblings) 12 siblings, 1 reply; 35+ messages in thread From: Ming Huang @ 2018-10-29 3:32 UTC (permalink / raw) To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory Cc: ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56, Ming Huang Add watchdog to GTDT for SBSA test 41,42. Change-Id: I175ba59f160e4965c26df62e195e423e4e421e8b Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org> --- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 2 +- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc | 31 ++++++++++---------- 2 files changed, 16 insertions(+), 17 deletions(-) diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h index faaeb83781..eaf3ff10e3 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h @@ -22,6 +22,6 @@ #include <PlatformArch.h> -#define HI1620_WATCHDOG_COUNT 2 +#define HI1620_WATCHDOG_COUNT 1 #endif diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc index 45f5d20704..d07070a912 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc @@ -30,6 +30,16 @@ #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF #define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED) +#define GENERIC_WATCHDOG_CONTROL_BASE_CPU1_TOTEM_A 0x9C200000 +#define GENERIC_WATCHDOG_REFRESH_BASE_CPU1_TOTEM_A 0X9C210000 + +#define EFI_ACPI_6_2_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT(RefreshFramePhysicalAddress, \ + ControlFramePhysicalAddress, WatchdogTimerGSIV, WatchdogTimerFlags) \ + { \ + EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG, sizeof(EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE), \ + EFI_ACPI_RESERVED_BYTE, RefreshFramePhysicalAddress, ControlFramePhysicalAddress, \ + WatchdogTimerGSIV, WatchdogTimerFlags \ + } #pragma pack (1) @@ -44,7 +54,7 @@ EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = { { ARM_ACPI_HEADER( EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, - EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE, + EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLES, EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION ), SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress @@ -58,25 +68,14 @@ EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = { FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress -#ifdef notyet - PV660_WATCHDOG_COUNT, // UINT32 PlatformTimerCount + HI1620_WATCHDOG_COUNT, // UINT32 PlatformTimerCount sizeof (EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 PlatfromTimerOffset }, { - { - EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG, sizeof(EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE), - EFI_ACPI_RESERVED_BYTE, 0, 0, 0, 0 - }, - { - EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG, sizeof(EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE), - EFI_ACPI_RESERVED_BYTE, 0, 0, 0, 0 - } - } -#else /* !notyet */ - 0, 0 + EFI_ACPI_6_2_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT( + GENERIC_WATCHDOG_REFRESH_BASE_CPU1_TOTEM_A, GENERIC_WATCHDOG_CONTROL_BASE_CPU1_TOTEM_A, 88, 1) } -#endif - }; +}; // // Reference the table being generated to prevent the optimizer from removing the -- 2.18.0 ^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 01/12] Silicon/Hisilicon/D06: Add watchdog to GTDT 2018-10-29 3:32 ` [PATCH edk2-platforms v1 01/12] Silicon/Hisilicon/D06: Add watchdog to GTDT Ming Huang @ 2018-11-14 0:39 ` Leif Lindholm 0 siblings, 0 replies; 35+ messages in thread From: Leif Lindholm @ 2018-11-14 0:39 UTC (permalink / raw) To: Ming Huang Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On Mon, Oct 29, 2018 at 11:32:38AM +0800, Ming Huang wrote: > Add watchdog to GTDT for SBSA test 41,42. > > Change-Id: I175ba59f160e4965c26df62e195e423e4e421e8b > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang <ming.huang@linaro.org> > --- > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 2 +- > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc | 31 ++++++++++---------- > 2 files changed, 16 insertions(+), 17 deletions(-) > > diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h > index faaeb83781..eaf3ff10e3 100644 > --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h > +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h > @@ -22,6 +22,6 @@ > > #include <PlatformArch.h> > > -#define HI1620_WATCHDOG_COUNT 2 > +#define HI1620_WATCHDOG_COUNT 1 > > #endif > diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc > index 45f5d20704..d07070a912 100644 > --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc > +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc > @@ -30,6 +30,16 @@ > #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF > > #define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED) > +#define GENERIC_WATCHDOG_CONTROL_BASE_CPU1_TOTEM_A 0x9C200000 > +#define GENERIC_WATCHDOG_REFRESH_BASE_CPU1_TOTEM_A 0X9C210000 > + > +#define EFI_ACPI_6_2_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT(RefreshFramePhysicalAddress, \ > + ControlFramePhysicalAddress, WatchdogTimerGSIV, WatchdogTimerFlags) \ > + { \ > + EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG, sizeof(EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE), \ > + EFI_ACPI_RESERVED_BYTE, RefreshFramePhysicalAddress, ControlFramePhysicalAddress, \ > + WatchdogTimerGSIV, WatchdogTimerFlags \ > + } > > #pragma pack (1) > > @@ -44,7 +54,7 @@ EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = { > { > ARM_ACPI_HEADER( > EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, > - EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE, > + EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLES, > EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION > ), > SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress > @@ -58,25 +68,14 @@ EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = { > FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV > GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags > 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress > -#ifdef notyet Clearly this code wasn't sufficiently reviewed on the way in - that ifdef should never have got through. At least we're getting rid of it now. Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> / Leif > - PV660_WATCHDOG_COUNT, // UINT32 PlatformTimerCount > + HI1620_WATCHDOG_COUNT, // UINT32 PlatformTimerCount > sizeof (EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 PlatfromTimerOffset > }, > { > - { > - EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG, sizeof(EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE), > - EFI_ACPI_RESERVED_BYTE, 0, 0, 0, 0 > - }, > - { > - EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG, sizeof(EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE), > - EFI_ACPI_RESERVED_BYTE, 0, 0, 0, 0 > - } > - } > -#else /* !notyet */ > - 0, 0 > + EFI_ACPI_6_2_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT( > + GENERIC_WATCHDOG_REFRESH_BASE_CPU1_TOTEM_A, GENERIC_WATCHDOG_CONTROL_BASE_CPU1_TOTEM_A, 88, 1) > } > -#endif > - }; > +}; > > // > // Reference the table being generated to prevent the optimizer from removing the > -- > 2.18.0 > ^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH edk2-platforms v1 02/12] Silicon/Hisilicon/D06: Drop _CID for fwts issue 2018-10-29 3:32 [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Ming Huang 2018-10-29 3:32 ` [PATCH edk2-platforms v1 01/12] Silicon/Hisilicon/D06: Add watchdog to GTDT Ming Huang @ 2018-10-29 3:32 ` Ming Huang 2018-11-14 0:48 ` Leif Lindholm 2018-10-29 3:32 ` [PATCH edk2-platforms v1 03/12] Silicon/Hisilicon/D06: Fix fwts issue in Dbg2 Ming Huang ` (10 subsequent siblings) 12 siblings, 1 reply; 35+ messages in thread From: Ming Huang @ 2018-10-29 3:32 UTC (permalink / raw) To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory Cc: ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56, Ming Huang As Linux kernel as we only match with HID, We can remove MBIGEN and PL011 CID in ACPI ASL code. The fwts issue: method: \_SB_.COM0._CID returned a string 'PL011' but it was not a valid PNP ID or a valid ACPI ID. method: \_SB_.MB30._CID returned a string 'MBIGEN' but it was not a valid PNP ID or a valid ACPI ID. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org> --- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 1 - Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 48 -------------------- 2 files changed, 49 deletions(-) diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl index 377d171abb..7b7f102b1b 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl @@ -20,7 +20,6 @@ Scope(_SB) { Device(COM0) { Name(_HID, "ARMH0011") - Name(_CID, "PL011") Name(_UID, Zero) Name(_CRS, ResourceTemplate() { Memory32Fixed(ReadWrite, 0x94080000, 0x1000) diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl index 6adf5973a6..b98cb2a01c 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl @@ -18,7 +18,6 @@ Scope(_SB) Device(MB30) { Name(_HID, "HISI0152") Name(_UID, 0x30) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -48,7 +47,6 @@ Scope(_SB) Device(MB31) { Name(_HID, "HISI0152") Name(_UID, 0x31) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -78,7 +76,6 @@ Scope(_SB) Device(MB32) { Name(_HID, "HISI0152") Name(_UID, 0x32) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -108,7 +105,6 @@ Scope(_SB) Device(MB33) { Name(_HID, "HISI0152") Name(_UID, 0x33) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -138,7 +134,6 @@ Scope(_SB) Device(MB34) { Name(_HID, "HISI0152") Name(_UID, 0x34) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -168,7 +163,6 @@ Scope(_SB) Device(MB35) { Name(_HID, "HISI0152") Name(_UID, 0x35) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -198,7 +192,6 @@ Scope(_SB) Device(MB38) { Name(_HID, "HISI0152") Name(_UID, 0x38) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -228,7 +221,6 @@ Scope(_SB) Device(MB39) { Name(_HID, "HISI0152") Name(_UID, 0x39) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -258,7 +250,6 @@ Scope(_SB) Device(MB3A) { Name(_HID, "HISI0152") Name(_UID, 0x3A) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -288,7 +279,6 @@ Scope(_SB) Device(MB3B) { Name(_HID, "HISI0152") Name(_UID, 0x3B) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -318,7 +308,6 @@ Scope(_SB) Device(MB3C) { Name(_HID, "HISI0152") Name(_UID, 0x3C) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -348,7 +337,6 @@ Scope(_SB) Device(MB3D) { Name(_HID, "HISI0152") Name(_UID, 0x3D) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -378,7 +366,6 @@ Scope(_SB) Device(MB10) { Name(_HID, "HISI0152") Name(_UID, 0x10) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -408,7 +395,6 @@ Scope(_SB) Device(MB11) { Name(_HID, "HISI0152") Name(_UID, 0x11) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -438,7 +424,6 @@ Scope(_SB) Device(MB12) { Name(_HID, "HISI0152") Name(_UID, 0x12) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -468,7 +453,6 @@ Scope(_SB) Device(MB13) { Name(_HID, "HISI0152") Name(_UID, 0x13) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -499,7 +483,6 @@ Scope(_SB) Device(MB14) { Name(_HID, "HISI0152") Name(_UID, 0x14) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -529,7 +512,6 @@ Scope(_SB) Device(MB15) { Name(_HID, "HISI0152") Name(_UID, 0x15) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -559,7 +541,6 @@ Scope(_SB) Device(MB18) { Name(_HID, "HISI0152") Name(_UID, 0x18) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -589,7 +570,6 @@ Scope(_SB) Device(MB19) { Name(_HID, "HISI0152") Name(_UID, 0x19) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -619,7 +599,6 @@ Scope(_SB) Device(MB1A) { Name(_HID, "HISI0152") Name(_UID, 0x1A) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -649,7 +628,6 @@ Scope(_SB) Device(MB1B) { Name(_HID, "HISI0152") Name(_UID, 0x1B) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -679,7 +657,6 @@ Scope(_SB) Device(MB1C) { Name(_HID, "HISI0152") Name(_UID, 0x1C) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -709,7 +686,6 @@ Scope(_SB) Device(MB1D) { Name(_HID, "HISI0152") Name(_UID, 0x1D) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -739,7 +715,6 @@ Scope(_SB) Device(MB70) { Name(_HID, "HISI0152") Name(_UID, 0x70) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -769,7 +744,6 @@ Scope(_SB) Device(MB71) { Name(_HID, "HISI0152") Name(_UID, 0x71) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -799,7 +773,6 @@ Scope(_SB) Device(MB72) { Name(_HID, "HISI0152") Name(_UID, 0x72) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -829,7 +802,6 @@ Scope(_SB) Device(MB73) { Name(_HID, "HISI0152") Name(_UID, 0x73) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -860,7 +832,6 @@ Scope(_SB) Device(MB74) { Name(_HID, "HISI0152") Name(_UID, 0x74) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -890,7 +861,6 @@ Scope(_SB) Device(MB75) { Name(_HID, "HISI0152") Name(_UID, 0x75) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -920,7 +890,6 @@ Scope(_SB) Device(MB78) { Name(_HID, "HISI0152") Name(_UID, 0x78) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -950,7 +919,6 @@ Scope(_SB) Device(MB79) { Name(_HID, "HISI0152") Name(_UID, 0x79) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -980,7 +948,6 @@ Scope(_SB) Device(MB7A) { Name(_HID, "HISI0152") Name(_UID, 0x7A) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1010,7 +977,6 @@ Scope(_SB) Device(MB7B) { Name(_HID, "HISI0152") Name(_UID, 0x7B) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1040,7 +1006,6 @@ Scope(_SB) Device(MB7C) { Name(_HID, "HISI0152") Name(_UID, 0x7C) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1070,7 +1035,6 @@ Scope(_SB) Device(MB7D) { Name(_HID, "HISI0152") Name(_UID, 0x7D) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1100,7 +1064,6 @@ Scope(_SB) Device(MB50) { Name(_HID, "HISI0152") Name(_UID, 0x50) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1130,7 +1093,6 @@ Scope(_SB) Device(MB51) { Name(_HID, "HISI0152") Name(_UID, 0x51) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1160,7 +1122,6 @@ Scope(_SB) Device(MB52) { Name(_HID, "HISI0152") Name(_UID, 0x52) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1190,7 +1151,6 @@ Scope(_SB) Device(MB53) { Name(_HID, "HISI0152") Name(_UID, 0x53) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1221,7 +1181,6 @@ Scope(_SB) Device(MB54) { Name(_HID, "HISI0152") Name(_UID, 0x54) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1251,7 +1210,6 @@ Scope(_SB) Device(MB55) { Name(_HID, "HISI0152") Name(_UID, 0x55) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1281,7 +1239,6 @@ Scope(_SB) Device(MB58) { Name(_HID, "HISI0152") Name(_UID, 0x58) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1311,7 +1268,6 @@ Scope(_SB) Device(MB59) { Name(_HID, "HISI0152") Name(_UID, 0x59) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1341,7 +1297,6 @@ Scope(_SB) Device(MB5A) { Name(_HID, "HISI0152") Name(_UID, 0x5A) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1371,7 +1326,6 @@ Scope(_SB) Device(MB5B) { Name(_HID, "HISI0152") Name(_UID, 0x5B) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1401,7 +1355,6 @@ Scope(_SB) Device(MB5C) { Name(_HID, "HISI0152") Name(_UID, 0x5C) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, @@ -1431,7 +1384,6 @@ Scope(_SB) Device(MB5D) { Name(_HID, "HISI0152") Name(_UID, 0x5D) - Name(_CID, "MBIGen") Name(_CRS, ResourceTemplate() { QWordMemory ( ResourceConsumer, -- 2.18.0 ^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 02/12] Silicon/Hisilicon/D06: Drop _CID for fwts issue 2018-10-29 3:32 ` [PATCH edk2-platforms v1 02/12] Silicon/Hisilicon/D06: Drop _CID for fwts issue Ming Huang @ 2018-11-14 0:48 ` Leif Lindholm 0 siblings, 0 replies; 35+ messages in thread From: Leif Lindholm @ 2018-11-14 0:48 UTC (permalink / raw) To: Ming Huang Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On Mon, Oct 29, 2018 at 11:32:39AM +0800, Ming Huang wrote: > As Linux kernel as we only match with HID, We can remove MBIGEN and > PL011 CID in ACPI ASL code. > > The fwts issue: > method: \_SB_.COM0._CID returned a string 'PL011' but it was not a > valid PNP ID or a valid ACPI ID. > method: \_SB_.MB30._CID returned a string 'MBIGEN' but it was not a > valid PNP ID or a valid ACPI ID. These issues appear to also affect d03 and d05, so please provide corresponding patches for those platforms too. Searching in the codebase, I also noticed: - Silicon/Hisilicon/Pv660 is still around even though d02 is now dropped. Please send a patch to delete the remaining bits. - The contents of Silicon/Hisilicon/Library/ArmPlatformLibHisilicon still have Pv660 in their BASE_NAMEs. That should probably be updated. For this patch itself: Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> / Leif > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang <ming.huang@linaro.org> > --- > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 1 - > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 48 -------------------- > 2 files changed, 49 deletions(-) > > diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl > index 377d171abb..7b7f102b1b 100644 > --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl > +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl > @@ -20,7 +20,6 @@ Scope(_SB) > { > Device(COM0) { > Name(_HID, "ARMH0011") > - Name(_CID, "PL011") > Name(_UID, Zero) > Name(_CRS, ResourceTemplate() { > Memory32Fixed(ReadWrite, 0x94080000, 0x1000) > diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl > index 6adf5973a6..b98cb2a01c 100644 > --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl > +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl > @@ -18,7 +18,6 @@ Scope(_SB) > Device(MB30) { > Name(_HID, "HISI0152") > Name(_UID, 0x30) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -48,7 +47,6 @@ Scope(_SB) > Device(MB31) { > Name(_HID, "HISI0152") > Name(_UID, 0x31) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -78,7 +76,6 @@ Scope(_SB) > Device(MB32) { > Name(_HID, "HISI0152") > Name(_UID, 0x32) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -108,7 +105,6 @@ Scope(_SB) > Device(MB33) { > Name(_HID, "HISI0152") > Name(_UID, 0x33) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -138,7 +134,6 @@ Scope(_SB) > Device(MB34) { > Name(_HID, "HISI0152") > Name(_UID, 0x34) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -168,7 +163,6 @@ Scope(_SB) > Device(MB35) { > Name(_HID, "HISI0152") > Name(_UID, 0x35) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -198,7 +192,6 @@ Scope(_SB) > Device(MB38) { > Name(_HID, "HISI0152") > Name(_UID, 0x38) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -228,7 +221,6 @@ Scope(_SB) > Device(MB39) { > Name(_HID, "HISI0152") > Name(_UID, 0x39) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -258,7 +250,6 @@ Scope(_SB) > Device(MB3A) { > Name(_HID, "HISI0152") > Name(_UID, 0x3A) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -288,7 +279,6 @@ Scope(_SB) > Device(MB3B) { > Name(_HID, "HISI0152") > Name(_UID, 0x3B) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -318,7 +308,6 @@ Scope(_SB) > Device(MB3C) { > Name(_HID, "HISI0152") > Name(_UID, 0x3C) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -348,7 +337,6 @@ Scope(_SB) > Device(MB3D) { > Name(_HID, "HISI0152") > Name(_UID, 0x3D) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -378,7 +366,6 @@ Scope(_SB) > Device(MB10) { > Name(_HID, "HISI0152") > Name(_UID, 0x10) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -408,7 +395,6 @@ Scope(_SB) > Device(MB11) { > Name(_HID, "HISI0152") > Name(_UID, 0x11) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -438,7 +424,6 @@ Scope(_SB) > Device(MB12) { > Name(_HID, "HISI0152") > Name(_UID, 0x12) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -468,7 +453,6 @@ Scope(_SB) > Device(MB13) { > Name(_HID, "HISI0152") > Name(_UID, 0x13) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -499,7 +483,6 @@ Scope(_SB) > Device(MB14) { > Name(_HID, "HISI0152") > Name(_UID, 0x14) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -529,7 +512,6 @@ Scope(_SB) > Device(MB15) { > Name(_HID, "HISI0152") > Name(_UID, 0x15) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -559,7 +541,6 @@ Scope(_SB) > Device(MB18) { > Name(_HID, "HISI0152") > Name(_UID, 0x18) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -589,7 +570,6 @@ Scope(_SB) > Device(MB19) { > Name(_HID, "HISI0152") > Name(_UID, 0x19) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -619,7 +599,6 @@ Scope(_SB) > Device(MB1A) { > Name(_HID, "HISI0152") > Name(_UID, 0x1A) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -649,7 +628,6 @@ Scope(_SB) > Device(MB1B) { > Name(_HID, "HISI0152") > Name(_UID, 0x1B) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -679,7 +657,6 @@ Scope(_SB) > Device(MB1C) { > Name(_HID, "HISI0152") > Name(_UID, 0x1C) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -709,7 +686,6 @@ Scope(_SB) > Device(MB1D) { > Name(_HID, "HISI0152") > Name(_UID, 0x1D) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -739,7 +715,6 @@ Scope(_SB) > Device(MB70) { > Name(_HID, "HISI0152") > Name(_UID, 0x70) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -769,7 +744,6 @@ Scope(_SB) > Device(MB71) { > Name(_HID, "HISI0152") > Name(_UID, 0x71) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -799,7 +773,6 @@ Scope(_SB) > Device(MB72) { > Name(_HID, "HISI0152") > Name(_UID, 0x72) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -829,7 +802,6 @@ Scope(_SB) > Device(MB73) { > Name(_HID, "HISI0152") > Name(_UID, 0x73) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -860,7 +832,6 @@ Scope(_SB) > Device(MB74) { > Name(_HID, "HISI0152") > Name(_UID, 0x74) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -890,7 +861,6 @@ Scope(_SB) > Device(MB75) { > Name(_HID, "HISI0152") > Name(_UID, 0x75) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -920,7 +890,6 @@ Scope(_SB) > Device(MB78) { > Name(_HID, "HISI0152") > Name(_UID, 0x78) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -950,7 +919,6 @@ Scope(_SB) > Device(MB79) { > Name(_HID, "HISI0152") > Name(_UID, 0x79) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -980,7 +948,6 @@ Scope(_SB) > Device(MB7A) { > Name(_HID, "HISI0152") > Name(_UID, 0x7A) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1010,7 +977,6 @@ Scope(_SB) > Device(MB7B) { > Name(_HID, "HISI0152") > Name(_UID, 0x7B) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1040,7 +1006,6 @@ Scope(_SB) > Device(MB7C) { > Name(_HID, "HISI0152") > Name(_UID, 0x7C) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1070,7 +1035,6 @@ Scope(_SB) > Device(MB7D) { > Name(_HID, "HISI0152") > Name(_UID, 0x7D) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1100,7 +1064,6 @@ Scope(_SB) > Device(MB50) { > Name(_HID, "HISI0152") > Name(_UID, 0x50) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1130,7 +1093,6 @@ Scope(_SB) > Device(MB51) { > Name(_HID, "HISI0152") > Name(_UID, 0x51) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1160,7 +1122,6 @@ Scope(_SB) > Device(MB52) { > Name(_HID, "HISI0152") > Name(_UID, 0x52) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1190,7 +1151,6 @@ Scope(_SB) > Device(MB53) { > Name(_HID, "HISI0152") > Name(_UID, 0x53) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1221,7 +1181,6 @@ Scope(_SB) > Device(MB54) { > Name(_HID, "HISI0152") > Name(_UID, 0x54) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1251,7 +1210,6 @@ Scope(_SB) > Device(MB55) { > Name(_HID, "HISI0152") > Name(_UID, 0x55) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1281,7 +1239,6 @@ Scope(_SB) > Device(MB58) { > Name(_HID, "HISI0152") > Name(_UID, 0x58) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1311,7 +1268,6 @@ Scope(_SB) > Device(MB59) { > Name(_HID, "HISI0152") > Name(_UID, 0x59) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1341,7 +1297,6 @@ Scope(_SB) > Device(MB5A) { > Name(_HID, "HISI0152") > Name(_UID, 0x5A) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1371,7 +1326,6 @@ Scope(_SB) > Device(MB5B) { > Name(_HID, "HISI0152") > Name(_UID, 0x5B) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1401,7 +1355,6 @@ Scope(_SB) > Device(MB5C) { > Name(_HID, "HISI0152") > Name(_UID, 0x5C) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > @@ -1431,7 +1384,6 @@ Scope(_SB) > Device(MB5D) { > Name(_HID, "HISI0152") > Name(_UID, 0x5D) > - Name(_CID, "MBIGen") > Name(_CRS, ResourceTemplate() { > QWordMemory ( > ResourceConsumer, > -- > 2.18.0 > ^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH edk2-platforms v1 03/12] Silicon/Hisilicon/D06: Fix fwts issue in Dbg2 2018-10-29 3:32 [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Ming Huang 2018-10-29 3:32 ` [PATCH edk2-platforms v1 01/12] Silicon/Hisilicon/D06: Add watchdog to GTDT Ming Huang 2018-10-29 3:32 ` [PATCH edk2-platforms v1 02/12] Silicon/Hisilicon/D06: Drop _CID for fwts issue Ming Huang @ 2018-10-29 3:32 ` Ming Huang 2018-11-14 0:50 ` Leif Lindholm 2018-10-29 3:32 ` [PATCH edk2-platforms v1 04/12] Silicon/Hisilicon/D06: Fix fwts issue in FADT Ming Huang ` (9 subsequent siblings) 12 siblings, 1 reply; 35+ messages in thread From: Ming Huang @ 2018-10-29 3:32 UTC (permalink / raw) To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory Cc: ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56, Ming Huang Modify name COM1 as the name COM1 is not a integrated name. The fwts issue: dbg2: DBG2 Device 'COM1' not found in ACPI object name space. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org> --- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc index 342ec33629..05c284186b 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc @@ -17,7 +17,7 @@ #define NUMBER_DEBUG_DEVICE_INFO 1 #define NUMBER_OF_GENERIC_ADDRESS 1 -#define NAMESPACE_STRING_SIZE 8 +#define NAMESPACE_STRING_SIZE 12 #define UART_LENGTH 0x1000 #pragma pack(1) @@ -74,7 +74,7 @@ EFI_ACPI_DEBUG_PORT_2_TABLE Dbg2 = { { UART_LENGTH }, - "COM1" + "\\_SB.COM0" } } }; -- 2.18.0 ^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 03/12] Silicon/Hisilicon/D06: Fix fwts issue in Dbg2 2018-10-29 3:32 ` [PATCH edk2-platforms v1 03/12] Silicon/Hisilicon/D06: Fix fwts issue in Dbg2 Ming Huang @ 2018-11-14 0:50 ` Leif Lindholm 0 siblings, 0 replies; 35+ messages in thread From: Leif Lindholm @ 2018-11-14 0:50 UTC (permalink / raw) To: Ming Huang Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On Mon, Oct 29, 2018 at 11:32:40AM +0800, Ming Huang wrote: > Modify name COM1 as the name COM1 is not a integrated name. > > The fwts issue: > dbg2: DBG2 Device 'COM1' not found in ACPI object name space. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang <ming.huang@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> > --- > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc > index 342ec33629..05c284186b 100644 > --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc > +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc > @@ -17,7 +17,7 @@ > > #define NUMBER_DEBUG_DEVICE_INFO 1 > #define NUMBER_OF_GENERIC_ADDRESS 1 > -#define NAMESPACE_STRING_SIZE 8 > +#define NAMESPACE_STRING_SIZE 12 > #define UART_LENGTH 0x1000 > > #pragma pack(1) > @@ -74,7 +74,7 @@ EFI_ACPI_DEBUG_PORT_2_TABLE Dbg2 = { > { > UART_LENGTH > }, > - "COM1" > + "\\_SB.COM0" > } > } > }; > -- > 2.18.0 > ^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH edk2-platforms v1 04/12] Silicon/Hisilicon/D06: Fix fwts issue in FADT 2018-10-29 3:32 [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Ming Huang ` (2 preceding siblings ...) 2018-10-29 3:32 ` [PATCH edk2-platforms v1 03/12] Silicon/Hisilicon/D06: Fix fwts issue in Dbg2 Ming Huang @ 2018-10-29 3:32 ` Ming Huang 2018-11-14 0:50 ` Leif Lindholm 2018-10-29 3:32 ` [PATCH edk2-platforms v1 05/12] Hisilicon/D06: Move some functions to OemMiscLib Ming Huang ` (8 subsequent siblings) 12 siblings, 1 reply; 35+ messages in thread From: Ming Huang @ 2018-10-29 3:32 UTC (permalink / raw) To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory Cc: ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56, Ming Huang Fwts issue: fadt_sbbr: FADT preferred PM profile is not recommended. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org> --- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc index e7ee6981ec..2ec860ad09 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc @@ -31,7 +31,7 @@ EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE Fadt = { 0, // UINT32 FirmwareCtrl 0, // UINT32 Dsdt EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0 - EFI_ACPI_6_2_PM_PROFILE_UNSPECIFIED, // UINT8 PreferredPmProfile + EFI_ACPI_6_2_PM_PROFILE_ENTERPRISE_SERVER, // UINT8 PreferredPmProfile 0, // UINT16 SciInt 0, // UINT32 SmiCmd 0, // UINT8 AcpiEnable -- 2.18.0 ^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 04/12] Silicon/Hisilicon/D06: Fix fwts issue in FADT 2018-10-29 3:32 ` [PATCH edk2-platforms v1 04/12] Silicon/Hisilicon/D06: Fix fwts issue in FADT Ming Huang @ 2018-11-14 0:50 ` Leif Lindholm 0 siblings, 0 replies; 35+ messages in thread From: Leif Lindholm @ 2018-11-14 0:50 UTC (permalink / raw) To: Ming Huang Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On Mon, Oct 29, 2018 at 11:32:41AM +0800, Ming Huang wrote: > Fwts issue: > fadt_sbbr: FADT preferred PM profile is not recommended. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang <ming.huang@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> > --- > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc > index e7ee6981ec..2ec860ad09 100644 > --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc > +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc > @@ -31,7 +31,7 @@ EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE Fadt = { > 0, // UINT32 FirmwareCtrl > 0, // UINT32 Dsdt > EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0 > - EFI_ACPI_6_2_PM_PROFILE_UNSPECIFIED, // UINT8 PreferredPmProfile > + EFI_ACPI_6_2_PM_PROFILE_ENTERPRISE_SERVER, // UINT8 PreferredPmProfile > 0, // UINT16 SciInt > 0, // UINT32 SmiCmd > 0, // UINT8 AcpiEnable > -- > 2.18.0 > ^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH edk2-platforms v1 05/12] Hisilicon/D06: Move some functions to OemMiscLib 2018-10-29 3:32 [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Ming Huang ` (3 preceding siblings ...) 2018-10-29 3:32 ` [PATCH edk2-platforms v1 04/12] Silicon/Hisilicon/D06: Fix fwts issue in FADT Ming Huang @ 2018-10-29 3:32 ` Ming Huang 2018-11-14 0:04 ` Leif Lindholm 2018-10-29 3:32 ` [PATCH edk2-platforms v1 06/12] Silicon/Hisilicon: Modify for SBBR fwts SetTime_Func test case Ming Huang ` (7 subsequent siblings) 12 siblings, 1 reply; 35+ messages in thread From: Ming Huang @ 2018-10-29 3:32 UTC (permalink / raw) To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory Cc: ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56, Ming Huang As M41T83RealTimeClockLib is common library, so move two cpld relative functions to OemMiscLib and rename this two functions. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org> --- Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf | 1 - Silicon/Hisilicon/Include/Library/OemMiscLib.h | 9 ++ Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h | 4 - Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 82 ++++++++++++++++++ Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c | 90 ++------------------ 5 files changed, 98 insertions(+), 88 deletions(-) diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf index e0bf6b3f24..4e963fd453 100644 --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf @@ -27,7 +27,6 @@ [Packages] EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec - Platform/Hisilicon/D06/D06.dec Silicon/Hisilicon/HisiPkg.dec [LibraryClasses] diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemMiscLib.h index 86ea6a1b3d..0d7bf71b17 100644 --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h @@ -53,4 +53,13 @@ BOOLEAN OemIsNeedDisableExpanderBuffer(VOID); extern EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM]; EFI_HII_HANDLE EFIAPI OemGetPackages (); + +VOID +OemReleaseOwnershipOfRtc ( + VOID + ); +EFI_STATUS +OemSwitchRtcI2cChannelAndLock ( + VOID + ); #endif diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h index d985055d9b..f329108858 100644 --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h @@ -16,12 +16,8 @@ #ifndef __M41T83_REAL_TIME_CLOCK_H__ #define __M41T83_REAL_TIME_CLOCK_H__ -// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. -#define RTC_DELAY_30_MS 30000 // The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. #define RTC_DELAY_1000_MACROSECOND 1000 -// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. -#define RTC_DELAY_2_MACROSECOND 2 #define M41T83_REGADDR_DOTSECONDS 0x00 #define M41T83_REGADDR_SECONDS 0x01 diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c index 2a9db46d1f..64d167d18a 100644 --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c @@ -17,6 +17,7 @@ #include <PlatformArch.h> #include <Library/BaseMemoryLib.h> #include <Library/CpldD06.h> +#include <Library/CpldIoLib.h> #include <Library/DebugLib.h> #include <Library/IoLib.h> #include <Library/LpcLib.h> @@ -27,6 +28,12 @@ #include <Library/SerdesLib.h> #include <Library/SerialPortLib.h> #include <Library/TimerLib.h> +#include <Library/UefiRuntimeLib.h> + +// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. +#define RTC_DELAY_30_MS 30000 +// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. +#define RTC_DELAY_2_MACROSECOND 2 REPORT_PCIEDIDVID2BMC PcieDeviceToReport[PCIEDEVICE_REPORT_MAX] = { {67,0,0,0}, @@ -207,3 +214,78 @@ OemIsNeedDisableExpanderBuffer ( { return TRUE; } + +EFI_STATUS +OemSwitchRtcI2cChannelAndLock ( + VOID + ) +{ + UINT8 Temp; + UINT8 Count; + + for (Count = 0; Count < 100; Count++) { + // To get the other side's state is idle first + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + if ((Temp & BIT3) != 0) { + (VOID) MicroSecondDelay (RTC_DELAY_30_MS); + // Try 100 times, if BMC has not released the bus, return preemption failed + if (Count == 99) { + if (!EfiAtRuntime ()) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state 100 times fail!\n", + __FUNCTION__, __LINE__)); + } + return EFI_DEVICE_ERROR; + } + continue; + } + + // if BMC free the bus, can be set 1 preemption + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + Temp = Temp | CPU_GET_I2C_CONTROL; + // CPU occupied RTC I2C State + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); + (VOID) MicroSecondDelay (RTC_DELAY_2_MACROSECOND); + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + // Is preempt success + if(CPU_GET_I2C_CONTROL == (Temp & CPU_GET_I2C_CONTROL)) { + break; + } + if (Count == 99) { + if (!EfiAtRuntime ()) { + DEBUG((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state fail !!! \n", + __FUNCTION__, __LINE__)); + } + return EFI_DEVICE_ERROR; + } + (VOID) MicroSecondDelay (RTC_DELAY_30_MS); + } + + //Polling BMC RTC I2C status + for (Count = 0; Count < 100; Count++) { + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + if ((Temp & BIT3) == 0) { + return EFI_SUCCESS; + } + (VOID) MicroSecondDelay (RTC_DELAY_30_MS); + } + + //If the BMC occupies the RTC I2C Channel, write back the CPU side is idle + // or the subsequent BMC will not preempt + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + Temp = Temp & (~CPU_GET_I2C_CONTROL); + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); + + return EFI_NOT_READY; +} + +VOID +OemReleaseOwnershipOfRtc ( + VOID + ) +{ + UINT8 Temp; + + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + Temp = Temp & ~CPU_GET_I2C_CONTROL; + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); +} diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c index 0670f9c5f4..1f50ad4b64 100644 --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c @@ -17,10 +17,10 @@ #include <PiDxe.h> #include <Library/BaseLib.h> #include <Library/BaseMemoryLib.h> -#include <Library/CpldD06.h> #include <Library/CpldIoLib.h> #include <Library/DebugLib.h> #include <Library/I2CLib.h> +#include <Library/OemMiscLib.h> #include <Library/TimeBaseLib.h> #include <Library/TimerLib.h> #include <Library/UefiLib.h> @@ -32,70 +32,6 @@ extern I2C_DEVICE gRtcDevice; STATIC EFI_LOCK mRtcLock; -EFI_STATUS -SwitchRtcI2cChannelAndLock ( - VOID - ) -{ - UINT8 Temp; - UINT8 Count; - - for (Count = 0; Count < 100; Count++) { - // To get the other side's state is idle first - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); - if ((Temp & BIT3) != 0) { - (VOID) MicroSecondDelay (RTC_DELAY_30_MS); - // Try 100 times, if BMC has not released the bus, return preemption failed - if (Count == 99) { - if (!EfiAtRuntime ()) { - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state 100 times fail!\n", - __FUNCTION__, __LINE__)); - } - return EFI_DEVICE_ERROR; - } - continue; - } - - // if BMC free the bus, can be set 1 preemption - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); - Temp = Temp | CPU_GET_I2C_CONTROL; - // CPU occupied RTC I2C State - WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); - (VOID) MicroSecondDelay (RTC_DELAY_2_MACROSECOND); - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); - // Is preempt success - if(CPU_GET_I2C_CONTROL == (Temp & CPU_GET_I2C_CONTROL)) { - break; - } - if (Count == 99) { - if (!EfiAtRuntime ()) { - DEBUG((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state fail !!! \n", - __FUNCTION__, __LINE__)); - } - return EFI_DEVICE_ERROR; - } - (VOID) MicroSecondDelay (RTC_DELAY_30_MS); - } - - //Polling BMC RTC I2C status - for (Count = 0; Count < 100; Count++) { - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); - if ((Temp & BIT3) == 0) { - return EFI_SUCCESS; - } - (VOID) MicroSecondDelay (RTC_DELAY_30_MS); - } - - //If the BMC occupies the RTC I2C Channel, write back the CPU side is idle - // or the subsequent BMC will not preempt - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); - Temp = Temp & (~CPU_GET_I2C_CONTROL); - WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); - - return EFI_NOT_READY; -} - - /** Read RTC content through its registers. @@ -142,18 +78,6 @@ RtcWrite ( return Status; } -VOID -ReleaseOwnershipOfRtc ( - VOID - ) -{ - UINT8 Temp; - - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); - Temp = Temp & ~CPU_GET_I2C_CONTROL; - WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); -} - EFI_STATUS InitializeM41T83 ( @@ -178,7 +102,7 @@ InitializeM41T83 ( return Status; } - Status = SwitchRtcI2cChannelAndLock (); + Status = OemSwitchRtcI2cChannelAndLock (); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "Get i2c preemption failed: %r\n", Status)); if (!EfiAtRuntime ()) { @@ -231,7 +155,7 @@ InitializeM41T83 ( Exit: // Release RTC Lock. - ReleaseOwnershipOfRtc (); + OemReleaseOwnershipOfRtc (); if (!EfiAtRuntime ()) { EfiReleaseLock (&mRtcLock); } @@ -274,7 +198,7 @@ LibSetTime ( return EFI_INVALID_PARAMETER; } - Status = SwitchRtcI2cChannelAndLock (); + Status = OemSwitchRtcI2cChannelAndLock (); if (EFI_ERROR (Status)) { return Status; } @@ -332,7 +256,7 @@ LibSetTime ( } Exit: - ReleaseOwnershipOfRtc (); + OemReleaseOwnershipOfRtc (); // Release RTC Lock. if (!EfiAtRuntime ()) { if (EFI_ERROR (Status)) { @@ -377,7 +301,7 @@ LibGetTime ( return EFI_INVALID_PARAMETER; } - Status = SwitchRtcI2cChannelAndLock (); + Status = OemSwitchRtcI2cChannelAndLock (); if (EFI_ERROR (Status)) { return Status; } @@ -422,7 +346,7 @@ LibGetTime ( } Exit: - ReleaseOwnershipOfRtc (); + OemReleaseOwnershipOfRtc (); // Release RTC Lock. if (!EfiAtRuntime ()) { if (EFI_ERROR (Status)) { -- 2.18.0 ^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 05/12] Hisilicon/D06: Move some functions to OemMiscLib 2018-10-29 3:32 ` [PATCH edk2-platforms v1 05/12] Hisilicon/D06: Move some functions to OemMiscLib Ming Huang @ 2018-11-14 0:04 ` Leif Lindholm 2018-11-14 14:30 ` Ming Huang 0 siblings, 1 reply; 35+ messages in thread From: Leif Lindholm @ 2018-11-14 0:04 UTC (permalink / raw) To: Ming Huang Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On Mon, Oct 29, 2018 at 11:32:42AM +0800, Ming Huang wrote: > As M41T83RealTimeClockLib is common library, so move two cpld > relative functions to OemMiscLib and rename this two functions. This would be more clear as "platform specific" than "cpld relative". I did not realise this wasn't a Hisilicon component when reviewing the original set. I approve of this change, but can you tell me why it is included in this set? If the goal is to make the M41T83 support platform independent, should the library also move to Silicon/ST/? / Leif > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang <ming.huang@linaro.org> > --- > Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf | 1 - > Silicon/Hisilicon/Include/Library/OemMiscLib.h | 9 ++ > Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h | 4 - > Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 82 ++++++++++++++++++ > Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c | 90 ++------------------ > 5 files changed, 98 insertions(+), 88 deletions(-) > > diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf > index e0bf6b3f24..4e963fd453 100644 > --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf > +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf > @@ -27,7 +27,6 @@ > [Packages] > EmbeddedPkg/EmbeddedPkg.dec > MdePkg/MdePkg.dec > - Platform/Hisilicon/D06/D06.dec > Silicon/Hisilicon/HisiPkg.dec > > [LibraryClasses] > diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemMiscLib.h > index 86ea6a1b3d..0d7bf71b17 100644 > --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h > +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h > @@ -53,4 +53,13 @@ BOOLEAN OemIsNeedDisableExpanderBuffer(VOID); > > extern EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM]; > EFI_HII_HANDLE EFIAPI OemGetPackages (); > + > +VOID > +OemReleaseOwnershipOfRtc ( > + VOID > + ); > +EFI_STATUS > +OemSwitchRtcI2cChannelAndLock ( > + VOID > + ); > #endif > diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h > index d985055d9b..f329108858 100644 > --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h > +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h > @@ -16,12 +16,8 @@ > #ifndef __M41T83_REAL_TIME_CLOCK_H__ > #define __M41T83_REAL_TIME_CLOCK_H__ > > -// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. > -#define RTC_DELAY_30_MS 30000 > // The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. > #define RTC_DELAY_1000_MACROSECOND 1000 > -// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. > -#define RTC_DELAY_2_MACROSECOND 2 > > #define M41T83_REGADDR_DOTSECONDS 0x00 > #define M41T83_REGADDR_SECONDS 0x01 > diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c > index 2a9db46d1f..64d167d18a 100644 > --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c > +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c > @@ -17,6 +17,7 @@ > #include <PlatformArch.h> > #include <Library/BaseMemoryLib.h> > #include <Library/CpldD06.h> > +#include <Library/CpldIoLib.h> > #include <Library/DebugLib.h> > #include <Library/IoLib.h> > #include <Library/LpcLib.h> > @@ -27,6 +28,12 @@ > #include <Library/SerdesLib.h> > #include <Library/SerialPortLib.h> > #include <Library/TimerLib.h> > +#include <Library/UefiRuntimeLib.h> > + > +// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. > +#define RTC_DELAY_30_MS 30000 > +// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. > +#define RTC_DELAY_2_MACROSECOND 2 > > REPORT_PCIEDIDVID2BMC PcieDeviceToReport[PCIEDEVICE_REPORT_MAX] = { > {67,0,0,0}, > @@ -207,3 +214,78 @@ OemIsNeedDisableExpanderBuffer ( > { > return TRUE; > } > + > +EFI_STATUS > +OemSwitchRtcI2cChannelAndLock ( > + VOID > + ) > +{ > + UINT8 Temp; > + UINT8 Count; > + > + for (Count = 0; Count < 100; Count++) { > + // To get the other side's state is idle first > + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); > + if ((Temp & BIT3) != 0) { > + (VOID) MicroSecondDelay (RTC_DELAY_30_MS); > + // Try 100 times, if BMC has not released the bus, return preemption failed > + if (Count == 99) { > + if (!EfiAtRuntime ()) { > + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state 100 times fail!\n", > + __FUNCTION__, __LINE__)); > + } > + return EFI_DEVICE_ERROR; > + } > + continue; > + } > + > + // if BMC free the bus, can be set 1 preemption > + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); > + Temp = Temp | CPU_GET_I2C_CONTROL; > + // CPU occupied RTC I2C State > + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); > + (VOID) MicroSecondDelay (RTC_DELAY_2_MACROSECOND); > + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); > + // Is preempt success > + if(CPU_GET_I2C_CONTROL == (Temp & CPU_GET_I2C_CONTROL)) { > + break; > + } > + if (Count == 99) { > + if (!EfiAtRuntime ()) { > + DEBUG((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state fail !!! \n", > + __FUNCTION__, __LINE__)); > + } > + return EFI_DEVICE_ERROR; > + } > + (VOID) MicroSecondDelay (RTC_DELAY_30_MS); > + } > + > + //Polling BMC RTC I2C status > + for (Count = 0; Count < 100; Count++) { > + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); > + if ((Temp & BIT3) == 0) { > + return EFI_SUCCESS; > + } > + (VOID) MicroSecondDelay (RTC_DELAY_30_MS); > + } > + > + //If the BMC occupies the RTC I2C Channel, write back the CPU side is idle > + // or the subsequent BMC will not preempt > + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); > + Temp = Temp & (~CPU_GET_I2C_CONTROL); > + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); > + > + return EFI_NOT_READY; > +} > + > +VOID > +OemReleaseOwnershipOfRtc ( > + VOID > + ) > +{ > + UINT8 Temp; > + > + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); > + Temp = Temp & ~CPU_GET_I2C_CONTROL; > + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); > +} > diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c > index 0670f9c5f4..1f50ad4b64 100644 > --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c > +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c > @@ -17,10 +17,10 @@ > #include <PiDxe.h> > #include <Library/BaseLib.h> > #include <Library/BaseMemoryLib.h> > -#include <Library/CpldD06.h> > #include <Library/CpldIoLib.h> > #include <Library/DebugLib.h> > #include <Library/I2CLib.h> > +#include <Library/OemMiscLib.h> > #include <Library/TimeBaseLib.h> > #include <Library/TimerLib.h> > #include <Library/UefiLib.h> > @@ -32,70 +32,6 @@ extern I2C_DEVICE gRtcDevice; > > STATIC EFI_LOCK mRtcLock; > > -EFI_STATUS > -SwitchRtcI2cChannelAndLock ( > - VOID > - ) > -{ > - UINT8 Temp; > - UINT8 Count; > - > - for (Count = 0; Count < 100; Count++) { > - // To get the other side's state is idle first > - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); > - if ((Temp & BIT3) != 0) { > - (VOID) MicroSecondDelay (RTC_DELAY_30_MS); > - // Try 100 times, if BMC has not released the bus, return preemption failed > - if (Count == 99) { > - if (!EfiAtRuntime ()) { > - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state 100 times fail!\n", > - __FUNCTION__, __LINE__)); > - } > - return EFI_DEVICE_ERROR; > - } > - continue; > - } > - > - // if BMC free the bus, can be set 1 preemption > - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); > - Temp = Temp | CPU_GET_I2C_CONTROL; > - // CPU occupied RTC I2C State > - WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); > - (VOID) MicroSecondDelay (RTC_DELAY_2_MACROSECOND); > - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); > - // Is preempt success > - if(CPU_GET_I2C_CONTROL == (Temp & CPU_GET_I2C_CONTROL)) { > - break; > - } > - if (Count == 99) { > - if (!EfiAtRuntime ()) { > - DEBUG((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state fail !!! \n", > - __FUNCTION__, __LINE__)); > - } > - return EFI_DEVICE_ERROR; > - } > - (VOID) MicroSecondDelay (RTC_DELAY_30_MS); > - } > - > - //Polling BMC RTC I2C status > - for (Count = 0; Count < 100; Count++) { > - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); > - if ((Temp & BIT3) == 0) { > - return EFI_SUCCESS; > - } > - (VOID) MicroSecondDelay (RTC_DELAY_30_MS); > - } > - > - //If the BMC occupies the RTC I2C Channel, write back the CPU side is idle > - // or the subsequent BMC will not preempt > - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); > - Temp = Temp & (~CPU_GET_I2C_CONTROL); > - WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); > - > - return EFI_NOT_READY; > -} > - > - > /** > Read RTC content through its registers. > > @@ -142,18 +78,6 @@ RtcWrite ( > return Status; > } > > -VOID > -ReleaseOwnershipOfRtc ( > - VOID > - ) > -{ > - UINT8 Temp; > - > - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); > - Temp = Temp & ~CPU_GET_I2C_CONTROL; > - WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); > -} > - > > EFI_STATUS > InitializeM41T83 ( > @@ -178,7 +102,7 @@ InitializeM41T83 ( > return Status; > } > > - Status = SwitchRtcI2cChannelAndLock (); > + Status = OemSwitchRtcI2cChannelAndLock (); > if (EFI_ERROR (Status)) { > DEBUG ((DEBUG_ERROR, "Get i2c preemption failed: %r\n", Status)); > if (!EfiAtRuntime ()) { > @@ -231,7 +155,7 @@ InitializeM41T83 ( > > Exit: > // Release RTC Lock. > - ReleaseOwnershipOfRtc (); > + OemReleaseOwnershipOfRtc (); > if (!EfiAtRuntime ()) { > EfiReleaseLock (&mRtcLock); > } > @@ -274,7 +198,7 @@ LibSetTime ( > return EFI_INVALID_PARAMETER; > } > > - Status = SwitchRtcI2cChannelAndLock (); > + Status = OemSwitchRtcI2cChannelAndLock (); > if (EFI_ERROR (Status)) { > return Status; > } > @@ -332,7 +256,7 @@ LibSetTime ( > } > > Exit: > - ReleaseOwnershipOfRtc (); > + OemReleaseOwnershipOfRtc (); > // Release RTC Lock. > if (!EfiAtRuntime ()) { > if (EFI_ERROR (Status)) { > @@ -377,7 +301,7 @@ LibGetTime ( > return EFI_INVALID_PARAMETER; > } > > - Status = SwitchRtcI2cChannelAndLock (); > + Status = OemSwitchRtcI2cChannelAndLock (); > if (EFI_ERROR (Status)) { > return Status; > } > @@ -422,7 +346,7 @@ LibGetTime ( > } > > Exit: > - ReleaseOwnershipOfRtc (); > + OemReleaseOwnershipOfRtc (); > // Release RTC Lock. > if (!EfiAtRuntime ()) { > if (EFI_ERROR (Status)) { > -- > 2.18.0 > ^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 05/12] Hisilicon/D06: Move some functions to OemMiscLib 2018-11-14 0:04 ` Leif Lindholm @ 2018-11-14 14:30 ` Ming Huang 0 siblings, 0 replies; 35+ messages in thread From: Ming Huang @ 2018-11-14 14:30 UTC (permalink / raw) To: Leif Lindholm Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On 11/14/2018 8:04 AM, Leif Lindholm wrote: > On Mon, Oct 29, 2018 at 11:32:42AM +0800, Ming Huang wrote: >> As M41T83RealTimeClockLib is common library, so move two cpld >> relative functions to OemMiscLib and rename this two functions. > > This would be more clear as "platform specific" than "cpld relative". > > I did not realise this wasn't a Hisilicon component when reviewing the > original set. > > I approve of this change, but can you tell me why it is included in > this set? If the goal is to make the M41T83 support platform > independent, should the library also move to Silicon/ST/? This change had make in internal master and the next patch is base on this patch, so I add this patch. Main gist is remove platform specific functions from M41T83RealTimeClockLib. > > / > Leif > >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ming Huang <ming.huang@linaro.org> >> --- >> Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf | 1 - >> Silicon/Hisilicon/Include/Library/OemMiscLib.h | 9 ++ >> Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h | 4 - >> Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 82 ++++++++++++++++++ >> Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c | 90 ++------------------ >> 5 files changed, 98 insertions(+), 88 deletions(-) >> >> diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf >> index e0bf6b3f24..4e963fd453 100644 >> --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf >> +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf >> @@ -27,7 +27,6 @@ >> [Packages] >> EmbeddedPkg/EmbeddedPkg.dec >> MdePkg/MdePkg.dec >> - Platform/Hisilicon/D06/D06.dec >> Silicon/Hisilicon/HisiPkg.dec >> >> [LibraryClasses] >> diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemMiscLib.h >> index 86ea6a1b3d..0d7bf71b17 100644 >> --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h >> +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h >> @@ -53,4 +53,13 @@ BOOLEAN OemIsNeedDisableExpanderBuffer(VOID); >> >> extern EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM]; >> EFI_HII_HANDLE EFIAPI OemGetPackages (); >> + >> +VOID >> +OemReleaseOwnershipOfRtc ( >> + VOID >> + ); >> +EFI_STATUS >> +OemSwitchRtcI2cChannelAndLock ( >> + VOID >> + ); >> #endif >> diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h >> index d985055d9b..f329108858 100644 >> --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h >> +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h >> @@ -16,12 +16,8 @@ >> #ifndef __M41T83_REAL_TIME_CLOCK_H__ >> #define __M41T83_REAL_TIME_CLOCK_H__ >> >> -// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. >> -#define RTC_DELAY_30_MS 30000 >> // The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. >> #define RTC_DELAY_1000_MACROSECOND 1000 >> -// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. >> -#define RTC_DELAY_2_MACROSECOND 2 >> >> #define M41T83_REGADDR_DOTSECONDS 0x00 >> #define M41T83_REGADDR_SECONDS 0x01 >> diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c >> index 2a9db46d1f..64d167d18a 100644 >> --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c >> +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c >> @@ -17,6 +17,7 @@ >> #include <PlatformArch.h> >> #include <Library/BaseMemoryLib.h> >> #include <Library/CpldD06.h> >> +#include <Library/CpldIoLib.h> >> #include <Library/DebugLib.h> >> #include <Library/IoLib.h> >> #include <Library/LpcLib.h> >> @@ -27,6 +28,12 @@ >> #include <Library/SerdesLib.h> >> #include <Library/SerialPortLib.h> >> #include <Library/TimerLib.h> >> +#include <Library/UefiRuntimeLib.h> >> + >> +// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. >> +#define RTC_DELAY_30_MS 30000 >> +// The delay is need for cpld and I2C. This is a empirical value. MemoryFence is no need. >> +#define RTC_DELAY_2_MACROSECOND 2 >> >> REPORT_PCIEDIDVID2BMC PcieDeviceToReport[PCIEDEVICE_REPORT_MAX] = { >> {67,0,0,0}, >> @@ -207,3 +214,78 @@ OemIsNeedDisableExpanderBuffer ( >> { >> return TRUE; >> } >> + >> +EFI_STATUS >> +OemSwitchRtcI2cChannelAndLock ( >> + VOID >> + ) >> +{ >> + UINT8 Temp; >> + UINT8 Count; >> + >> + for (Count = 0; Count < 100; Count++) { >> + // To get the other side's state is idle first >> + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); >> + if ((Temp & BIT3) != 0) { >> + (VOID) MicroSecondDelay (RTC_DELAY_30_MS); >> + // Try 100 times, if BMC has not released the bus, return preemption failed >> + if (Count == 99) { >> + if (!EfiAtRuntime ()) { >> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state 100 times fail!\n", >> + __FUNCTION__, __LINE__)); >> + } >> + return EFI_DEVICE_ERROR; >> + } >> + continue; >> + } >> + >> + // if BMC free the bus, can be set 1 preemption >> + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); >> + Temp = Temp | CPU_GET_I2C_CONTROL; >> + // CPU occupied RTC I2C State >> + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); >> + (VOID) MicroSecondDelay (RTC_DELAY_2_MACROSECOND); >> + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); >> + // Is preempt success >> + if(CPU_GET_I2C_CONTROL == (Temp & CPU_GET_I2C_CONTROL)) { >> + break; >> + } >> + if (Count == 99) { >> + if (!EfiAtRuntime ()) { >> + DEBUG((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state fail !!! \n", >> + __FUNCTION__, __LINE__)); >> + } >> + return EFI_DEVICE_ERROR; >> + } >> + (VOID) MicroSecondDelay (RTC_DELAY_30_MS); >> + } >> + >> + //Polling BMC RTC I2C status >> + for (Count = 0; Count < 100; Count++) { >> + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); >> + if ((Temp & BIT3) == 0) { >> + return EFI_SUCCESS; >> + } >> + (VOID) MicroSecondDelay (RTC_DELAY_30_MS); >> + } >> + >> + //If the BMC occupies the RTC I2C Channel, write back the CPU side is idle >> + // or the subsequent BMC will not preempt >> + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); >> + Temp = Temp & (~CPU_GET_I2C_CONTROL); >> + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); >> + >> + return EFI_NOT_READY; >> +} >> + >> +VOID >> +OemReleaseOwnershipOfRtc ( >> + VOID >> + ) >> +{ >> + UINT8 Temp; >> + >> + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); >> + Temp = Temp & ~CPU_GET_I2C_CONTROL; >> + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); >> +} >> diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c >> index 0670f9c5f4..1f50ad4b64 100644 >> --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c >> +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c >> @@ -17,10 +17,10 @@ >> #include <PiDxe.h> >> #include <Library/BaseLib.h> >> #include <Library/BaseMemoryLib.h> >> -#include <Library/CpldD06.h> >> #include <Library/CpldIoLib.h> >> #include <Library/DebugLib.h> >> #include <Library/I2CLib.h> >> +#include <Library/OemMiscLib.h> >> #include <Library/TimeBaseLib.h> >> #include <Library/TimerLib.h> >> #include <Library/UefiLib.h> >> @@ -32,70 +32,6 @@ extern I2C_DEVICE gRtcDevice; >> >> STATIC EFI_LOCK mRtcLock; >> >> -EFI_STATUS >> -SwitchRtcI2cChannelAndLock ( >> - VOID >> - ) >> -{ >> - UINT8 Temp; >> - UINT8 Count; >> - >> - for (Count = 0; Count < 100; Count++) { >> - // To get the other side's state is idle first >> - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); >> - if ((Temp & BIT3) != 0) { >> - (VOID) MicroSecondDelay (RTC_DELAY_30_MS); >> - // Try 100 times, if BMC has not released the bus, return preemption failed >> - if (Count == 99) { >> - if (!EfiAtRuntime ()) { >> - DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state 100 times fail!\n", >> - __FUNCTION__, __LINE__)); >> - } >> - return EFI_DEVICE_ERROR; >> - } >> - continue; >> - } >> - >> - // if BMC free the bus, can be set 1 preemption >> - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); >> - Temp = Temp | CPU_GET_I2C_CONTROL; >> - // CPU occupied RTC I2C State >> - WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); >> - (VOID) MicroSecondDelay (RTC_DELAY_2_MACROSECOND); >> - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); >> - // Is preempt success >> - if(CPU_GET_I2C_CONTROL == (Temp & CPU_GET_I2C_CONTROL)) { >> - break; >> - } >> - if (Count == 99) { >> - if (!EfiAtRuntime ()) { >> - DEBUG((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state fail !!! \n", >> - __FUNCTION__, __LINE__)); >> - } >> - return EFI_DEVICE_ERROR; >> - } >> - (VOID) MicroSecondDelay (RTC_DELAY_30_MS); >> - } >> - >> - //Polling BMC RTC I2C status >> - for (Count = 0; Count < 100; Count++) { >> - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); >> - if ((Temp & BIT3) == 0) { >> - return EFI_SUCCESS; >> - } >> - (VOID) MicroSecondDelay (RTC_DELAY_30_MS); >> - } >> - >> - //If the BMC occupies the RTC I2C Channel, write back the CPU side is idle >> - // or the subsequent BMC will not preempt >> - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); >> - Temp = Temp & (~CPU_GET_I2C_CONTROL); >> - WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); >> - >> - return EFI_NOT_READY; >> -} >> - >> - >> /** >> Read RTC content through its registers. >> >> @@ -142,18 +78,6 @@ RtcWrite ( >> return Status; >> } >> >> -VOID >> -ReleaseOwnershipOfRtc ( >> - VOID >> - ) >> -{ >> - UINT8 Temp; >> - >> - Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); >> - Temp = Temp & ~CPU_GET_I2C_CONTROL; >> - WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); >> -} >> - >> >> EFI_STATUS >> InitializeM41T83 ( >> @@ -178,7 +102,7 @@ InitializeM41T83 ( >> return Status; >> } >> >> - Status = SwitchRtcI2cChannelAndLock (); >> + Status = OemSwitchRtcI2cChannelAndLock (); >> if (EFI_ERROR (Status)) { >> DEBUG ((DEBUG_ERROR, "Get i2c preemption failed: %r\n", Status)); >> if (!EfiAtRuntime ()) { >> @@ -231,7 +155,7 @@ InitializeM41T83 ( >> >> Exit: >> // Release RTC Lock. >> - ReleaseOwnershipOfRtc (); >> + OemReleaseOwnershipOfRtc (); >> if (!EfiAtRuntime ()) { >> EfiReleaseLock (&mRtcLock); >> } >> @@ -274,7 +198,7 @@ LibSetTime ( >> return EFI_INVALID_PARAMETER; >> } >> >> - Status = SwitchRtcI2cChannelAndLock (); >> + Status = OemSwitchRtcI2cChannelAndLock (); >> if (EFI_ERROR (Status)) { >> return Status; >> } >> @@ -332,7 +256,7 @@ LibSetTime ( >> } >> >> Exit: >> - ReleaseOwnershipOfRtc (); >> + OemReleaseOwnershipOfRtc (); >> // Release RTC Lock. >> if (!EfiAtRuntime ()) { >> if (EFI_ERROR (Status)) { >> @@ -377,7 +301,7 @@ LibGetTime ( >> return EFI_INVALID_PARAMETER; >> } >> >> - Status = SwitchRtcI2cChannelAndLock (); >> + Status = OemSwitchRtcI2cChannelAndLock (); >> if (EFI_ERROR (Status)) { >> return Status; >> } >> @@ -422,7 +346,7 @@ LibGetTime ( >> } >> >> Exit: >> - ReleaseOwnershipOfRtc (); >> + OemReleaseOwnershipOfRtc (); >> // Release RTC Lock. >> if (!EfiAtRuntime ()) { >> if (EFI_ERROR (Status)) { >> -- >> 2.18.0 >> ^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH edk2-platforms v1 06/12] Silicon/Hisilicon: Modify for SBBR fwts SetTime_Func test case 2018-10-29 3:32 [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Ming Huang ` (4 preceding siblings ...) 2018-10-29 3:32 ` [PATCH edk2-platforms v1 05/12] Hisilicon/D06: Move some functions to OemMiscLib Ming Huang @ 2018-10-29 3:32 ` Ming Huang [not found] ` <20181113235222.amykmhqlh5gltg7p@bivouac.eciton.net> 2018-10-29 3:32 ` [PATCH edk2-platforms v1 07/12] Hisilicon/D0x: Fix secure boot bug in FlashFvbDxe Ming Huang ` (6 subsequent siblings) 12 siblings, 1 reply; 35+ messages in thread From: Ming Huang @ 2018-10-29 3:32 UTC (permalink / raw) To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory Cc: ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56, Ming Huang There is no variable to keep timezone and daylight, so read it from the hardware first and create a new variable to keep it for the next gettime process. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org> --- Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf | 2 +- Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h | 4 + Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c | 175 +++++++++++++++++++- 3 files changed, 179 insertions(+), 2 deletions(-) diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf index 4e963fd453..8e559d7b70 100644 --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf @@ -42,4 +42,4 @@ UefiRuntimeLib # Use EFiAtRuntime to check stage [Depex] - gEfiCpuArchProtocolGuid + gEfiCpuArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h index f329108858..b95ebc654a 100644 --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h @@ -41,6 +41,10 @@ #define M41T83_REGADDR_ALARM2DATE 0x15 #define M41T83_REGADDR_ALARM2MONTH 0x14 +//UEFI SPEC 2.7,page 295 +#define TIME_ZONE_MIN -1440 +#define TIME_ZONE_MAX 1440 + typedef union { struct { UINT8 TD0:1; diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c index 1f50ad4b64..a2063aff76 100644 --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c @@ -32,6 +32,9 @@ extern I2C_DEVICE gRtcDevice; STATIC EFI_LOCK mRtcLock; +STATIC CONST CHAR16 mTimeZoneVariableName[] = L"M41T83RtcTimeZone"; +STATIC CONST CHAR16 mDaylightVariableName[] = L"M41T83RtcDaylight"; + /** Read RTC content through its registers. @@ -182,6 +185,7 @@ LibSetTime ( RTC_M41T83_TIME BcdTime; UINT16 CenturyBase = 2000; UINTN LineNum = 0; + UINTN EpochSeconds; if (NULL == Time) { return EFI_INVALID_PARAMETER; @@ -206,6 +210,21 @@ LibSetTime ( SetMem (&BcdTime, sizeof (RTC_M41T83_TIME), 0); + EpochSeconds = EfiTimeToEpoch (Time); + + // Adjust for the correct time zone, i.e. convert to UTC time zone + if (Time->TimeZone != EFI_UNSPECIFIED_TIMEZONE) { + EpochSeconds -= Time->TimeZone * SEC_PER_MIN; + } + + // Adjust for the correct period + if ((Time->Daylight & EFI_TIME_IN_DAYLIGHT) == EFI_TIME_IN_DAYLIGHT) { + // Convert to un-adjusted time, i.e. fall back one hour + EpochSeconds -= SEC_PER_HOUR; + } + + EpochToEfiTime (EpochSeconds, Time); + // Acquire RTC Lock to make access to RTC atomic if (!EfiAtRuntime ()) { EfiAcquireLock (&mRtcLock); @@ -254,6 +273,43 @@ LibSetTime ( LineNum = __LINE__; goto Exit; } + // Save the current time zone information into non-volatile storage + Status = EfiSetVariable ( + (CHAR16 *)mTimeZoneVariableName, + &gEfiCallerIdGuid, + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, + sizeof (Time->TimeZone), + (VOID *)&(Time->TimeZone) + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "LibSetTime: can not save %s variable to non-volatile storage, Status = %r\n", + mTimeZoneVariableName, + Status + )); + LineNum = __LINE__; + goto Exit; + } + + // Save the current daylight information into non-volatile storage + Status = EfiSetVariable ( + (CHAR16 *)mDaylightVariableName, + &gEfiCallerIdGuid, + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, + sizeof (Time->Daylight), + (VOID *)&(Time->Daylight) + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "LibSetTime: can not to save %s variable to non-volatile storage, Status = %r\n", + mDaylightVariableName, + Status + )); + LineNum = __LINE__; + goto Exit; + } Exit: OemReleaseOwnershipOfRtc (); @@ -295,6 +351,10 @@ LibGetTime ( UINTN LineNum = 0; BOOLEAN IsTimeInvalid = FALSE; UINT8 TimeTemp[7] = {0}; + UINTN EpochSeconds; + INT16 TimeZone; + UINT8 Daylight; + UINTN Size; // Ensure Time is a valid pointer if (Time == NULL) { @@ -336,7 +396,6 @@ LibGetTime ( Time->Hour = BcdToDecimal8 (BcdTime.Hour.Bits.Hours); Time->Minute = BcdToDecimal8 (BcdTime.Minute.Bits.Minutes); Time->Second = BcdToDecimal8 (BcdTime.Second.Bits.Seconds); - Time->TimeZone = EFI_UNSPECIFIED_TIMEZONE; if (!IsTimeValid (Time)) { Status = EFI_DEVICE_ERROR; @@ -345,6 +404,120 @@ LibGetTime ( goto Exit; } + EpochSeconds = EfiTimeToEpoch (Time); + + Size = sizeof (TimeZone); + Status = EfiGetVariable ( + (CHAR16 *)mTimeZoneVariableName, + &gEfiCallerIdGuid, + NULL, + &Size, + (VOID *)&TimeZone + ); + + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "LibGetTime: can not get %s variable, Status = %r\n", + mTimeZoneVariableName, + Status + )); + if (Status != EFI_NOT_FOUND) { + LineNum = __LINE__; + goto Exit; + } + + // The time zone variable does not exist in non-volatile storage, so create it. + Time->TimeZone = EFI_UNSPECIFIED_TIMEZONE; + // Store it + Status = EfiSetVariable ( + (CHAR16 *)mTimeZoneVariableName, + &gEfiCallerIdGuid, + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, + Size, + (VOID *)&(Time->TimeZone) + ); + + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "LibGetTime: can not save %s variable to non-volatile storage, Status = %r\n", + mTimeZoneVariableName, + Status + )); + LineNum = __LINE__; + goto Exit; + } + } else { + // Got the time zone + Time->TimeZone = TimeZone; + + // Check TimeZone bounds: -1440 to 1440 or 2047 + if (((Time->TimeZone < TIME_ZONE_MIN) || (Time->TimeZone > TIME_ZONE_MAX)) + && (Time->TimeZone != EFI_UNSPECIFIED_TIMEZONE)) { + Time->TimeZone = EFI_UNSPECIFIED_TIMEZONE; + } + + // Adjust for the correct time zone + if (Time->TimeZone != EFI_UNSPECIFIED_TIMEZONE) { + EpochSeconds += Time->TimeZone * SEC_PER_MIN; + } + } + + // Get the current daylight information from non-volatile storage + Size = sizeof (Daylight); + Status = EfiGetVariable ( + (CHAR16 *)mDaylightVariableName, + &gEfiCallerIdGuid, + NULL, + &Size, + (VOID *)&Daylight + ); + + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "LibGetTime: Failed to get %s variable, Status = %r\n", + mDaylightVariableName, + Status + )); + if (Status != EFI_NOT_FOUND) { + goto Exit; + } + // The daylight variable does not exist in non-volatile storage, so create it. + Time->Daylight = 0; + // Store it + Status = EfiSetVariable ( + (CHAR16 *)mDaylightVariableName, + &gEfiCallerIdGuid, + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, + Size, + (VOID *)&(Time->Daylight) + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "LibGetTime: can not save %s variable to non-volatile storage, Status = %r\n", + mDaylightVariableName, + Status + )); + LineNum = __LINE__; + goto Exit; + } + } else { + // Got the daylight information + Time->Daylight = Daylight; + + // Adjust for the correct period + if ((Time->Daylight & EFI_TIME_IN_DAYLIGHT) == EFI_TIME_IN_DAYLIGHT) { + // Convert to adjusted time, i.e. spring forwards one hour + EpochSeconds += SEC_PER_HOUR; + } + } + + // Convert from internal 32-bit time to UEFI time + EpochToEfiTime (EpochSeconds, Time); + Exit: OemReleaseOwnershipOfRtc (); // Release RTC Lock. -- 2.18.0 ^ permalink raw reply related [flat|nested] 35+ messages in thread
[parent not found: <20181113235222.amykmhqlh5gltg7p@bivouac.eciton.net>]
* Re: [PATCH edk2-platforms v1 06/12] Silicon/Hisilicon: Modify for SBBR fwts SetTime_Func test case [not found] ` <20181113235222.amykmhqlh5gltg7p@bivouac.eciton.net> @ 2018-11-14 14:31 ` Ming Huang 2018-11-14 17:20 ` Leif Lindholm 0 siblings, 1 reply; 35+ messages in thread From: Ming Huang @ 2018-11-14 14:31 UTC (permalink / raw) To: Leif Lindholm Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On 11/14/2018 7:52 AM, Leif Lindholm wrote: > On Mon, Oct 29, 2018 at 11:32:43AM +0800, Ming Huang wrote: >> There is no variable to keep timezone and daylight, so read it from >> the hardware first and create a new variable to keep it for the next >> gettime process. > > Can you make use of EmbeddedPkg/RealTimeClockRuntimeDxe instead? Do you mean merge this patch into EmbeddedPkg/RealTimeClockRuntimeDxe? > > / > Leif > >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ming Huang <ming.huang@linaro.org> >> --- >> Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf | 2 +- >> Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h | 4 + >> Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c | 175 +++++++++++++++++++- >> 3 files changed, 179 insertions(+), 2 deletions(-) >> >> diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf >> index 4e963fd453..8e559d7b70 100644 >> --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf >> +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf >> @@ -42,4 +42,4 @@ >> UefiRuntimeLib # Use EFiAtRuntime to check stage >> >> [Depex] >> - gEfiCpuArchProtocolGuid >> + gEfiCpuArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid >> diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h >> index f329108858..b95ebc654a 100644 >> --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h >> +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h >> @@ -41,6 +41,10 @@ >> #define M41T83_REGADDR_ALARM2DATE 0x15 >> #define M41T83_REGADDR_ALARM2MONTH 0x14 >> >> +//UEFI SPEC 2.7,page 295 >> +#define TIME_ZONE_MIN -1440 >> +#define TIME_ZONE_MAX 1440 >> + >> typedef union { >> struct { >> UINT8 TD0:1; >> diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c >> index 1f50ad4b64..a2063aff76 100644 >> --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c >> +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c >> @@ -32,6 +32,9 @@ extern I2C_DEVICE gRtcDevice; >> >> STATIC EFI_LOCK mRtcLock; >> >> +STATIC CONST CHAR16 mTimeZoneVariableName[] = L"M41T83RtcTimeZone"; >> +STATIC CONST CHAR16 mDaylightVariableName[] = L"M41T83RtcDaylight"; >> + >> /** >> Read RTC content through its registers. >> >> @@ -182,6 +185,7 @@ LibSetTime ( >> RTC_M41T83_TIME BcdTime; >> UINT16 CenturyBase = 2000; >> UINTN LineNum = 0; >> + UINTN EpochSeconds; >> >> if (NULL == Time) { >> return EFI_INVALID_PARAMETER; >> @@ -206,6 +210,21 @@ LibSetTime ( >> >> SetMem (&BcdTime, sizeof (RTC_M41T83_TIME), 0); >> >> + EpochSeconds = EfiTimeToEpoch (Time); >> + >> + // Adjust for the correct time zone, i.e. convert to UTC time zone >> + if (Time->TimeZone != EFI_UNSPECIFIED_TIMEZONE) { >> + EpochSeconds -= Time->TimeZone * SEC_PER_MIN; >> + } >> + >> + // Adjust for the correct period >> + if ((Time->Daylight & EFI_TIME_IN_DAYLIGHT) == EFI_TIME_IN_DAYLIGHT) { >> + // Convert to un-adjusted time, i.e. fall back one hour >> + EpochSeconds -= SEC_PER_HOUR; >> + } >> + >> + EpochToEfiTime (EpochSeconds, Time); >> + >> // Acquire RTC Lock to make access to RTC atomic >> if (!EfiAtRuntime ()) { >> EfiAcquireLock (&mRtcLock); >> @@ -254,6 +273,43 @@ LibSetTime ( >> LineNum = __LINE__; >> goto Exit; >> } >> + // Save the current time zone information into non-volatile storage >> + Status = EfiSetVariable ( >> + (CHAR16 *)mTimeZoneVariableName, >> + &gEfiCallerIdGuid, >> + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, >> + sizeof (Time->TimeZone), >> + (VOID *)&(Time->TimeZone) >> + ); >> + if (EFI_ERROR (Status)) { >> + DEBUG (( >> + DEBUG_ERROR, >> + "LibSetTime: can not save %s variable to non-volatile storage, Status = %r\n", >> + mTimeZoneVariableName, >> + Status >> + )); >> + LineNum = __LINE__; >> + goto Exit; >> + } >> + >> + // Save the current daylight information into non-volatile storage >> + Status = EfiSetVariable ( >> + (CHAR16 *)mDaylightVariableName, >> + &gEfiCallerIdGuid, >> + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, >> + sizeof (Time->Daylight), >> + (VOID *)&(Time->Daylight) >> + ); >> + if (EFI_ERROR (Status)) { >> + DEBUG (( >> + DEBUG_ERROR, >> + "LibSetTime: can not to save %s variable to non-volatile storage, Status = %r\n", >> + mDaylightVariableName, >> + Status >> + )); >> + LineNum = __LINE__; >> + goto Exit; >> + } >> >> Exit: >> OemReleaseOwnershipOfRtc (); >> @@ -295,6 +351,10 @@ LibGetTime ( >> UINTN LineNum = 0; >> BOOLEAN IsTimeInvalid = FALSE; >> UINT8 TimeTemp[7] = {0}; >> + UINTN EpochSeconds; >> + INT16 TimeZone; >> + UINT8 Daylight; >> + UINTN Size; >> >> // Ensure Time is a valid pointer >> if (Time == NULL) { >> @@ -336,7 +396,6 @@ LibGetTime ( >> Time->Hour = BcdToDecimal8 (BcdTime.Hour.Bits.Hours); >> Time->Minute = BcdToDecimal8 (BcdTime.Minute.Bits.Minutes); >> Time->Second = BcdToDecimal8 (BcdTime.Second.Bits.Seconds); >> - Time->TimeZone = EFI_UNSPECIFIED_TIMEZONE; >> >> if (!IsTimeValid (Time)) { >> Status = EFI_DEVICE_ERROR; >> @@ -345,6 +404,120 @@ LibGetTime ( >> goto Exit; >> } >> >> + EpochSeconds = EfiTimeToEpoch (Time); >> + >> + Size = sizeof (TimeZone); >> + Status = EfiGetVariable ( >> + (CHAR16 *)mTimeZoneVariableName, >> + &gEfiCallerIdGuid, >> + NULL, >> + &Size, >> + (VOID *)&TimeZone >> + ); >> + >> + if (EFI_ERROR (Status)) { >> + DEBUG (( >> + DEBUG_ERROR, >> + "LibGetTime: can not get %s variable, Status = %r\n", >> + mTimeZoneVariableName, >> + Status >> + )); >> + if (Status != EFI_NOT_FOUND) { >> + LineNum = __LINE__; >> + goto Exit; >> + } >> + >> + // The time zone variable does not exist in non-volatile storage, so create it. >> + Time->TimeZone = EFI_UNSPECIFIED_TIMEZONE; >> + // Store it >> + Status = EfiSetVariable ( >> + (CHAR16 *)mTimeZoneVariableName, >> + &gEfiCallerIdGuid, >> + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, >> + Size, >> + (VOID *)&(Time->TimeZone) >> + ); >> + >> + if (EFI_ERROR (Status)) { >> + DEBUG (( >> + DEBUG_ERROR, >> + "LibGetTime: can not save %s variable to non-volatile storage, Status = %r\n", >> + mTimeZoneVariableName, >> + Status >> + )); >> + LineNum = __LINE__; >> + goto Exit; >> + } >> + } else { >> + // Got the time zone >> + Time->TimeZone = TimeZone; >> + >> + // Check TimeZone bounds: -1440 to 1440 or 2047 >> + if (((Time->TimeZone < TIME_ZONE_MIN) || (Time->TimeZone > TIME_ZONE_MAX)) >> + && (Time->TimeZone != EFI_UNSPECIFIED_TIMEZONE)) { >> + Time->TimeZone = EFI_UNSPECIFIED_TIMEZONE; >> + } >> + >> + // Adjust for the correct time zone >> + if (Time->TimeZone != EFI_UNSPECIFIED_TIMEZONE) { >> + EpochSeconds += Time->TimeZone * SEC_PER_MIN; >> + } >> + } >> + >> + // Get the current daylight information from non-volatile storage >> + Size = sizeof (Daylight); >> + Status = EfiGetVariable ( >> + (CHAR16 *)mDaylightVariableName, >> + &gEfiCallerIdGuid, >> + NULL, >> + &Size, >> + (VOID *)&Daylight >> + ); >> + >> + if (EFI_ERROR (Status)) { >> + DEBUG (( >> + DEBUG_ERROR, >> + "LibGetTime: Failed to get %s variable, Status = %r\n", >> + mDaylightVariableName, >> + Status >> + )); >> + if (Status != EFI_NOT_FOUND) { >> + goto Exit; >> + } >> + // The daylight variable does not exist in non-volatile storage, so create it. >> + Time->Daylight = 0; >> + // Store it >> + Status = EfiSetVariable ( >> + (CHAR16 *)mDaylightVariableName, >> + &gEfiCallerIdGuid, >> + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, >> + Size, >> + (VOID *)&(Time->Daylight) >> + ); >> + if (EFI_ERROR (Status)) { >> + DEBUG (( >> + DEBUG_ERROR, >> + "LibGetTime: can not save %s variable to non-volatile storage, Status = %r\n", >> + mDaylightVariableName, >> + Status >> + )); >> + LineNum = __LINE__; >> + goto Exit; >> + } >> + } else { >> + // Got the daylight information >> + Time->Daylight = Daylight; >> + >> + // Adjust for the correct period >> + if ((Time->Daylight & EFI_TIME_IN_DAYLIGHT) == EFI_TIME_IN_DAYLIGHT) { >> + // Convert to adjusted time, i.e. spring forwards one hour >> + EpochSeconds += SEC_PER_HOUR; >> + } >> + } >> + >> + // Convert from internal 32-bit time to UEFI time >> + EpochToEfiTime (EpochSeconds, Time); >> + >> Exit: >> OemReleaseOwnershipOfRtc (); >> // Release RTC Lock. >> -- >> 2.18.0 >> ^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 06/12] Silicon/Hisilicon: Modify for SBBR fwts SetTime_Func test case 2018-11-14 14:31 ` Ming Huang @ 2018-11-14 17:20 ` Leif Lindholm 0 siblings, 0 replies; 35+ messages in thread From: Leif Lindholm @ 2018-11-14 17:20 UTC (permalink / raw) To: Ming Huang Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On Wed, Nov 14, 2018 at 10:31:12PM +0800, Ming Huang wrote: > On 11/14/2018 7:52 AM, Leif Lindholm wrote: > > On Mon, Oct 29, 2018 at 11:32:43AM +0800, Ming Huang wrote: > >> There is no variable to keep timezone and daylight, so read it from > >> the hardware first and create a new variable to keep it for the next > >> gettime process. > > > > Can you make use of EmbeddedPkg/RealTimeClockRuntimeDxe instead? > > Do you mean merge this patch into EmbeddedPkg/RealTimeClockRuntimeDxe? If that makes sense. Certainly the bits that deal with saving timezone ariables should be in core rather than in a component-specific library. It already has NON_VOLATILE_TIME_SETTINGS. / Leif > > > > / > > Leif > > > >> Contributed-under: TianoCore Contribution Agreement 1.1 > >> Signed-off-by: Ming Huang <ming.huang@linaro.org> > >> --- > >> Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf | 2 +- > >> Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h | 4 + > >> Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c | 175 +++++++++++++++++++- > >> 3 files changed, 179 insertions(+), 2 deletions(-) > >> > >> diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf > >> index 4e963fd453..8e559d7b70 100644 > >> --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf > >> +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf > >> @@ -42,4 +42,4 @@ > >> UefiRuntimeLib # Use EFiAtRuntime to check stage > >> > >> [Depex] > >> - gEfiCpuArchProtocolGuid > >> + gEfiCpuArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid > >> diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h > >> index f329108858..b95ebc654a 100644 > >> --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h > >> +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h > >> @@ -41,6 +41,10 @@ > >> #define M41T83_REGADDR_ALARM2DATE 0x15 > >> #define M41T83_REGADDR_ALARM2MONTH 0x14 > >> > >> +//UEFI SPEC 2.7,page 295 > >> +#define TIME_ZONE_MIN -1440 > >> +#define TIME_ZONE_MAX 1440 > >> + > >> typedef union { > >> struct { > >> UINT8 TD0:1; > >> diff --git a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c > >> index 1f50ad4b64..a2063aff76 100644 > >> --- a/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c > >> +++ b/Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c > >> @@ -32,6 +32,9 @@ extern I2C_DEVICE gRtcDevice; > >> > >> STATIC EFI_LOCK mRtcLock; > >> > >> +STATIC CONST CHAR16 mTimeZoneVariableName[] = L"M41T83RtcTimeZone"; > >> +STATIC CONST CHAR16 mDaylightVariableName[] = L"M41T83RtcDaylight"; > >> + > >> /** > >> Read RTC content through its registers. > >> > >> @@ -182,6 +185,7 @@ LibSetTime ( > >> RTC_M41T83_TIME BcdTime; > >> UINT16 CenturyBase = 2000; > >> UINTN LineNum = 0; > >> + UINTN EpochSeconds; > >> > >> if (NULL == Time) { > >> return EFI_INVALID_PARAMETER; > >> @@ -206,6 +210,21 @@ LibSetTime ( > >> > >> SetMem (&BcdTime, sizeof (RTC_M41T83_TIME), 0); > >> > >> + EpochSeconds = EfiTimeToEpoch (Time); > >> + > >> + // Adjust for the correct time zone, i.e. convert to UTC time zone > >> + if (Time->TimeZone != EFI_UNSPECIFIED_TIMEZONE) { > >> + EpochSeconds -= Time->TimeZone * SEC_PER_MIN; > >> + } > >> + > >> + // Adjust for the correct period > >> + if ((Time->Daylight & EFI_TIME_IN_DAYLIGHT) == EFI_TIME_IN_DAYLIGHT) { > >> + // Convert to un-adjusted time, i.e. fall back one hour > >> + EpochSeconds -= SEC_PER_HOUR; > >> + } > >> + > >> + EpochToEfiTime (EpochSeconds, Time); > >> + > >> // Acquire RTC Lock to make access to RTC atomic > >> if (!EfiAtRuntime ()) { > >> EfiAcquireLock (&mRtcLock); > >> @@ -254,6 +273,43 @@ LibSetTime ( > >> LineNum = __LINE__; > >> goto Exit; > >> } > >> + // Save the current time zone information into non-volatile storage > >> + Status = EfiSetVariable ( > >> + (CHAR16 *)mTimeZoneVariableName, > >> + &gEfiCallerIdGuid, > >> + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, > >> + sizeof (Time->TimeZone), > >> + (VOID *)&(Time->TimeZone) > >> + ); > >> + if (EFI_ERROR (Status)) { > >> + DEBUG (( > >> + DEBUG_ERROR, > >> + "LibSetTime: can not save %s variable to non-volatile storage, Status = %r\n", > >> + mTimeZoneVariableName, > >> + Status > >> + )); > >> + LineNum = __LINE__; > >> + goto Exit; > >> + } > >> + > >> + // Save the current daylight information into non-volatile storage > >> + Status = EfiSetVariable ( > >> + (CHAR16 *)mDaylightVariableName, > >> + &gEfiCallerIdGuid, > >> + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, > >> + sizeof (Time->Daylight), > >> + (VOID *)&(Time->Daylight) > >> + ); > >> + if (EFI_ERROR (Status)) { > >> + DEBUG (( > >> + DEBUG_ERROR, > >> + "LibSetTime: can not to save %s variable to non-volatile storage, Status = %r\n", > >> + mDaylightVariableName, > >> + Status > >> + )); > >> + LineNum = __LINE__; > >> + goto Exit; > >> + } > >> > >> Exit: > >> OemReleaseOwnershipOfRtc (); > >> @@ -295,6 +351,10 @@ LibGetTime ( > >> UINTN LineNum = 0; > >> BOOLEAN IsTimeInvalid = FALSE; > >> UINT8 TimeTemp[7] = {0}; > >> + UINTN EpochSeconds; > >> + INT16 TimeZone; > >> + UINT8 Daylight; > >> + UINTN Size; > >> > >> // Ensure Time is a valid pointer > >> if (Time == NULL) { > >> @@ -336,7 +396,6 @@ LibGetTime ( > >> Time->Hour = BcdToDecimal8 (BcdTime.Hour.Bits.Hours); > >> Time->Minute = BcdToDecimal8 (BcdTime.Minute.Bits.Minutes); > >> Time->Second = BcdToDecimal8 (BcdTime.Second.Bits.Seconds); > >> - Time->TimeZone = EFI_UNSPECIFIED_TIMEZONE; > >> > >> if (!IsTimeValid (Time)) { > >> Status = EFI_DEVICE_ERROR; > >> @@ -345,6 +404,120 @@ LibGetTime ( > >> goto Exit; > >> } > >> > >> + EpochSeconds = EfiTimeToEpoch (Time); > >> + > >> + Size = sizeof (TimeZone); > >> + Status = EfiGetVariable ( > >> + (CHAR16 *)mTimeZoneVariableName, > >> + &gEfiCallerIdGuid, > >> + NULL, > >> + &Size, > >> + (VOID *)&TimeZone > >> + ); > >> + > >> + if (EFI_ERROR (Status)) { > >> + DEBUG (( > >> + DEBUG_ERROR, > >> + "LibGetTime: can not get %s variable, Status = %r\n", > >> + mTimeZoneVariableName, > >> + Status > >> + )); > >> + if (Status != EFI_NOT_FOUND) { > >> + LineNum = __LINE__; > >> + goto Exit; > >> + } > >> + > >> + // The time zone variable does not exist in non-volatile storage, so create it. > >> + Time->TimeZone = EFI_UNSPECIFIED_TIMEZONE; > >> + // Store it > >> + Status = EfiSetVariable ( > >> + (CHAR16 *)mTimeZoneVariableName, > >> + &gEfiCallerIdGuid, > >> + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, > >> + Size, > >> + (VOID *)&(Time->TimeZone) > >> + ); > >> + > >> + if (EFI_ERROR (Status)) { > >> + DEBUG (( > >> + DEBUG_ERROR, > >> + "LibGetTime: can not save %s variable to non-volatile storage, Status = %r\n", > >> + mTimeZoneVariableName, > >> + Status > >> + )); > >> + LineNum = __LINE__; > >> + goto Exit; > >> + } > >> + } else { > >> + // Got the time zone > >> + Time->TimeZone = TimeZone; > >> + > >> + // Check TimeZone bounds: -1440 to 1440 or 2047 > >> + if (((Time->TimeZone < TIME_ZONE_MIN) || (Time->TimeZone > TIME_ZONE_MAX)) > >> + && (Time->TimeZone != EFI_UNSPECIFIED_TIMEZONE)) { > >> + Time->TimeZone = EFI_UNSPECIFIED_TIMEZONE; > >> + } > >> + > >> + // Adjust for the correct time zone > >> + if (Time->TimeZone != EFI_UNSPECIFIED_TIMEZONE) { > >> + EpochSeconds += Time->TimeZone * SEC_PER_MIN; > >> + } > >> + } > >> + > >> + // Get the current daylight information from non-volatile storage > >> + Size = sizeof (Daylight); > >> + Status = EfiGetVariable ( > >> + (CHAR16 *)mDaylightVariableName, > >> + &gEfiCallerIdGuid, > >> + NULL, > >> + &Size, > >> + (VOID *)&Daylight > >> + ); > >> + > >> + if (EFI_ERROR (Status)) { > >> + DEBUG (( > >> + DEBUG_ERROR, > >> + "LibGetTime: Failed to get %s variable, Status = %r\n", > >> + mDaylightVariableName, > >> + Status > >> + )); > >> + if (Status != EFI_NOT_FOUND) { > >> + goto Exit; > >> + } > >> + // The daylight variable does not exist in non-volatile storage, so create it. > >> + Time->Daylight = 0; > >> + // Store it > >> + Status = EfiSetVariable ( > >> + (CHAR16 *)mDaylightVariableName, > >> + &gEfiCallerIdGuid, > >> + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, > >> + Size, > >> + (VOID *)&(Time->Daylight) > >> + ); > >> + if (EFI_ERROR (Status)) { > >> + DEBUG (( > >> + DEBUG_ERROR, > >> + "LibGetTime: can not save %s variable to non-volatile storage, Status = %r\n", > >> + mDaylightVariableName, > >> + Status > >> + )); > >> + LineNum = __LINE__; > >> + goto Exit; > >> + } > >> + } else { > >> + // Got the daylight information > >> + Time->Daylight = Daylight; > >> + > >> + // Adjust for the correct period > >> + if ((Time->Daylight & EFI_TIME_IN_DAYLIGHT) == EFI_TIME_IN_DAYLIGHT) { > >> + // Convert to adjusted time, i.e. spring forwards one hour > >> + EpochSeconds += SEC_PER_HOUR; > >> + } > >> + } > >> + > >> + // Convert from internal 32-bit time to UEFI time > >> + EpochToEfiTime (EpochSeconds, Time); > >> + > >> Exit: > >> OemReleaseOwnershipOfRtc (); > >> // Release RTC Lock. > >> -- > >> 2.18.0 > >> ^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH edk2-platforms v1 07/12] Hisilicon/D0x: Fix secure boot bug in FlashFvbDxe 2018-10-29 3:32 [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Ming Huang ` (5 preceding siblings ...) 2018-10-29 3:32 ` [PATCH edk2-platforms v1 06/12] Silicon/Hisilicon: Modify for SBBR fwts SetTime_Func test case Ming Huang @ 2018-10-29 3:32 ` Ming Huang 2018-11-13 23:57 ` Leif Lindholm 2018-10-29 3:32 ` [PATCH edk2-platforms v1 08/12] Hisilicon/D06: Fix SBBR-SCT AuthVar issue Ming Huang ` (5 subsequent siblings) 12 siblings, 1 reply; 35+ messages in thread From: Ming Huang @ 2018-10-29 3:32 UTC (permalink / raw) To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory Cc: ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56, Ming Huang When SECURE_BOOT_ENABLE is TRUE, FlashFvbDxe should use gEfiAuthenticatedVariableGuid, When SECURE_BOOT_ENABLE is FALSE, gEfiVariableGuid should be used. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org> --- Silicon/Hisilicon/HisiPkg.dec | 1 + Platform/Hisilicon/D03/D03.dsc | 5 +++++ Platform/Hisilicon/D05/D05.dsc | 5 +++++ Platform/Hisilicon/D06/D06.dsc | 5 +++++ Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf | 2 ++ Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c | 14 ++++++++++++-- 6 files changed, 30 insertions(+), 2 deletions(-) diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec index 404a3ae4af..8c197fa3c1 100644 --- a/Silicon/Hisilicon/HisiPkg.dec +++ b/Silicon/Hisilicon/HisiPkg.dec @@ -278,6 +278,7 @@ gHisiTokenSpaceGuid.Pcdsoctype|0|UINT32|0x00000061 gHisiTokenSpaceGuid.PcdSerDesFlowCtrlFlag|0|UINT32|0x40000056 + gHisiTokenSpaceGuid.PcdIsSecureBoot|FALSE|BOOLEAN|0x50000013 [PcdsFeatureFlag] gHisiTokenSpaceGuid.PcdIsItsSupported|FALSE|BOOLEAN|0x00000065 diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index aa1da5d61f..ba3096672d 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -281,6 +281,11 @@ gHisiTokenSpaceGuid.PcdHb0Rb2IoSize|0xffff #64K gHisiTokenSpaceGuid.Pcdsoctype|0x1610 + !if $(SECURE_BOOT_ENABLE) == TRUE + gHisiTokenSpaceGuid.PcdIsSecureBoot|TRUE + !else + gHisiTokenSpaceGuid.PcdIsSecureBoot|FALSE + !endif ################################################################################ # diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 1040466633..b8500cef87 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -422,6 +422,11 @@ gHisiTokenSpaceGuid.PcdHb1Rb7IoSize|0x10000 #64K gHisiTokenSpaceGuid.Pcdsoctype|0x1610 + !if $(SECURE_BOOT_ENABLE) == TRUE + gHisiTokenSpaceGuid.PcdIsSecureBoot|TRUE + !else + gHisiTokenSpaceGuid.PcdIsSecureBoot|FALSE + !endif ################################################################################ # diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc index 1a479c160e..b6ef9fedf0 100644 --- a/Platform/Hisilicon/D06/D06.dsc +++ b/Platform/Hisilicon/D06/D06.dsc @@ -243,6 +243,11 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE gArmTokenSpaceGuid.PcdPciIoTranslation|0x0 + !if $(SECURE_BOOT_ENABLE) == TRUE + gHisiTokenSpaceGuid.PcdIsSecureBoot|TRUE + !else + gHisiTokenSpaceGuid.PcdIsSecureBoot|FALSE + !endif ################################################################################ # diff --git a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf index f8be4741ef..934c86c79b 100644 --- a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf +++ b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf @@ -46,6 +46,7 @@ [Guids] gEfiSystemNvDataFvGuid gEfiVariableGuid + gEfiAuthenticatedVariableGuid [Protocols] gEfiBlockIoProtocolGuid @@ -62,6 +63,7 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked + gHisiTokenSpaceGuid.PcdIsSecureBoot gHisiTokenSpaceGuid.PcdSFCMEM0BaseAddress [Depex] diff --git a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c index e18cc9e06e..309941d6fe 100644 --- a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c +++ b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c @@ -189,7 +189,11 @@ InitializeFvAndVariableStoreHeaders ( // VARIABLE_STORE_HEADER // VariableStoreHeader = (VARIABLE_STORE_HEADER*)((UINTN)Headers + (UINTN)FirmwareVolumeHeader->HeaderLength); - CopyGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid); + if (PcdGetBool (PcdIsSecureBoot)) { + CopyGuid (&VariableStoreHeader->Signature, &gEfiAuthenticatedVariableGuid); + } else { + CopyGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid); + } VariableStoreHeader->Size = PcdGet32(PcdFlashNvStorageVariableSize) - FirmwareVolumeHeader->HeaderLength; VariableStoreHeader->Format = VARIABLE_STORE_FORMATTED; VariableStoreHeader->State = VARIABLE_STORE_HEALTHY; @@ -220,6 +224,7 @@ ValidateFvHeader ( VARIABLE_STORE_HEADER* VariableStoreHeader; UINTN VariableStoreLength; UINTN FvLength; + EFI_GUID *Guid; FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER*)Instance->RegionBaseAddress; @@ -258,7 +263,12 @@ ValidateFvHeader ( VariableStoreHeader = (VARIABLE_STORE_HEADER*)((UINTN)FwVolHeader + (UINTN)FwVolHeader->HeaderLength); // Check the Variable Store Guid - if ( CompareGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid) == FALSE ) + if (PcdGetBool (PcdIsSecureBoot)) { + Guid = &gEfiAuthenticatedVariableGuid; + } else { + Guid = &gEfiVariableGuid; + } + if (CompareGuid (&VariableStoreHeader->Signature, Guid) == FALSE) { DEBUG ((EFI_D_ERROR, "ValidateFvHeader: Variable Store Guid non-compatible\n")); return EFI_NOT_FOUND; -- 2.18.0 ^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 07/12] Hisilicon/D0x: Fix secure boot bug in FlashFvbDxe 2018-10-29 3:32 ` [PATCH edk2-platforms v1 07/12] Hisilicon/D0x: Fix secure boot bug in FlashFvbDxe Ming Huang @ 2018-11-13 23:57 ` Leif Lindholm 2018-11-15 7:09 ` Ming Huang 0 siblings, 1 reply; 35+ messages in thread From: Leif Lindholm @ 2018-11-13 23:57 UTC (permalink / raw) To: Ming Huang Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On Mon, Oct 29, 2018 at 11:32:44AM +0800, Ming Huang wrote: > When SECURE_BOOT_ENABLE is TRUE, FlashFvbDxe should use > gEfiAuthenticatedVariableGuid, When SECURE_BOOT_ENABLE > is FALSE, gEfiVariableGuid should be used. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang <ming.huang@linaro.org> > --- > Silicon/Hisilicon/HisiPkg.dec | 1 + > Platform/Hisilicon/D03/D03.dsc | 5 +++++ > Platform/Hisilicon/D05/D05.dsc | 5 +++++ > Platform/Hisilicon/D06/D06.dsc | 5 +++++ > Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf | 2 ++ > Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c | 14 ++++++++++++-- > 6 files changed, 30 insertions(+), 2 deletions(-) > > diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec > index 404a3ae4af..8c197fa3c1 100644 > --- a/Silicon/Hisilicon/HisiPkg.dec > +++ b/Silicon/Hisilicon/HisiPkg.dec > @@ -278,6 +278,7 @@ > > gHisiTokenSpaceGuid.Pcdsoctype|0|UINT32|0x00000061 > gHisiTokenSpaceGuid.PcdSerDesFlowCtrlFlag|0|UINT32|0x40000056 > + gHisiTokenSpaceGuid.PcdIsSecureBoot|FALSE|BOOLEAN|0x50000013 Why a token ID completely separate from the surrounding ones? > > [PcdsFeatureFlag] > gHisiTokenSpaceGuid.PcdIsItsSupported|FALSE|BOOLEAN|0x00000065 > diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc > index aa1da5d61f..ba3096672d 100644 > --- a/Platform/Hisilicon/D03/D03.dsc > +++ b/Platform/Hisilicon/D03/D03.dsc > @@ -281,6 +281,11 @@ > gHisiTokenSpaceGuid.PcdHb0Rb2IoSize|0xffff #64K > > gHisiTokenSpaceGuid.Pcdsoctype|0x1610 > + !if $(SECURE_BOOT_ENABLE) == TRUE > + gHisiTokenSpaceGuid.PcdIsSecureBoot|TRUE > + !else > + gHisiTokenSpaceGuid.PcdIsSecureBoot|FALSE > + !endif > > ################################################################################ > # > diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc > index 1040466633..b8500cef87 100644 > --- a/Platform/Hisilicon/D05/D05.dsc > +++ b/Platform/Hisilicon/D05/D05.dsc > @@ -422,6 +422,11 @@ > gHisiTokenSpaceGuid.PcdHb1Rb7IoSize|0x10000 #64K > > gHisiTokenSpaceGuid.Pcdsoctype|0x1610 > + !if $(SECURE_BOOT_ENABLE) == TRUE > + gHisiTokenSpaceGuid.PcdIsSecureBoot|TRUE > + !else > + gHisiTokenSpaceGuid.PcdIsSecureBoot|FALSE > + !endif > > ################################################################################ > # > diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc > index 1a479c160e..b6ef9fedf0 100644 > --- a/Platform/Hisilicon/D06/D06.dsc > +++ b/Platform/Hisilicon/D06/D06.dsc > @@ -243,6 +243,11 @@ > > gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE > gArmTokenSpaceGuid.PcdPciIoTranslation|0x0 > + !if $(SECURE_BOOT_ENABLE) == TRUE > + gHisiTokenSpaceGuid.PcdIsSecureBoot|TRUE > + !else > + gHisiTokenSpaceGuid.PcdIsSecureBoot|FALSE > + !endif > > ################################################################################ > # > diff --git a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf > index f8be4741ef..934c86c79b 100644 > --- a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf > +++ b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf > @@ -46,6 +46,7 @@ > [Guids] > gEfiSystemNvDataFvGuid > gEfiVariableGuid > + gEfiAuthenticatedVariableGuid Please move up two lines to insert sorted. / Leif > > [Protocols] > gEfiBlockIoProtocolGuid > @@ -62,6 +63,7 @@ > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize > > gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked > + gHisiTokenSpaceGuid.PcdIsSecureBoot > gHisiTokenSpaceGuid.PcdSFCMEM0BaseAddress > > [Depex] > diff --git a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c > index e18cc9e06e..309941d6fe 100644 > --- a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c > +++ b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c > @@ -189,7 +189,11 @@ InitializeFvAndVariableStoreHeaders ( > // VARIABLE_STORE_HEADER > // > VariableStoreHeader = (VARIABLE_STORE_HEADER*)((UINTN)Headers + (UINTN)FirmwareVolumeHeader->HeaderLength); > - CopyGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid); > + if (PcdGetBool (PcdIsSecureBoot)) { > + CopyGuid (&VariableStoreHeader->Signature, &gEfiAuthenticatedVariableGuid); > + } else { > + CopyGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid); > + } > VariableStoreHeader->Size = PcdGet32(PcdFlashNvStorageVariableSize) - FirmwareVolumeHeader->HeaderLength; > VariableStoreHeader->Format = VARIABLE_STORE_FORMATTED; > VariableStoreHeader->State = VARIABLE_STORE_HEALTHY; > @@ -220,6 +224,7 @@ ValidateFvHeader ( > VARIABLE_STORE_HEADER* VariableStoreHeader; > UINTN VariableStoreLength; > UINTN FvLength; > + EFI_GUID *Guid; > > FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER*)Instance->RegionBaseAddress; > > @@ -258,7 +263,12 @@ ValidateFvHeader ( > VariableStoreHeader = (VARIABLE_STORE_HEADER*)((UINTN)FwVolHeader + (UINTN)FwVolHeader->HeaderLength); > > // Check the Variable Store Guid > - if ( CompareGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid) == FALSE ) > + if (PcdGetBool (PcdIsSecureBoot)) { > + Guid = &gEfiAuthenticatedVariableGuid; > + } else { > + Guid = &gEfiVariableGuid; > + } > + if (CompareGuid (&VariableStoreHeader->Signature, Guid) == FALSE) > { > DEBUG ((EFI_D_ERROR, "ValidateFvHeader: Variable Store Guid non-compatible\n")); > return EFI_NOT_FOUND; > -- > 2.18.0 > ^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 07/12] Hisilicon/D0x: Fix secure boot bug in FlashFvbDxe 2018-11-13 23:57 ` Leif Lindholm @ 2018-11-15 7:09 ` Ming Huang 0 siblings, 0 replies; 35+ messages in thread From: Ming Huang @ 2018-11-15 7:09 UTC (permalink / raw) To: Leif Lindholm Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On 11/14/2018 7:57 AM, Leif Lindholm wrote: > On Mon, Oct 29, 2018 at 11:32:44AM +0800, Ming Huang wrote: >> When SECURE_BOOT_ENABLE is TRUE, FlashFvbDxe should use >> gEfiAuthenticatedVariableGuid, When SECURE_BOOT_ENABLE >> is FALSE, gEfiVariableGuid should be used. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ming Huang <ming.huang@linaro.org> >> --- >> Silicon/Hisilicon/HisiPkg.dec | 1 + >> Platform/Hisilicon/D03/D03.dsc | 5 +++++ >> Platform/Hisilicon/D05/D05.dsc | 5 +++++ >> Platform/Hisilicon/D06/D06.dsc | 5 +++++ >> Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf | 2 ++ >> Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c | 14 ++++++++++++-- >> 6 files changed, 30 insertions(+), 2 deletions(-) >> >> diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec >> index 404a3ae4af..8c197fa3c1 100644 >> --- a/Silicon/Hisilicon/HisiPkg.dec >> +++ b/Silicon/Hisilicon/HisiPkg.dec >> @@ -278,6 +278,7 @@ >> >> gHisiTokenSpaceGuid.Pcdsoctype|0|UINT32|0x00000061 >> gHisiTokenSpaceGuid.PcdSerDesFlowCtrlFlag|0|UINT32|0x40000056 >> + gHisiTokenSpaceGuid.PcdIsSecureBoot|FALSE|BOOLEAN|0x50000013 > > Why a token ID completely separate from the surrounding ones? I add this Pcd in another .dec file and then move it to HisiPkg.dec. I will modify the token ID. > >> >> [PcdsFeatureFlag] >> gHisiTokenSpaceGuid.PcdIsItsSupported|FALSE|BOOLEAN|0x00000065 >> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc >> index aa1da5d61f..ba3096672d 100644 >> --- a/Platform/Hisilicon/D03/D03.dsc >> +++ b/Platform/Hisilicon/D03/D03.dsc >> @@ -281,6 +281,11 @@ >> gHisiTokenSpaceGuid.PcdHb0Rb2IoSize|0xffff #64K >> >> gHisiTokenSpaceGuid.Pcdsoctype|0x1610 >> + !if $(SECURE_BOOT_ENABLE) == TRUE >> + gHisiTokenSpaceGuid.PcdIsSecureBoot|TRUE >> + !else >> + gHisiTokenSpaceGuid.PcdIsSecureBoot|FALSE >> + !endif >> >> ################################################################################ >> # >> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc >> index 1040466633..b8500cef87 100644 >> --- a/Platform/Hisilicon/D05/D05.dsc >> +++ b/Platform/Hisilicon/D05/D05.dsc >> @@ -422,6 +422,11 @@ >> gHisiTokenSpaceGuid.PcdHb1Rb7IoSize|0x10000 #64K >> >> gHisiTokenSpaceGuid.Pcdsoctype|0x1610 >> + !if $(SECURE_BOOT_ENABLE) == TRUE >> + gHisiTokenSpaceGuid.PcdIsSecureBoot|TRUE >> + !else >> + gHisiTokenSpaceGuid.PcdIsSecureBoot|FALSE >> + !endif >> >> ################################################################################ >> # >> diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc >> index 1a479c160e..b6ef9fedf0 100644 >> --- a/Platform/Hisilicon/D06/D06.dsc >> +++ b/Platform/Hisilicon/D06/D06.dsc >> @@ -243,6 +243,11 @@ >> >> gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE >> gArmTokenSpaceGuid.PcdPciIoTranslation|0x0 >> + !if $(SECURE_BOOT_ENABLE) == TRUE >> + gHisiTokenSpaceGuid.PcdIsSecureBoot|TRUE >> + !else >> + gHisiTokenSpaceGuid.PcdIsSecureBoot|FALSE >> + !endif >> >> ################################################################################ >> # >> diff --git a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf >> index f8be4741ef..934c86c79b 100644 >> --- a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf >> +++ b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf >> @@ -46,6 +46,7 @@ >> [Guids] >> gEfiSystemNvDataFvGuid >> gEfiVariableGuid >> + gEfiAuthenticatedVariableGuid > > Please move up two lines to insert sorted. > > / > Leif > >> >> [Protocols] >> gEfiBlockIoProtocolGuid >> @@ -62,6 +63,7 @@ >> gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize >> >> gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked >> + gHisiTokenSpaceGuid.PcdIsSecureBoot >> gHisiTokenSpaceGuid.PcdSFCMEM0BaseAddress >> >> [Depex] >> diff --git a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c >> index e18cc9e06e..309941d6fe 100644 >> --- a/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c >> +++ b/Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c >> @@ -189,7 +189,11 @@ InitializeFvAndVariableStoreHeaders ( >> // VARIABLE_STORE_HEADER >> // >> VariableStoreHeader = (VARIABLE_STORE_HEADER*)((UINTN)Headers + (UINTN)FirmwareVolumeHeader->HeaderLength); >> - CopyGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid); >> + if (PcdGetBool (PcdIsSecureBoot)) { >> + CopyGuid (&VariableStoreHeader->Signature, &gEfiAuthenticatedVariableGuid); >> + } else { >> + CopyGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid); >> + } >> VariableStoreHeader->Size = PcdGet32(PcdFlashNvStorageVariableSize) - FirmwareVolumeHeader->HeaderLength; >> VariableStoreHeader->Format = VARIABLE_STORE_FORMATTED; >> VariableStoreHeader->State = VARIABLE_STORE_HEALTHY; >> @@ -220,6 +224,7 @@ ValidateFvHeader ( >> VARIABLE_STORE_HEADER* VariableStoreHeader; >> UINTN VariableStoreLength; >> UINTN FvLength; >> + EFI_GUID *Guid; >> >> FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER*)Instance->RegionBaseAddress; >> >> @@ -258,7 +263,12 @@ ValidateFvHeader ( >> VariableStoreHeader = (VARIABLE_STORE_HEADER*)((UINTN)FwVolHeader + (UINTN)FwVolHeader->HeaderLength); >> >> // Check the Variable Store Guid >> - if ( CompareGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid) == FALSE ) >> + if (PcdGetBool (PcdIsSecureBoot)) { >> + Guid = &gEfiAuthenticatedVariableGuid; >> + } else { >> + Guid = &gEfiVariableGuid; >> + } >> + if (CompareGuid (&VariableStoreHeader->Signature, Guid) == FALSE) >> { >> DEBUG ((EFI_D_ERROR, "ValidateFvHeader: Variable Store Guid non-compatible\n")); >> return EFI_NOT_FOUND; >> -- >> 2.18.0 >> ^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH edk2-platforms v1 08/12] Hisilicon/D06: Fix SBBR-SCT AuthVar issue 2018-10-29 3:32 [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Ming Huang ` (6 preceding siblings ...) 2018-10-29 3:32 ` [PATCH edk2-platforms v1 07/12] Hisilicon/D0x: Fix secure boot bug in FlashFvbDxe Ming Huang @ 2018-10-29 3:32 ` Ming Huang 2018-11-14 0:18 ` Leif Lindholm 2018-10-29 3:32 ` [PATCH edk2-platforms v1 09/12] Silicon/Hisilicon/D06: Reserve ECAM resource in DSDT Ming Huang ` (4 subsequent siblings) 12 siblings, 1 reply; 35+ messages in thread From: Ming Huang @ 2018-10-29 3:32 UTC (permalink / raw) To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory Cc: ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56, Ming Huang Enable secure boot to fix AuthVar issue: RT.SetVariable - Set Invalid Time Base Auth Variable – FAILURE; RT.SetVariable - Create one Time Base Auth Variable, the expect return status should be EFI_SUCCESS – FAILURE. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org> --- Silicon/Hisilicon/Hisilicon.dsc.inc | 16 ++++++++++++++++ Platform/Hisilicon/D06/D06.dsc | 2 +- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc index 3ac8e20232..6515c0d703 100644 --- a/Silicon/Hisilicon/Hisilicon.dsc.inc +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc @@ -89,8 +89,15 @@ SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf +!if $(SECURE_BOOT_ENABLE) == TRUE + TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf + AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf + # re-use the UserPhysicalPresent() dummy implementation from the ovmf tree + PlatformSecureLib|OvmfPkg/Library/PlatformSecureLib/PlatformSecureLib.inf +!else TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf +!endif # BDS Libraries FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf @@ -217,6 +224,9 @@ !if $(TARGET) != RELEASE DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf !endif +!if $(SECURE_BOOT_ENABLE) == TRUE + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf +!endif [LibraryClasses.AARCH64] ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf @@ -326,6 +336,12 @@ gEmbeddedTokenSpaceGuid.PcdTimerPeriod|10000 gArmTokenSpaceGuid.PcdVFPEnabled|1 gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|32 +!if $(SECURE_BOOT_ENABLE) == TRUE + # override the default values from SecurityPkg to ensure images from all sources are verified in secure boot + gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04 + gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04 + gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04 +!endif [PcdsDynamicHii.common.DEFAULT] gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|10 # Variable: L"Timeout" diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc index b6ef9fedf0..8ee20342b1 100644 --- a/Platform/Hisilicon/D06/D06.dsc +++ b/Platform/Hisilicon/D06/D06.dsc @@ -30,7 +30,7 @@ FLASH_DEFINITION = Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf DEFINE NETWORK_IP6_ENABLE = FALSE DEFINE HTTP_BOOT_ENABLE = FALSE - DEFINE SECURE_BOOT_ENABLE = FALSE + DEFINE SECURE_BOOT_ENABLE = TRUE !include Silicon/Hisilicon/Hisilicon.dsc.inc -- 2.18.0 ^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 08/12] Hisilicon/D06: Fix SBBR-SCT AuthVar issue 2018-10-29 3:32 ` [PATCH edk2-platforms v1 08/12] Hisilicon/D06: Fix SBBR-SCT AuthVar issue Ming Huang @ 2018-11-14 0:18 ` Leif Lindholm 2018-11-14 14:31 ` Ming Huang 0 siblings, 1 reply; 35+ messages in thread From: Leif Lindholm @ 2018-11-14 0:18 UTC (permalink / raw) To: Ming Huang Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On Mon, Oct 29, 2018 at 11:32:45AM +0800, Ming Huang wrote: > Enable secure boot to fix AuthVar issue: > RT.SetVariable - Set Invalid Time Base Auth Variable – FAILURE; > RT.SetVariable - Create one Time Base Auth Variable, the expect return > status should be EFI_SUCCESS – FAILURE. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang <ming.huang@linaro.org> > --- > Silicon/Hisilicon/Hisilicon.dsc.inc | 16 ++++++++++++++++ > Platform/Hisilicon/D06/D06.dsc | 2 +- > 2 files changed, 17 insertions(+), 1 deletion(-) > > diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc > index 3ac8e20232..6515c0d703 100644 > --- a/Silicon/Hisilicon/Hisilicon.dsc.inc > +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc > @@ -89,8 +89,15 @@ > > SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf > > +!if $(SECURE_BOOT_ENABLE) == TRUE > + TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf > + AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf > + # re-use the UserPhysicalPresent() dummy implementation from the ovmf tree > + PlatformSecureLib|OvmfPkg/Library/PlatformSecureLib/PlatformSecureLib.inf The virtual machines and development boards can get away with this, but it is not an appropriate action for a real platform. Please implement a real PlatformSecureLib, doing a real UserPhysicalPresent check, appropriate to the D06. I don't expect this to happen in time for a 2018.11 Linaro release, so you can drop it from the set. We can log the test failure as a known issue for now. / Leif > +!else > TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf > AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf > +!endif > > # BDS Libraries > FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf > @@ -217,6 +224,9 @@ > !if $(TARGET) != RELEASE > DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf > !endif > +!if $(SECURE_BOOT_ENABLE) == TRUE > + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf > +!endif > > [LibraryClasses.AARCH64] > ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf > @@ -326,6 +336,12 @@ > gEmbeddedTokenSpaceGuid.PcdTimerPeriod|10000 > gArmTokenSpaceGuid.PcdVFPEnabled|1 > gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|32 > +!if $(SECURE_BOOT_ENABLE) == TRUE > + # override the default values from SecurityPkg to ensure images from all sources are verified in secure boot > + gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04 > + gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04 > + gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04 > +!endif > > [PcdsDynamicHii.common.DEFAULT] > gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|10 # Variable: L"Timeout" > diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc > index b6ef9fedf0..8ee20342b1 100644 > --- a/Platform/Hisilicon/D06/D06.dsc > +++ b/Platform/Hisilicon/D06/D06.dsc > @@ -30,7 +30,7 @@ > FLASH_DEFINITION = Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf > DEFINE NETWORK_IP6_ENABLE = FALSE > DEFINE HTTP_BOOT_ENABLE = FALSE > - DEFINE SECURE_BOOT_ENABLE = FALSE > + DEFINE SECURE_BOOT_ENABLE = TRUE > > !include Silicon/Hisilicon/Hisilicon.dsc.inc > > -- > 2.18.0 > ^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 08/12] Hisilicon/D06: Fix SBBR-SCT AuthVar issue 2018-11-14 0:18 ` Leif Lindholm @ 2018-11-14 14:31 ` Ming Huang 0 siblings, 0 replies; 35+ messages in thread From: Ming Huang @ 2018-11-14 14:31 UTC (permalink / raw) To: Leif Lindholm Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On 11/14/2018 8:18 AM, Leif Lindholm wrote: > On Mon, Oct 29, 2018 at 11:32:45AM +0800, Ming Huang wrote: >> Enable secure boot to fix AuthVar issue: >> RT.SetVariable - Set Invalid Time Base Auth Variable – FAILURE; >> RT.SetVariable - Create one Time Base Auth Variable, the expect return >> status should be EFI_SUCCESS – FAILURE. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ming Huang <ming.huang@linaro.org> >> --- >> Silicon/Hisilicon/Hisilicon.dsc.inc | 16 ++++++++++++++++ >> Platform/Hisilicon/D06/D06.dsc | 2 +- >> 2 files changed, 17 insertions(+), 1 deletion(-) >> >> diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc >> index 3ac8e20232..6515c0d703 100644 >> --- a/Silicon/Hisilicon/Hisilicon.dsc.inc >> +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc >> @@ -89,8 +89,15 @@ >> >> SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf >> >> +!if $(SECURE_BOOT_ENABLE) == TRUE >> + TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf >> + AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf > >> + # re-use the UserPhysicalPresent() dummy implementation from the ovmf tree >> + PlatformSecureLib|OvmfPkg/Library/PlatformSecureLib/PlatformSecureLib.inf > > The virtual machines and development boards can get away with this, > but it is not an appropriate action for a real platform. > Please implement a real PlatformSecureLib, doing a real > UserPhysicalPresent check, appropriate to the D06. > > I don't expect this to happen in time for a 2018.11 Linaro release, so > you can drop it from the set. We can log the test failure as a known > issue for now. Ok, I will drop this patch in v2. > > / > Leif > >> +!else >> TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf >> AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf >> +!endif >> >> # BDS Libraries >> FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf >> @@ -217,6 +224,9 @@ >> !if $(TARGET) != RELEASE >> DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf >> !endif >> +!if $(SECURE_BOOT_ENABLE) == TRUE >> + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf >> +!endif >> >> [LibraryClasses.AARCH64] >> ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf >> @@ -326,6 +336,12 @@ >> gEmbeddedTokenSpaceGuid.PcdTimerPeriod|10000 >> gArmTokenSpaceGuid.PcdVFPEnabled|1 >> gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|32 >> +!if $(SECURE_BOOT_ENABLE) == TRUE >> + # override the default values from SecurityPkg to ensure images from all sources are verified in secure boot >> + gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04 >> + gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04 >> + gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04 >> +!endif >> >> [PcdsDynamicHii.common.DEFAULT] >> gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|10 # Variable: L"Timeout" >> diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc >> index b6ef9fedf0..8ee20342b1 100644 >> --- a/Platform/Hisilicon/D06/D06.dsc >> +++ b/Platform/Hisilicon/D06/D06.dsc >> @@ -30,7 +30,7 @@ >> FLASH_DEFINITION = Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf >> DEFINE NETWORK_IP6_ENABLE = FALSE >> DEFINE HTTP_BOOT_ENABLE = FALSE >> - DEFINE SECURE_BOOT_ENABLE = FALSE >> + DEFINE SECURE_BOOT_ENABLE = TRUE >> >> !include Silicon/Hisilicon/Hisilicon.dsc.inc >> >> -- >> 2.18.0 >> ^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH edk2-platforms v1 09/12] Silicon/Hisilicon/D06: Reserve ECAM resource in DSDT 2018-10-29 3:32 [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Ming Huang ` (7 preceding siblings ...) 2018-10-29 3:32 ` [PATCH edk2-platforms v1 08/12] Hisilicon/D06: Fix SBBR-SCT AuthVar issue Ming Huang @ 2018-10-29 3:32 ` Ming Huang 2018-11-14 0:23 ` Leif Lindholm 2018-10-29 3:32 ` [PATCH edk2-platforms v1 10/12] Silicon/Hisilicon/D06: Modify GTDT timer flag Ming Huang ` (3 subsequent siblings) 12 siblings, 1 reply; 35+ messages in thread From: Ming Huang @ 2018-10-29 3:32 UTC (permalink / raw) To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory Cc: ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56, Ming Huang Reserve ECAM resource in DSDT for clearing off bug output in kernel dmesg: acpi PNP0A08:00: [Firmware Bug]: ECAM area [mem 0xd0000000-0xd3ffffff] not reserved in ACPI namespace. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org> --- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl index 8e3547926a..87a2da8843 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl @@ -1213,4 +1213,12 @@ Device (PCIB) Return(0x03) } } + +Device (RESP) //reserve for ecam resource + { + Name (_HID, "PNP0C02") + Name (_CRS, ResourceTemplate (){ + Memory32Fixed (ReadWrite, 0xd0000000, 0x10000000) + }) + } } -- 2.18.0 ^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 09/12] Silicon/Hisilicon/D06: Reserve ECAM resource in DSDT 2018-10-29 3:32 ` [PATCH edk2-platforms v1 09/12] Silicon/Hisilicon/D06: Reserve ECAM resource in DSDT Ming Huang @ 2018-11-14 0:23 ` Leif Lindholm 0 siblings, 0 replies; 35+ messages in thread From: Leif Lindholm @ 2018-11-14 0:23 UTC (permalink / raw) To: Ming Huang Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On Mon, Oct 29, 2018 at 11:32:46AM +0800, Ming Huang wrote: > Reserve ECAM resource in DSDT for clearing off bug output in > kernel dmesg: > acpi PNP0A08:00: [Firmware Bug]: ECAM area [mem > 0xd0000000-0xd3ffffff] not reserved in ACPI namespace. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang <ming.huang@linaro.org> After Ard pointed me to linux/Documentation/PCI/acpi-info.txt: Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> > --- > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl > index 8e3547926a..87a2da8843 100644 > --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl > +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl > @@ -1213,4 +1213,12 @@ Device (PCIB) > Return(0x03) > } > } > + > +Device (RESP) //reserve for ecam resource > + { > + Name (_HID, "PNP0C02") > + Name (_CRS, ResourceTemplate (){ > + Memory32Fixed (ReadWrite, 0xd0000000, 0x10000000) > + }) > + } > } > -- > 2.18.0 > ^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH edk2-platforms v1 10/12] Silicon/Hisilicon/D06: Modify GTDT timer flag 2018-10-29 3:32 [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Ming Huang ` (8 preceding siblings ...) 2018-10-29 3:32 ` [PATCH edk2-platforms v1 09/12] Silicon/Hisilicon/D06: Reserve ECAM resource in DSDT Ming Huang @ 2018-10-29 3:32 ` Ming Huang 2018-11-14 0:24 ` Leif Lindholm 2018-10-29 3:32 ` [PATCH edk2-platforms v1 11/12] Hisilicon/D06: Modify Gic base Ming Huang ` (2 subsequent siblings) 12 siblings, 1 reply; 35+ messages in thread From: Ming Huang @ 2018-10-29 3:32 UTC (permalink / raw) To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory Cc: ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56, Ming Huang Add always on capibility to GTDT timer flag to fix SBSA 36 fail issue: 36 : SYS Timer if PE Timer not ON PE Timers are not always-on. Failed on PE - 0 for Level= 3 : Result: --FAIL-- 1 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org> --- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc index d07070a912..5cab639cc5 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc @@ -28,8 +28,10 @@ #define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY #define GTDT_TIMER_ACTIVE_HIGH 0 #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF +#define GTDT_TIMER_ALWAYS_ON_CAPABILITY EFI_ACPI_6_2_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY + +#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ALWAYS_ON_CAPABILITY | GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED) -#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED) #define GENERIC_WATCHDOG_CONTROL_BASE_CPU1_TOTEM_A 0x9C200000 #define GENERIC_WATCHDOG_REFRESH_BASE_CPU1_TOTEM_A 0X9C210000 -- 2.18.0 ^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 10/12] Silicon/Hisilicon/D06: Modify GTDT timer flag 2018-10-29 3:32 ` [PATCH edk2-platforms v1 10/12] Silicon/Hisilicon/D06: Modify GTDT timer flag Ming Huang @ 2018-11-14 0:24 ` Leif Lindholm 0 siblings, 0 replies; 35+ messages in thread From: Leif Lindholm @ 2018-11-14 0:24 UTC (permalink / raw) To: Ming Huang Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On Mon, Oct 29, 2018 at 11:32:47AM +0800, Ming Huang wrote: > Add always on capibility to GTDT timer flag to fix SBSA 36 fail > issue: > 36 : SYS Timer if PE Timer not ON > PE Timers are not always-on. > Failed on PE - 0 for Level= 3 : Result: --FAIL-- 1 > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang <ming.huang@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> > --- > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc > index d07070a912..5cab639cc5 100644 > --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc > +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc > @@ -28,8 +28,10 @@ > #define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY > #define GTDT_TIMER_ACTIVE_HIGH 0 > #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF > +#define GTDT_TIMER_ALWAYS_ON_CAPABILITY EFI_ACPI_6_2_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY > + > +#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ALWAYS_ON_CAPABILITY | GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED) > > -#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED) > #define GENERIC_WATCHDOG_CONTROL_BASE_CPU1_TOTEM_A 0x9C200000 > #define GENERIC_WATCHDOG_REFRESH_BASE_CPU1_TOTEM_A 0X9C210000 > > -- > 2.18.0 > ^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH edk2-platforms v1 11/12] Hisilicon/D06: Modify Gic base 2018-10-29 3:32 [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Ming Huang ` (9 preceding siblings ...) 2018-10-29 3:32 ` [PATCH edk2-platforms v1 10/12] Silicon/Hisilicon/D06: Modify GTDT timer flag Ming Huang @ 2018-10-29 3:32 ` Ming Huang 2018-11-14 0:29 ` Leif Lindholm 2018-10-29 3:32 ` [PATCH edk2-platforms v1 12/12] Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot Ming Huang 2018-10-29 11:43 ` [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Leif Lindholm 12 siblings, 1 reply; 35+ messages in thread From: Ming Huang @ 2018-10-29 3:32 UTC (permalink / raw) To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory Cc: ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56, Ming Huang The values of PcdGicInterruptInterfaceBase and GICD are wrong, so modify it. Fix SBSA test case 21: 21 : Check GIC version GIC version is 0 Failed on PE - 0 for Level= 3 : Result: --FAIL-- 2 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org> --- Platform/Hisilicon/D06/D06.dsc | 2 +- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc index 8ee20342b1..6296fcd9ec 100644 --- a/Platform/Hisilicon/D06/D06.dsc +++ b/Platform/Hisilicon/D06/D06.dsc @@ -183,7 +183,7 @@ gHisiTokenSpaceGuid.PcdArmPrimaryCoreTemp|0x80010000 gArmTokenSpaceGuid.PcdGicDistributorBase|0xAE000000 gArmTokenSpaceGuid.PcdGicRedistributorsBase|0xAE100000 - gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xFE000000 + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x9B000000 diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc index 43b43142af..d3de69a3ef 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc @@ -361,7 +361,7 @@ EFI_ACPI_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = { 0x0, 0x0, 25, 0x4000AA000000 + 0x6C0000 /* GicRBase */, 0), }, - EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, 0xAA000000, 0, 0x4), + EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, 0xAE000000, 0, 0x4), { EFI_ACPI_6_1_GIC_ITS_INIT(0,0x202100000), //peri a // EFI_ACPI_6_1_GIC_ITS_INIT(1,0x400202100000), //peri a -- 2.18.0 ^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 11/12] Hisilicon/D06: Modify Gic base 2018-10-29 3:32 ` [PATCH edk2-platforms v1 11/12] Hisilicon/D06: Modify Gic base Ming Huang @ 2018-11-14 0:29 ` Leif Lindholm 2018-11-14 14:31 ` Ming Huang 0 siblings, 1 reply; 35+ messages in thread From: Leif Lindholm @ 2018-11-14 0:29 UTC (permalink / raw) To: Ming Huang Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On Mon, Oct 29, 2018 at 11:32:48AM +0800, Ming Huang wrote: > The values of PcdGicInterruptInterfaceBase and GICD are wrong, so modify it. > Fix SBSA test case 21: > 21 : Check GIC version > GIC version is 0 > Failed on PE - 0 for Level= 3 : Result: --FAIL-- 2 I'm confused here. How could this ever have worked? And what is the change? I see values changing, but what do they mean? / Leif > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang <ming.huang@linaro.org> > --- > Platform/Hisilicon/D06/D06.dsc | 2 +- > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc > index 8ee20342b1..6296fcd9ec 100644 > --- a/Platform/Hisilicon/D06/D06.dsc > +++ b/Platform/Hisilicon/D06/D06.dsc > @@ -183,7 +183,7 @@ > gHisiTokenSpaceGuid.PcdArmPrimaryCoreTemp|0x80010000 > gArmTokenSpaceGuid.PcdGicDistributorBase|0xAE000000 > gArmTokenSpaceGuid.PcdGicRedistributorsBase|0xAE100000 > - gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xFE000000 > + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x9B000000 > > > > diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc > index 43b43142af..d3de69a3ef 100644 > --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc > +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc > @@ -361,7 +361,7 @@ EFI_ACPI_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = { > 0x0, 0x0, 25, 0x4000AA000000 + 0x6C0000 /* GicRBase */, 0), > }, > > - EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, 0xAA000000, 0, 0x4), > + EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, 0xAE000000, 0, 0x4), > { > EFI_ACPI_6_1_GIC_ITS_INIT(0,0x202100000), //peri a > // EFI_ACPI_6_1_GIC_ITS_INIT(1,0x400202100000), //peri a > -- > 2.18.0 > ^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 11/12] Hisilicon/D06: Modify Gic base 2018-11-14 0:29 ` Leif Lindholm @ 2018-11-14 14:31 ` Ming Huang 0 siblings, 0 replies; 35+ messages in thread From: Ming Huang @ 2018-11-14 14:31 UTC (permalink / raw) To: Leif Lindholm Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On 11/14/2018 8:29 AM, Leif Lindholm wrote: > On Mon, Oct 29, 2018 at 11:32:48AM +0800, Ming Huang wrote: >> The values of PcdGicInterruptInterfaceBase and GICD are wrong, so modify it. >> Fix SBSA test case 21: >> 21 : Check GIC version >> GIC version is 0 >> Failed on PE - 0 for Level= 3 : Result: --FAIL-- 2 > > I'm confused here. How could this ever have worked? > And what is the change? I see values changing, but what do they mean? We boot from TB(Totem B,similar to die) originally, then switch to boot from TA. 0xAA000000 is GICD base of TB,0xAE000000 is GICD base of TA, the 0xAE000000 should be used for TA boot, otherwise some feature may not work like this SBSA test case. The PcdGicInterruptInterfaceBase(0xFE000000) is wrong, it just copy from D05/D03, maybe somewhere will need the right value of Pcd. > > / > Leif > >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ming Huang <ming.huang@linaro.org> >> --- >> Platform/Hisilicon/D06/D06.dsc | 2 +- >> Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 2 +- >> 2 files changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc >> index 8ee20342b1..6296fcd9ec 100644 >> --- a/Platform/Hisilicon/D06/D06.dsc >> +++ b/Platform/Hisilicon/D06/D06.dsc >> @@ -183,7 +183,7 @@ >> gHisiTokenSpaceGuid.PcdArmPrimaryCoreTemp|0x80010000 >> gArmTokenSpaceGuid.PcdGicDistributorBase|0xAE000000 >> gArmTokenSpaceGuid.PcdGicRedistributorsBase|0xAE100000 >> - gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xFE000000 >> + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x9B000000 >> >> >> >> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc >> index 43b43142af..d3de69a3ef 100644 >> --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc >> +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc >> @@ -361,7 +361,7 @@ EFI_ACPI_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = { >> 0x0, 0x0, 25, 0x4000AA000000 + 0x6C0000 /* GicRBase */, 0), >> }, >> >> - EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, 0xAA000000, 0, 0x4), >> + EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, 0xAE000000, 0, 0x4), >> { >> EFI_ACPI_6_1_GIC_ITS_INIT(0,0x202100000), //peri a >> // EFI_ACPI_6_1_GIC_ITS_INIT(1,0x400202100000), //peri a >> -- >> 2.18.0 >> ^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH edk2-platforms v1 12/12] Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot 2018-10-29 3:32 [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Ming Huang ` (10 preceding siblings ...) 2018-10-29 3:32 ` [PATCH edk2-platforms v1 11/12] Hisilicon/D06: Modify Gic base Ming Huang @ 2018-10-29 3:32 ` Ming Huang 2018-11-14 0:36 ` Leif Lindholm 2018-10-29 11:43 ` [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Leif Lindholm 12 siblings, 1 reply; 35+ messages in thread From: Ming Huang @ 2018-10-29 3:32 UTC (permalink / raw) To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory Cc: ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56, Ming Huang Linux kernel will recognize NUMA node by processor order, and the Node and PXM number will be not identical between BIOS and OS kernel after changing to TA boot, so adjust the NUMA node number to match. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org> --- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 28 +-- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 18 +- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 194 ++++++++++---------- 3 files changed, 120 insertions(+), 120 deletions(-) diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl index 87a2da8843..27fde2e09b 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl @@ -212,7 +212,7 @@ Scope(_SB) Method (_PXM, 0, NotSerialized) { - Return(0x01) + Return(0x00) } } // Device(PCI0) @@ -262,7 +262,7 @@ Device (PCI1) Method (_PXM, 0, NotSerialized) { - Return(0x01) + Return(0x00) } } // Device(PCI1) @@ -325,7 +325,7 @@ Device (PCI2) Method (_PXM, 0, NotSerialized) { - Return(0x01) + Return(0x00) } } @@ -374,7 +374,7 @@ Device (PCI3) Method (_PXM, 0, NotSerialized) { - Return(0x01) + Return(0x00) } } @@ -423,7 +423,7 @@ Device (PCI4) Method (_PXM, 0, NotSerialized) { - Return(0x01) + Return(0x00) } } @@ -733,7 +733,7 @@ Device (PCI5) Method (_PXM, 0, NotSerialized) { - Return(0x01) + Return(0x00) } } @@ -866,11 +866,11 @@ Device (PCI6) // Never allow SHPC (no SHPC controller in this system) And(CTRL,0x1D,CTRL) - If(LNotEqual(Arg1,One)) { // Unknown revision + If(LNotEqual(Arg1,One)) { // Unknown revision Or(CDW1,0x08,CDW1) } - If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked + If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked Or(CDW1,0x10,CDW1) } @@ -924,7 +924,7 @@ Device (PCI6) Method (_PXM, 0, NotSerialized) { - Return(0x03) + Return(0x02) } } // Device(PCI6) @@ -974,7 +974,7 @@ Device (PCI7) Method (_PXM, 0, NotSerialized) { - Return(0x03) + Return(0x02) } } // Device(PCI7) @@ -1038,7 +1038,7 @@ Device (PCI8) Method (_PXM, 0, NotSerialized) { - Return(0x03) + Return(0x02) } }// Device(PCI8) @@ -1087,7 +1087,7 @@ Device (PCI9) Method (_PXM, 0, NotSerialized) { - Return(0x03) + Return(0x02) } }// Device(PCI9) @@ -1136,7 +1136,7 @@ Device (PCIA) Method (_PXM, 0, NotSerialized) { - Return(0x03) + Return(0x02) } }// Device(PCIA) @@ -1210,7 +1210,7 @@ Device (PCIB) Method (_PXM, 0, NotSerialized) { - Return(0x03) + Return(0x02) } } diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl index 33b5d5250b..29536e6dff 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl @@ -53,7 +53,7 @@ [0004] PRI Interrupt : 00000000 [0004] GERR Interrupt : 00000000 [0004] Sync Interrupt : 00000000 -[0001] Proximity Domain : 01 +[0001] Proximity Domain : 00 [0001] Reserved : 00 [0002] Reserved : 0000 [0004] DeviceID mapping index : 00000002 @@ -99,7 +99,7 @@ [0004] PRI Interrupt : 00000000 [0004] GERR Interrupt : 00000000 [0004] Sync Interrupt : 00000000 -[0001] Proximity Domain : 01 +[0001] Proximity Domain : 00 [0001] Reserved : 00 [0002] Reserved : 0000 [0004] DeviceID mapping index : 0001 @@ -139,7 +139,7 @@ [0004] PRI Interrupt : 00000000 [0004] GERR Interrupt : 00000000 [0004] Sync Interrupt : 00000000 -[0001] Proximity Domain : 01 +[0001] Proximity Domain : 00 [0001] Reserved : 00 [0002] Reserved : 0000 [0004] DeviceID mapping index : 00000001 @@ -179,7 +179,7 @@ [0004] PRI Interrupt : 00000000 [0004] GERR Interrupt : 00000000 [0004] Sync Interrupt : 00000000 -[0001] Proximity Domain : 03 +[0001] Proximity Domain : 02 [0001] Reserved : 00 [0002] Reserved : 0000 [0004] DeviceID mapping index : 00000002 @@ -225,7 +225,7 @@ [0004] PRI Interrupt : 00000000 [0004] GERR Interrupt : 00000000 [0004] Sync Interrupt : 00000000 -[0001] Proximity Domain : 03 +[0001] Proximity Domain : 02 [0001] Reserved : 00 [0002] Reserved : 0000 [0004] DeviceID mapping index : 0001 @@ -265,7 +265,7 @@ [0004] PRI Interrupt : 00000000 [0004] GERR Interrupt : 00000000 [0004] Sync Interrupt : 00000000 -[0001] Proximity Domain : 03 +[0001] Proximity Domain : 02 [0001] Reserved : 00 [0002] Reserved : 0000 [0004] DeviceID mapping index : 00000001 @@ -300,8 +300,8 @@ Read Allocate : 0 Override : 0 [0002] Reserved : 0000 -[0001] Memory Flags (decoded below) : 00 - Coherency : 0 +[0001] Memory Flags (decoded below) : 01 + Coherency : 1 Device Attribute : 0 [0004] ATS Attribute : 00000000 [0004] PCI Segment Number : 00000000 // should match with above MCFG @@ -1921,7 +1921,7 @@ [34Ch 0844 4] Input base : 00000000 [350h 0848 4] ID Count : 00000001 [354h 0852 4] Output Base : 00000100 -[358h 0856 4] Output Reference : 00000100 +[358h 0856 4] Output Reference : 00000138 [35Ch 0860 4] Flags (decoded below) : 00000001 Single Mapping : 1 /* RDE device report++.*/ diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc index aea4c21858..d77bddefc8 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc @@ -55,106 +55,106 @@ EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE Srat = { }, { - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000000,0x00000001,0x00000000), //GICC Affinity Processor 0 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000001,0x00000001,0x00000000), //GICC Affinity Processor 1 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000002,0x00000001,0x00000000), //GICC Affinity Processor 2 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000003,0x00000001,0x00000000), //GICC Affinity Processor 3 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000004,0x00000001,0x00000000), //GICC Affinity Processor 4 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000005,0x00000001,0x00000000), //GICC Affinity Processor 5 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000006,0x00000001,0x00000000), //GICC Affinity Processor 6 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000007,0x00000001,0x00000000), //GICC Affinity Processor 7 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000008,0x00000001,0x00000000), //GICC Affinity Processor 8 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000009,0x00000001,0x00000000), //GICC Affinity Processor 9 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000A,0x00000001,0x00000000), //GICC Affinity Processor 10 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000B,0x00000001,0x00000000), //GICC Affinity Processor 11 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000C,0x00000001,0x00000000), //GICC Affinity Processor 12 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000D,0x00000001,0x00000000), //GICC Affinity Processor 13 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000E,0x00000001,0x00000000), //GICC Affinity Processor 14 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000F,0x00000001,0x00000000), //GICC Affinity Processor 15 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000010,0x00000001,0x00000000), //GICC Affinity Processor 16 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000011,0x00000001,0x00000000), //GICC Affinity Processor 17 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000012,0x00000001,0x00000000), //GICC Affinity Processor 18 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000013,0x00000001,0x00000000), //GICC Affinity Processor 19 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000014,0x00000001,0x00000000), //GICC Affinity Processor 20 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000015,0x00000001,0x00000000), //GICC Affinity Processor 21 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000016,0x00000001,0x00000000), //GICC Affinity Processor 22 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000017,0x00000001,0x00000000), //GICC Affinity Processor 23 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000018,0x00000001,0x00000000), //GICC Affinity Processor 24 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000019,0x00000001,0x00000000), //GICC Affinity Processor 25 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001A,0x00000001,0x00000000), //GICC Affinity Processor 26 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001B,0x00000001,0x00000000), //GICC Affinity Processor 27 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001C,0x00000001,0x00000000), //GICC Affinity Processor 28 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001D,0x00000001,0x00000000), //GICC Affinity Processor 29 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001E,0x00000001,0x00000000), //GICC Affinity Processor 30 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001F,0x00000001,0x00000000), //GICC Affinity Processor 31 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000020,0x00000001,0x00000000), //GICC Affinity Processor 32 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000021,0x00000001,0x00000000), //GICC Affinity Processor 33 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000022,0x00000001,0x00000000), //GICC Affinity Processor 34 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000023,0x00000001,0x00000000), //GICC Affinity Processor 35 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000024,0x00000001,0x00000000), //GICC Affinity Processor 36 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000025,0x00000001,0x00000000), //GICC Affinity Processor 37 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000026,0x00000001,0x00000000), //GICC Affinity Processor 38 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000027,0x00000001,0x00000000), //GICC Affinity Processor 39 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000028,0x00000001,0x00000000), //GICC Affinity Processor 40 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000029,0x00000001,0x00000000), //GICC Affinity Processor 41 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002A,0x00000001,0x00000000), //GICC Affinity Processor 42 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002B,0x00000001,0x00000000), //GICC Affinity Processor 43 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002C,0x00000001,0x00000000), //GICC Affinity Processor 44 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002D,0x00000001,0x00000000), //GICC Affinity Processor 45 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002E,0x00000001,0x00000000), //GICC Affinity Processor 46 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002F,0x00000001,0x00000000), //GICC Affinity Processor 47 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000000,0x00000001,0x00000000), //GICC Affinity Processor 0 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000001,0x00000001,0x00000000), //GICC Affinity Processor 1 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000002,0x00000001,0x00000000), //GICC Affinity Processor 2 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000003,0x00000001,0x00000000), //GICC Affinity Processor 3 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000004,0x00000001,0x00000000), //GICC Affinity Processor 4 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000005,0x00000001,0x00000000), //GICC Affinity Processor 5 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000006,0x00000001,0x00000000), //GICC Affinity Processor 6 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000007,0x00000001,0x00000000), //GICC Affinity Processor 7 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000008,0x00000001,0x00000000), //GICC Affinity Processor 8 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000009,0x00000001,0x00000000), //GICC Affinity Processor 9 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000A,0x00000001,0x00000000), //GICC Affinity Processor 10 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000B,0x00000001,0x00000000), //GICC Affinity Processor 11 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000C,0x00000001,0x00000000), //GICC Affinity Processor 12 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000D,0x00000001,0x00000000), //GICC Affinity Processor 13 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000E,0x00000001,0x00000000), //GICC Affinity Processor 14 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000F,0x00000001,0x00000000), //GICC Affinity Processor 15 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000010,0x00000001,0x00000000), //GICC Affinity Processor 16 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000011,0x00000001,0x00000000), //GICC Affinity Processor 17 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000012,0x00000001,0x00000000), //GICC Affinity Processor 18 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000013,0x00000001,0x00000000), //GICC Affinity Processor 19 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000014,0x00000001,0x00000000), //GICC Affinity Processor 20 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000015,0x00000001,0x00000000), //GICC Affinity Processor 21 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000016,0x00000001,0x00000000), //GICC Affinity Processor 22 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000017,0x00000001,0x00000000), //GICC Affinity Processor 23 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000018,0x00000001,0x00000000), //GICC Affinity Processor 24 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000019,0x00000001,0x00000000), //GICC Affinity Processor 25 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001A,0x00000001,0x00000000), //GICC Affinity Processor 26 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001B,0x00000001,0x00000000), //GICC Affinity Processor 27 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001C,0x00000001,0x00000000), //GICC Affinity Processor 28 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001D,0x00000001,0x00000000), //GICC Affinity Processor 29 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001E,0x00000001,0x00000000), //GICC Affinity Processor 30 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001F,0x00000001,0x00000000), //GICC Affinity Processor 31 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000020,0x00000001,0x00000000), //GICC Affinity Processor 32 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000021,0x00000001,0x00000000), //GICC Affinity Processor 33 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000022,0x00000001,0x00000000), //GICC Affinity Processor 34 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000023,0x00000001,0x00000000), //GICC Affinity Processor 35 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000024,0x00000001,0x00000000), //GICC Affinity Processor 36 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000025,0x00000001,0x00000000), //GICC Affinity Processor 37 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000026,0x00000001,0x00000000), //GICC Affinity Processor 38 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000027,0x00000001,0x00000000), //GICC Affinity Processor 39 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000028,0x00000001,0x00000000), //GICC Affinity Processor 40 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000029,0x00000001,0x00000000), //GICC Affinity Processor 41 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002A,0x00000001,0x00000000), //GICC Affinity Processor 42 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002B,0x00000001,0x00000000), //GICC Affinity Processor 43 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002C,0x00000001,0x00000000), //GICC Affinity Processor 44 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002D,0x00000001,0x00000000), //GICC Affinity Processor 45 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002E,0x00000001,0x00000000), //GICC Affinity Processor 46 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002F,0x00000001,0x00000000), //GICC Affinity Processor 47 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000030,0x00000001,0x00000000), //GICC Affinity Processor 48 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000031,0x00000001,0x00000000), //GICC Affinity Processor 49 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000032,0x00000001,0x00000000), //GICC Affinity Processor 50 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000033,0x00000001,0x00000000), //GICC Affinity Processor 51 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000034,0x00000001,0x00000000), //GICC Affinity Processor 52 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000035,0x00000001,0x00000000), //GICC Affinity Processor 53 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000036,0x00000001,0x00000000), //GICC Affinity Processor 54 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000037,0x00000001,0x00000000), //GICC Affinity Processor 55 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000038,0x00000001,0x00000000), //GICC Affinity Processor 56 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000039,0x00000001,0x00000000), //GICC Affinity Processor 57 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003A,0x00000001,0x00000000), //GICC Affinity Processor 58 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003B,0x00000001,0x00000000), //GICC Affinity Processor 59 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003C,0x00000001,0x00000000), //GICC Affinity Processor 60 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003D,0x00000001,0x00000000), //GICC Affinity Processor 61 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003E,0x00000001,0x00000000), //GICC Affinity Processor 62 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003F,0x00000001,0x00000000), //GICC Affinity Processor 63 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000040,0x00000001,0x00000000), //GICC Affinity Processor 64 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000041,0x00000001,0x00000000), //GICC Affinity Processor 65 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000042,0x00000001,0x00000000), //GICC Affinity Processor 66 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000043,0x00000001,0x00000000), //GICC Affinity Processor 67 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000044,0x00000001,0x00000000), //GICC Affinity Processor 68 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000045,0x00000001,0x00000000), //GICC Affinity Processor 69 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000046,0x00000001,0x00000000), //GICC Affinity Processor 70 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000047,0x00000001,0x00000000), //GICC Affinity Processor 71 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000048,0x00000001,0x00000000), //GICC Affinity Processor 72 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000049,0x00000001,0x00000000), //GICC Affinity Processor 73 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004A,0x00000001,0x00000000), //GICC Affinity Processor 74 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004B,0x00000001,0x00000000), //GICC Affinity Processor 75 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004C,0x00000001,0x00000000), //GICC Affinity Processor 76 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004D,0x00000001,0x00000000), //GICC Affinity Processor 77 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004E,0x00000001,0x00000000), //GICC Affinity Processor 78 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004F,0x00000001,0x00000000), //GICC Affinity Processor 79 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000050,0x00000001,0x00000000), //GICC Affinity Processor 80 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000051,0x00000001,0x00000000), //GICC Affinity Processor 81 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000052,0x00000001,0x00000000), //GICC Affinity Processor 82 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000053,0x00000001,0x00000000), //GICC Affinity Processor 83 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000054,0x00000001,0x00000000), //GICC Affinity Processor 84 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000055,0x00000001,0x00000000), //GICC Affinity Processor 85 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000056,0x00000001,0x00000000), //GICC Affinity Processor 86 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000057,0x00000001,0x00000000), //GICC Affinity Processor 87 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000058,0x00000001,0x00000000), //GICC Affinity Processor 88 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000059,0x00000001,0x00000000), //GICC Affinity Processor 89 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005A,0x00000001,0x00000000), //GICC Affinity Processor 90 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005B,0x00000001,0x00000000), //GICC Affinity Processor 91 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005C,0x00000001,0x00000000), //GICC Affinity Processor 92 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005D,0x00000001,0x00000000), //GICC Affinity Processor 93 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005E,0x00000001,0x00000000), //GICC Affinity Processor 94 - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005F,0x00000001,0x00000000), //GICC Affinity Processor 95 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000030,0x00000001,0x00000000), //GICC Affinity Processor 48 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000031,0x00000001,0x00000000), //GICC Affinity Processor 49 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000032,0x00000001,0x00000000), //GICC Affinity Processor 50 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000033,0x00000001,0x00000000), //GICC Affinity Processor 51 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000034,0x00000001,0x00000000), //GICC Affinity Processor 52 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000035,0x00000001,0x00000000), //GICC Affinity Processor 53 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000036,0x00000001,0x00000000), //GICC Affinity Processor 54 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000037,0x00000001,0x00000000), //GICC Affinity Processor 55 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000038,0x00000001,0x00000000), //GICC Affinity Processor 56 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000039,0x00000001,0x00000000), //GICC Affinity Processor 57 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003A,0x00000001,0x00000000), //GICC Affinity Processor 58 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003B,0x00000001,0x00000000), //GICC Affinity Processor 59 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003C,0x00000001,0x00000000), //GICC Affinity Processor 60 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003D,0x00000001,0x00000000), //GICC Affinity Processor 61 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003E,0x00000001,0x00000000), //GICC Affinity Processor 62 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003F,0x00000001,0x00000000), //GICC Affinity Processor 63 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000040,0x00000001,0x00000000), //GICC Affinity Processor 64 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000041,0x00000001,0x00000000), //GICC Affinity Processor 65 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000042,0x00000001,0x00000000), //GICC Affinity Processor 66 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000043,0x00000001,0x00000000), //GICC Affinity Processor 67 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000044,0x00000001,0x00000000), //GICC Affinity Processor 68 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000045,0x00000001,0x00000000), //GICC Affinity Processor 69 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000046,0x00000001,0x00000000), //GICC Affinity Processor 70 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000047,0x00000001,0x00000000), //GICC Affinity Processor 71 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000048,0x00000001,0x00000000), //GICC Affinity Processor 72 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000049,0x00000001,0x00000000), //GICC Affinity Processor 73 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004A,0x00000001,0x00000000), //GICC Affinity Processor 74 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004B,0x00000001,0x00000000), //GICC Affinity Processor 75 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004C,0x00000001,0x00000000), //GICC Affinity Processor 76 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004D,0x00000001,0x00000000), //GICC Affinity Processor 77 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004E,0x00000001,0x00000000), //GICC Affinity Processor 78 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004F,0x00000001,0x00000000), //GICC Affinity Processor 79 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000050,0x00000001,0x00000000), //GICC Affinity Processor 80 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000051,0x00000001,0x00000000), //GICC Affinity Processor 81 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000052,0x00000001,0x00000000), //GICC Affinity Processor 82 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000053,0x00000001,0x00000000), //GICC Affinity Processor 83 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000054,0x00000001,0x00000000), //GICC Affinity Processor 84 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000055,0x00000001,0x00000000), //GICC Affinity Processor 85 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000056,0x00000001,0x00000000), //GICC Affinity Processor 86 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000057,0x00000001,0x00000000), //GICC Affinity Processor 87 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000058,0x00000001,0x00000000), //GICC Affinity Processor 88 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000059,0x00000001,0x00000000), //GICC Affinity Processor 89 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005A,0x00000001,0x00000000), //GICC Affinity Processor 90 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005B,0x00000001,0x00000000), //GICC Affinity Processor 91 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005C,0x00000001,0x00000000), //GICC Affinity Processor 92 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005D,0x00000001,0x00000000), //GICC Affinity Processor 93 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005E,0x00000001,0x00000000), //GICC Affinity Processor 94 + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005F,0x00000001,0x00000000), //GICC Affinity Processor 95 }, { - EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000001, 0x00000000), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000000, 0x00000000), // EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000003, 0x00000001), }, }; -- 2.18.0 ^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 12/12] Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot 2018-10-29 3:32 ` [PATCH edk2-platforms v1 12/12] Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot Ming Huang @ 2018-11-14 0:36 ` Leif Lindholm 2018-11-14 14:32 ` Ming Huang 0 siblings, 1 reply; 35+ messages in thread From: Leif Lindholm @ 2018-11-14 0:36 UTC (permalink / raw) To: Ming Huang Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On Mon, Oct 29, 2018 at 11:32:49AM +0800, Ming Huang wrote: > Linux kernel will recognize NUMA node by processor order, > and the Node and PXM number will be not identical between > BIOS and OS kernel after changing to TA boot, so adjust > the NUMA node number to match. What does "TA" and "TA boot" mean in this context? "PXM number" "proximity domain (PXM)". What are we adjusting the NUMA node number to, and what are we adjusting it from? / Leif > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang <ming.huang@linaro.org> > --- > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 28 +-- > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 18 +- > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 194 ++++++++++---------- > 3 files changed, 120 insertions(+), 120 deletions(-) > > diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl > index 87a2da8843..27fde2e09b 100644 > --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl > +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl > @@ -212,7 +212,7 @@ Scope(_SB) > > Method (_PXM, 0, NotSerialized) > { > - Return(0x01) > + Return(0x00) > } > } // Device(PCI0) > > @@ -262,7 +262,7 @@ Device (PCI1) > > Method (_PXM, 0, NotSerialized) > { > - Return(0x01) > + Return(0x00) > } > } // Device(PCI1) > > @@ -325,7 +325,7 @@ Device (PCI2) > > Method (_PXM, 0, NotSerialized) > { > - Return(0x01) > + Return(0x00) > } > } > > @@ -374,7 +374,7 @@ Device (PCI3) > > Method (_PXM, 0, NotSerialized) > { > - Return(0x01) > + Return(0x00) > } > } > > @@ -423,7 +423,7 @@ Device (PCI4) > > Method (_PXM, 0, NotSerialized) > { > - Return(0x01) > + Return(0x00) > } > } > > @@ -733,7 +733,7 @@ Device (PCI5) > > Method (_PXM, 0, NotSerialized) > { > - Return(0x01) > + Return(0x00) > } > } > > @@ -866,11 +866,11 @@ Device (PCI6) > // Never allow SHPC (no SHPC controller in this system) > And(CTRL,0x1D,CTRL) > > - If(LNotEqual(Arg1,One)) { // Unknown revision > + If(LNotEqual(Arg1,One)) { // Unknown revision > Or(CDW1,0x08,CDW1) > } > > - If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked > + If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked > Or(CDW1,0x10,CDW1) > } > > @@ -924,7 +924,7 @@ Device (PCI6) > > Method (_PXM, 0, NotSerialized) > { > - Return(0x03) > + Return(0x02) > } > } // Device(PCI6) > > @@ -974,7 +974,7 @@ Device (PCI7) > > Method (_PXM, 0, NotSerialized) > { > - Return(0x03) > + Return(0x02) > } > } // Device(PCI7) > > @@ -1038,7 +1038,7 @@ Device (PCI8) > > Method (_PXM, 0, NotSerialized) > { > - Return(0x03) > + Return(0x02) > } > }// Device(PCI8) > > @@ -1087,7 +1087,7 @@ Device (PCI9) > > Method (_PXM, 0, NotSerialized) > { > - Return(0x03) > + Return(0x02) > } > }// Device(PCI9) > > @@ -1136,7 +1136,7 @@ Device (PCIA) > > Method (_PXM, 0, NotSerialized) > { > - Return(0x03) > + Return(0x02) > } > }// Device(PCIA) > > @@ -1210,7 +1210,7 @@ Device (PCIB) > > Method (_PXM, 0, NotSerialized) > { > - Return(0x03) > + Return(0x02) > } > } > > diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl > index 33b5d5250b..29536e6dff 100644 > --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl > +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl > @@ -53,7 +53,7 @@ > [0004] PRI Interrupt : 00000000 > [0004] GERR Interrupt : 00000000 > [0004] Sync Interrupt : 00000000 > -[0001] Proximity Domain : 01 > +[0001] Proximity Domain : 00 > [0001] Reserved : 00 > [0002] Reserved : 0000 > [0004] DeviceID mapping index : 00000002 > @@ -99,7 +99,7 @@ > [0004] PRI Interrupt : 00000000 > [0004] GERR Interrupt : 00000000 > [0004] Sync Interrupt : 00000000 > -[0001] Proximity Domain : 01 > +[0001] Proximity Domain : 00 > [0001] Reserved : 00 > [0002] Reserved : 0000 > [0004] DeviceID mapping index : 0001 > @@ -139,7 +139,7 @@ > [0004] PRI Interrupt : 00000000 > [0004] GERR Interrupt : 00000000 > [0004] Sync Interrupt : 00000000 > -[0001] Proximity Domain : 01 > +[0001] Proximity Domain : 00 > [0001] Reserved : 00 > [0002] Reserved : 0000 > [0004] DeviceID mapping index : 00000001 > @@ -179,7 +179,7 @@ > [0004] PRI Interrupt : 00000000 > [0004] GERR Interrupt : 00000000 > [0004] Sync Interrupt : 00000000 > -[0001] Proximity Domain : 03 > +[0001] Proximity Domain : 02 > [0001] Reserved : 00 > [0002] Reserved : 0000 > [0004] DeviceID mapping index : 00000002 > @@ -225,7 +225,7 @@ > [0004] PRI Interrupt : 00000000 > [0004] GERR Interrupt : 00000000 > [0004] Sync Interrupt : 00000000 > -[0001] Proximity Domain : 03 > +[0001] Proximity Domain : 02 > [0001] Reserved : 00 > [0002] Reserved : 0000 > [0004] DeviceID mapping index : 0001 > @@ -265,7 +265,7 @@ > [0004] PRI Interrupt : 00000000 > [0004] GERR Interrupt : 00000000 > [0004] Sync Interrupt : 00000000 > -[0001] Proximity Domain : 03 > +[0001] Proximity Domain : 02 > [0001] Reserved : 00 > [0002] Reserved : 0000 > [0004] DeviceID mapping index : 00000001 > @@ -300,8 +300,8 @@ > Read Allocate : 0 > Override : 0 > [0002] Reserved : 0000 > -[0001] Memory Flags (decoded below) : 00 > - Coherency : 0 > +[0001] Memory Flags (decoded below) : 01 > + Coherency : 1 > Device Attribute : 0 > [0004] ATS Attribute : 00000000 > [0004] PCI Segment Number : 00000000 // should match with above MCFG > @@ -1921,7 +1921,7 @@ > [34Ch 0844 4] Input base : 00000000 > [350h 0848 4] ID Count : 00000001 > [354h 0852 4] Output Base : 00000100 > -[358h 0856 4] Output Reference : 00000100 > +[358h 0856 4] Output Reference : 00000138 > [35Ch 0860 4] Flags (decoded below) : 00000001 > Single Mapping : 1 > /* RDE device report++.*/ > diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc > index aea4c21858..d77bddefc8 100644 > --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc > +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc > @@ -55,106 +55,106 @@ EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE Srat = { > }, > > { > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000000,0x00000001,0x00000000), //GICC Affinity Processor 0 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000001,0x00000001,0x00000000), //GICC Affinity Processor 1 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000002,0x00000001,0x00000000), //GICC Affinity Processor 2 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000003,0x00000001,0x00000000), //GICC Affinity Processor 3 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000004,0x00000001,0x00000000), //GICC Affinity Processor 4 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000005,0x00000001,0x00000000), //GICC Affinity Processor 5 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000006,0x00000001,0x00000000), //GICC Affinity Processor 6 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000007,0x00000001,0x00000000), //GICC Affinity Processor 7 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000008,0x00000001,0x00000000), //GICC Affinity Processor 8 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000009,0x00000001,0x00000000), //GICC Affinity Processor 9 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000A,0x00000001,0x00000000), //GICC Affinity Processor 10 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000B,0x00000001,0x00000000), //GICC Affinity Processor 11 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000C,0x00000001,0x00000000), //GICC Affinity Processor 12 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000D,0x00000001,0x00000000), //GICC Affinity Processor 13 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000E,0x00000001,0x00000000), //GICC Affinity Processor 14 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000F,0x00000001,0x00000000), //GICC Affinity Processor 15 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000010,0x00000001,0x00000000), //GICC Affinity Processor 16 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000011,0x00000001,0x00000000), //GICC Affinity Processor 17 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000012,0x00000001,0x00000000), //GICC Affinity Processor 18 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000013,0x00000001,0x00000000), //GICC Affinity Processor 19 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000014,0x00000001,0x00000000), //GICC Affinity Processor 20 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000015,0x00000001,0x00000000), //GICC Affinity Processor 21 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000016,0x00000001,0x00000000), //GICC Affinity Processor 22 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000017,0x00000001,0x00000000), //GICC Affinity Processor 23 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000018,0x00000001,0x00000000), //GICC Affinity Processor 24 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000019,0x00000001,0x00000000), //GICC Affinity Processor 25 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001A,0x00000001,0x00000000), //GICC Affinity Processor 26 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001B,0x00000001,0x00000000), //GICC Affinity Processor 27 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001C,0x00000001,0x00000000), //GICC Affinity Processor 28 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001D,0x00000001,0x00000000), //GICC Affinity Processor 29 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001E,0x00000001,0x00000000), //GICC Affinity Processor 30 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001F,0x00000001,0x00000000), //GICC Affinity Processor 31 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000020,0x00000001,0x00000000), //GICC Affinity Processor 32 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000021,0x00000001,0x00000000), //GICC Affinity Processor 33 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000022,0x00000001,0x00000000), //GICC Affinity Processor 34 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000023,0x00000001,0x00000000), //GICC Affinity Processor 35 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000024,0x00000001,0x00000000), //GICC Affinity Processor 36 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000025,0x00000001,0x00000000), //GICC Affinity Processor 37 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000026,0x00000001,0x00000000), //GICC Affinity Processor 38 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000027,0x00000001,0x00000000), //GICC Affinity Processor 39 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000028,0x00000001,0x00000000), //GICC Affinity Processor 40 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000029,0x00000001,0x00000000), //GICC Affinity Processor 41 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002A,0x00000001,0x00000000), //GICC Affinity Processor 42 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002B,0x00000001,0x00000000), //GICC Affinity Processor 43 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002C,0x00000001,0x00000000), //GICC Affinity Processor 44 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002D,0x00000001,0x00000000), //GICC Affinity Processor 45 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002E,0x00000001,0x00000000), //GICC Affinity Processor 46 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002F,0x00000001,0x00000000), //GICC Affinity Processor 47 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000000,0x00000001,0x00000000), //GICC Affinity Processor 0 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000001,0x00000001,0x00000000), //GICC Affinity Processor 1 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000002,0x00000001,0x00000000), //GICC Affinity Processor 2 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000003,0x00000001,0x00000000), //GICC Affinity Processor 3 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000004,0x00000001,0x00000000), //GICC Affinity Processor 4 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000005,0x00000001,0x00000000), //GICC Affinity Processor 5 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000006,0x00000001,0x00000000), //GICC Affinity Processor 6 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000007,0x00000001,0x00000000), //GICC Affinity Processor 7 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000008,0x00000001,0x00000000), //GICC Affinity Processor 8 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000009,0x00000001,0x00000000), //GICC Affinity Processor 9 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000A,0x00000001,0x00000000), //GICC Affinity Processor 10 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000B,0x00000001,0x00000000), //GICC Affinity Processor 11 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000C,0x00000001,0x00000000), //GICC Affinity Processor 12 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000D,0x00000001,0x00000000), //GICC Affinity Processor 13 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000E,0x00000001,0x00000000), //GICC Affinity Processor 14 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000F,0x00000001,0x00000000), //GICC Affinity Processor 15 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000010,0x00000001,0x00000000), //GICC Affinity Processor 16 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000011,0x00000001,0x00000000), //GICC Affinity Processor 17 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000012,0x00000001,0x00000000), //GICC Affinity Processor 18 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000013,0x00000001,0x00000000), //GICC Affinity Processor 19 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000014,0x00000001,0x00000000), //GICC Affinity Processor 20 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000015,0x00000001,0x00000000), //GICC Affinity Processor 21 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000016,0x00000001,0x00000000), //GICC Affinity Processor 22 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000017,0x00000001,0x00000000), //GICC Affinity Processor 23 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000018,0x00000001,0x00000000), //GICC Affinity Processor 24 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000019,0x00000001,0x00000000), //GICC Affinity Processor 25 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001A,0x00000001,0x00000000), //GICC Affinity Processor 26 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001B,0x00000001,0x00000000), //GICC Affinity Processor 27 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001C,0x00000001,0x00000000), //GICC Affinity Processor 28 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001D,0x00000001,0x00000000), //GICC Affinity Processor 29 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001E,0x00000001,0x00000000), //GICC Affinity Processor 30 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001F,0x00000001,0x00000000), //GICC Affinity Processor 31 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000020,0x00000001,0x00000000), //GICC Affinity Processor 32 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000021,0x00000001,0x00000000), //GICC Affinity Processor 33 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000022,0x00000001,0x00000000), //GICC Affinity Processor 34 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000023,0x00000001,0x00000000), //GICC Affinity Processor 35 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000024,0x00000001,0x00000000), //GICC Affinity Processor 36 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000025,0x00000001,0x00000000), //GICC Affinity Processor 37 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000026,0x00000001,0x00000000), //GICC Affinity Processor 38 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000027,0x00000001,0x00000000), //GICC Affinity Processor 39 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000028,0x00000001,0x00000000), //GICC Affinity Processor 40 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000029,0x00000001,0x00000000), //GICC Affinity Processor 41 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002A,0x00000001,0x00000000), //GICC Affinity Processor 42 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002B,0x00000001,0x00000000), //GICC Affinity Processor 43 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002C,0x00000001,0x00000000), //GICC Affinity Processor 44 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002D,0x00000001,0x00000000), //GICC Affinity Processor 45 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002E,0x00000001,0x00000000), //GICC Affinity Processor 46 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002F,0x00000001,0x00000000), //GICC Affinity Processor 47 > > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000030,0x00000001,0x00000000), //GICC Affinity Processor 48 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000031,0x00000001,0x00000000), //GICC Affinity Processor 49 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000032,0x00000001,0x00000000), //GICC Affinity Processor 50 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000033,0x00000001,0x00000000), //GICC Affinity Processor 51 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000034,0x00000001,0x00000000), //GICC Affinity Processor 52 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000035,0x00000001,0x00000000), //GICC Affinity Processor 53 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000036,0x00000001,0x00000000), //GICC Affinity Processor 54 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000037,0x00000001,0x00000000), //GICC Affinity Processor 55 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000038,0x00000001,0x00000000), //GICC Affinity Processor 56 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000039,0x00000001,0x00000000), //GICC Affinity Processor 57 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003A,0x00000001,0x00000000), //GICC Affinity Processor 58 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003B,0x00000001,0x00000000), //GICC Affinity Processor 59 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003C,0x00000001,0x00000000), //GICC Affinity Processor 60 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003D,0x00000001,0x00000000), //GICC Affinity Processor 61 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003E,0x00000001,0x00000000), //GICC Affinity Processor 62 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003F,0x00000001,0x00000000), //GICC Affinity Processor 63 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000040,0x00000001,0x00000000), //GICC Affinity Processor 64 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000041,0x00000001,0x00000000), //GICC Affinity Processor 65 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000042,0x00000001,0x00000000), //GICC Affinity Processor 66 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000043,0x00000001,0x00000000), //GICC Affinity Processor 67 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000044,0x00000001,0x00000000), //GICC Affinity Processor 68 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000045,0x00000001,0x00000000), //GICC Affinity Processor 69 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000046,0x00000001,0x00000000), //GICC Affinity Processor 70 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000047,0x00000001,0x00000000), //GICC Affinity Processor 71 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000048,0x00000001,0x00000000), //GICC Affinity Processor 72 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000049,0x00000001,0x00000000), //GICC Affinity Processor 73 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004A,0x00000001,0x00000000), //GICC Affinity Processor 74 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004B,0x00000001,0x00000000), //GICC Affinity Processor 75 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004C,0x00000001,0x00000000), //GICC Affinity Processor 76 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004D,0x00000001,0x00000000), //GICC Affinity Processor 77 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004E,0x00000001,0x00000000), //GICC Affinity Processor 78 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004F,0x00000001,0x00000000), //GICC Affinity Processor 79 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000050,0x00000001,0x00000000), //GICC Affinity Processor 80 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000051,0x00000001,0x00000000), //GICC Affinity Processor 81 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000052,0x00000001,0x00000000), //GICC Affinity Processor 82 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000053,0x00000001,0x00000000), //GICC Affinity Processor 83 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000054,0x00000001,0x00000000), //GICC Affinity Processor 84 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000055,0x00000001,0x00000000), //GICC Affinity Processor 85 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000056,0x00000001,0x00000000), //GICC Affinity Processor 86 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000057,0x00000001,0x00000000), //GICC Affinity Processor 87 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000058,0x00000001,0x00000000), //GICC Affinity Processor 88 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000059,0x00000001,0x00000000), //GICC Affinity Processor 89 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005A,0x00000001,0x00000000), //GICC Affinity Processor 90 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005B,0x00000001,0x00000000), //GICC Affinity Processor 91 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005C,0x00000001,0x00000000), //GICC Affinity Processor 92 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005D,0x00000001,0x00000000), //GICC Affinity Processor 93 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005E,0x00000001,0x00000000), //GICC Affinity Processor 94 > - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005F,0x00000001,0x00000000), //GICC Affinity Processor 95 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000030,0x00000001,0x00000000), //GICC Affinity Processor 48 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000031,0x00000001,0x00000000), //GICC Affinity Processor 49 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000032,0x00000001,0x00000000), //GICC Affinity Processor 50 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000033,0x00000001,0x00000000), //GICC Affinity Processor 51 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000034,0x00000001,0x00000000), //GICC Affinity Processor 52 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000035,0x00000001,0x00000000), //GICC Affinity Processor 53 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000036,0x00000001,0x00000000), //GICC Affinity Processor 54 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000037,0x00000001,0x00000000), //GICC Affinity Processor 55 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000038,0x00000001,0x00000000), //GICC Affinity Processor 56 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000039,0x00000001,0x00000000), //GICC Affinity Processor 57 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003A,0x00000001,0x00000000), //GICC Affinity Processor 58 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003B,0x00000001,0x00000000), //GICC Affinity Processor 59 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003C,0x00000001,0x00000000), //GICC Affinity Processor 60 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003D,0x00000001,0x00000000), //GICC Affinity Processor 61 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003E,0x00000001,0x00000000), //GICC Affinity Processor 62 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003F,0x00000001,0x00000000), //GICC Affinity Processor 63 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000040,0x00000001,0x00000000), //GICC Affinity Processor 64 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000041,0x00000001,0x00000000), //GICC Affinity Processor 65 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000042,0x00000001,0x00000000), //GICC Affinity Processor 66 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000043,0x00000001,0x00000000), //GICC Affinity Processor 67 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000044,0x00000001,0x00000000), //GICC Affinity Processor 68 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000045,0x00000001,0x00000000), //GICC Affinity Processor 69 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000046,0x00000001,0x00000000), //GICC Affinity Processor 70 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000047,0x00000001,0x00000000), //GICC Affinity Processor 71 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000048,0x00000001,0x00000000), //GICC Affinity Processor 72 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000049,0x00000001,0x00000000), //GICC Affinity Processor 73 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004A,0x00000001,0x00000000), //GICC Affinity Processor 74 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004B,0x00000001,0x00000000), //GICC Affinity Processor 75 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004C,0x00000001,0x00000000), //GICC Affinity Processor 76 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004D,0x00000001,0x00000000), //GICC Affinity Processor 77 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004E,0x00000001,0x00000000), //GICC Affinity Processor 78 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004F,0x00000001,0x00000000), //GICC Affinity Processor 79 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000050,0x00000001,0x00000000), //GICC Affinity Processor 80 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000051,0x00000001,0x00000000), //GICC Affinity Processor 81 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000052,0x00000001,0x00000000), //GICC Affinity Processor 82 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000053,0x00000001,0x00000000), //GICC Affinity Processor 83 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000054,0x00000001,0x00000000), //GICC Affinity Processor 84 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000055,0x00000001,0x00000000), //GICC Affinity Processor 85 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000056,0x00000001,0x00000000), //GICC Affinity Processor 86 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000057,0x00000001,0x00000000), //GICC Affinity Processor 87 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000058,0x00000001,0x00000000), //GICC Affinity Processor 88 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000059,0x00000001,0x00000000), //GICC Affinity Processor 89 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005A,0x00000001,0x00000000), //GICC Affinity Processor 90 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005B,0x00000001,0x00000000), //GICC Affinity Processor 91 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005C,0x00000001,0x00000000), //GICC Affinity Processor 92 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005D,0x00000001,0x00000000), //GICC Affinity Processor 93 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005E,0x00000001,0x00000000), //GICC Affinity Processor 94 > + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005F,0x00000001,0x00000000), //GICC Affinity Processor 95 > }, > { > - EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000001, 0x00000000), > + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000000, 0x00000000), > // EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000003, 0x00000001), > }, > }; > -- > 2.18.0 > ^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 12/12] Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot 2018-11-14 0:36 ` Leif Lindholm @ 2018-11-14 14:32 ` Ming Huang 0 siblings, 0 replies; 35+ messages in thread From: Ming Huang @ 2018-11-14 14:32 UTC (permalink / raw) To: Leif Lindholm Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On 11/14/2018 8:36 AM, Leif Lindholm wrote: > On Mon, Oct 29, 2018 at 11:32:49AM +0800, Ming Huang wrote: >> Linux kernel will recognize NUMA node by processor order, >> and the Node and PXM number will be not identical between >> BIOS and OS kernel after changing to TA boot, so adjust >> the NUMA node number to match. > > What does "TA" and "TA boot" mean in this context? TA: Totem A, concept similar to die. > > "PXM number" "proximity domain (PXM)". > > What are we adjusting the NUMA node number to, and what are we > adjusting it from? We boot from TB originally, then switch to boot from TA. These acpi tables should update corresponding, otherwise the NUMA node information getting by kernel will be confused. This patch is missed for last series. By the way, should PciHostBridgeLib EISA_PNP_ID(0x0A0?) bug reported by Ard add in v2? > > / > Leif > >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ming Huang <ming.huang@linaro.org> >> --- >> Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 28 +-- >> Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 18 +- >> Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 194 ++++++++++---------- >> 3 files changed, 120 insertions(+), 120 deletions(-) >> >> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl >> index 87a2da8843..27fde2e09b 100644 >> --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl >> +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl >> @@ -212,7 +212,7 @@ Scope(_SB) >> >> Method (_PXM, 0, NotSerialized) >> { >> - Return(0x01) >> + Return(0x00) >> } >> } // Device(PCI0) >> >> @@ -262,7 +262,7 @@ Device (PCI1) >> >> Method (_PXM, 0, NotSerialized) >> { >> - Return(0x01) >> + Return(0x00) >> } >> } // Device(PCI1) >> >> @@ -325,7 +325,7 @@ Device (PCI2) >> >> Method (_PXM, 0, NotSerialized) >> { >> - Return(0x01) >> + Return(0x00) >> } >> } >> >> @@ -374,7 +374,7 @@ Device (PCI3) >> >> Method (_PXM, 0, NotSerialized) >> { >> - Return(0x01) >> + Return(0x00) >> } >> } >> >> @@ -423,7 +423,7 @@ Device (PCI4) >> >> Method (_PXM, 0, NotSerialized) >> { >> - Return(0x01) >> + Return(0x00) >> } >> } >> >> @@ -733,7 +733,7 @@ Device (PCI5) >> >> Method (_PXM, 0, NotSerialized) >> { >> - Return(0x01) >> + Return(0x00) >> } >> } >> >> @@ -866,11 +866,11 @@ Device (PCI6) >> // Never allow SHPC (no SHPC controller in this system) >> And(CTRL,0x1D,CTRL) >> >> - If(LNotEqual(Arg1,One)) { // Unknown revision >> + If(LNotEqual(Arg1,One)) { // Unknown revision >> Or(CDW1,0x08,CDW1) >> } >> >> - If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked >> + If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked >> Or(CDW1,0x10,CDW1) >> } >> >> @@ -924,7 +924,7 @@ Device (PCI6) >> >> Method (_PXM, 0, NotSerialized) >> { >> - Return(0x03) >> + Return(0x02) >> } >> } // Device(PCI6) >> >> @@ -974,7 +974,7 @@ Device (PCI7) >> >> Method (_PXM, 0, NotSerialized) >> { >> - Return(0x03) >> + Return(0x02) >> } >> } // Device(PCI7) >> >> @@ -1038,7 +1038,7 @@ Device (PCI8) >> >> Method (_PXM, 0, NotSerialized) >> { >> - Return(0x03) >> + Return(0x02) >> } >> }// Device(PCI8) >> >> @@ -1087,7 +1087,7 @@ Device (PCI9) >> >> Method (_PXM, 0, NotSerialized) >> { >> - Return(0x03) >> + Return(0x02) >> } >> }// Device(PCI9) >> >> @@ -1136,7 +1136,7 @@ Device (PCIA) >> >> Method (_PXM, 0, NotSerialized) >> { >> - Return(0x03) >> + Return(0x02) >> } >> }// Device(PCIA) >> >> @@ -1210,7 +1210,7 @@ Device (PCIB) >> >> Method (_PXM, 0, NotSerialized) >> { >> - Return(0x03) >> + Return(0x02) >> } >> } >> >> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl >> index 33b5d5250b..29536e6dff 100644 >> --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl >> +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl >> @@ -53,7 +53,7 @@ >> [0004] PRI Interrupt : 00000000 >> [0004] GERR Interrupt : 00000000 >> [0004] Sync Interrupt : 00000000 >> -[0001] Proximity Domain : 01 >> +[0001] Proximity Domain : 00 >> [0001] Reserved : 00 >> [0002] Reserved : 0000 >> [0004] DeviceID mapping index : 00000002 >> @@ -99,7 +99,7 @@ >> [0004] PRI Interrupt : 00000000 >> [0004] GERR Interrupt : 00000000 >> [0004] Sync Interrupt : 00000000 >> -[0001] Proximity Domain : 01 >> +[0001] Proximity Domain : 00 >> [0001] Reserved : 00 >> [0002] Reserved : 0000 >> [0004] DeviceID mapping index : 0001 >> @@ -139,7 +139,7 @@ >> [0004] PRI Interrupt : 00000000 >> [0004] GERR Interrupt : 00000000 >> [0004] Sync Interrupt : 00000000 >> -[0001] Proximity Domain : 01 >> +[0001] Proximity Domain : 00 >> [0001] Reserved : 00 >> [0002] Reserved : 0000 >> [0004] DeviceID mapping index : 00000001 >> @@ -179,7 +179,7 @@ >> [0004] PRI Interrupt : 00000000 >> [0004] GERR Interrupt : 00000000 >> [0004] Sync Interrupt : 00000000 >> -[0001] Proximity Domain : 03 >> +[0001] Proximity Domain : 02 >> [0001] Reserved : 00 >> [0002] Reserved : 0000 >> [0004] DeviceID mapping index : 00000002 >> @@ -225,7 +225,7 @@ >> [0004] PRI Interrupt : 00000000 >> [0004] GERR Interrupt : 00000000 >> [0004] Sync Interrupt : 00000000 >> -[0001] Proximity Domain : 03 >> +[0001] Proximity Domain : 02 >> [0001] Reserved : 00 >> [0002] Reserved : 0000 >> [0004] DeviceID mapping index : 0001 >> @@ -265,7 +265,7 @@ >> [0004] PRI Interrupt : 00000000 >> [0004] GERR Interrupt : 00000000 >> [0004] Sync Interrupt : 00000000 >> -[0001] Proximity Domain : 03 >> +[0001] Proximity Domain : 02 >> [0001] Reserved : 00 >> [0002] Reserved : 0000 >> [0004] DeviceID mapping index : 00000001 >> @@ -300,8 +300,8 @@ >> Read Allocate : 0 >> Override : 0 >> [0002] Reserved : 0000 >> -[0001] Memory Flags (decoded below) : 00 >> - Coherency : 0 >> +[0001] Memory Flags (decoded below) : 01 >> + Coherency : 1 >> Device Attribute : 0 >> [0004] ATS Attribute : 00000000 >> [0004] PCI Segment Number : 00000000 // should match with above MCFG >> @@ -1921,7 +1921,7 @@ >> [34Ch 0844 4] Input base : 00000000 >> [350h 0848 4] ID Count : 00000001 >> [354h 0852 4] Output Base : 00000100 >> -[358h 0856 4] Output Reference : 00000100 >> +[358h 0856 4] Output Reference : 00000138 >> [35Ch 0860 4] Flags (decoded below) : 00000001 >> Single Mapping : 1 >> /* RDE device report++.*/ >> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc >> index aea4c21858..d77bddefc8 100644 >> --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc >> +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc >> @@ -55,106 +55,106 @@ EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE Srat = { >> }, >> >> { >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000000,0x00000001,0x00000000), //GICC Affinity Processor 0 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000001,0x00000001,0x00000000), //GICC Affinity Processor 1 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000002,0x00000001,0x00000000), //GICC Affinity Processor 2 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000003,0x00000001,0x00000000), //GICC Affinity Processor 3 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000004,0x00000001,0x00000000), //GICC Affinity Processor 4 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000005,0x00000001,0x00000000), //GICC Affinity Processor 5 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000006,0x00000001,0x00000000), //GICC Affinity Processor 6 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000007,0x00000001,0x00000000), //GICC Affinity Processor 7 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000008,0x00000001,0x00000000), //GICC Affinity Processor 8 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000009,0x00000001,0x00000000), //GICC Affinity Processor 9 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000A,0x00000001,0x00000000), //GICC Affinity Processor 10 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000B,0x00000001,0x00000000), //GICC Affinity Processor 11 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000C,0x00000001,0x00000000), //GICC Affinity Processor 12 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000D,0x00000001,0x00000000), //GICC Affinity Processor 13 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000E,0x00000001,0x00000000), //GICC Affinity Processor 14 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000000F,0x00000001,0x00000000), //GICC Affinity Processor 15 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000010,0x00000001,0x00000000), //GICC Affinity Processor 16 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000011,0x00000001,0x00000000), //GICC Affinity Processor 17 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000012,0x00000001,0x00000000), //GICC Affinity Processor 18 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000013,0x00000001,0x00000000), //GICC Affinity Processor 19 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000014,0x00000001,0x00000000), //GICC Affinity Processor 20 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000015,0x00000001,0x00000000), //GICC Affinity Processor 21 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000016,0x00000001,0x00000000), //GICC Affinity Processor 22 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000017,0x00000001,0x00000000), //GICC Affinity Processor 23 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000018,0x00000001,0x00000000), //GICC Affinity Processor 24 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000019,0x00000001,0x00000000), //GICC Affinity Processor 25 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001A,0x00000001,0x00000000), //GICC Affinity Processor 26 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001B,0x00000001,0x00000000), //GICC Affinity Processor 27 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001C,0x00000001,0x00000000), //GICC Affinity Processor 28 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001D,0x00000001,0x00000000), //GICC Affinity Processor 29 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001E,0x00000001,0x00000000), //GICC Affinity Processor 30 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000001F,0x00000001,0x00000000), //GICC Affinity Processor 31 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000020,0x00000001,0x00000000), //GICC Affinity Processor 32 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000021,0x00000001,0x00000000), //GICC Affinity Processor 33 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000022,0x00000001,0x00000000), //GICC Affinity Processor 34 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000023,0x00000001,0x00000000), //GICC Affinity Processor 35 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000024,0x00000001,0x00000000), //GICC Affinity Processor 36 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000025,0x00000001,0x00000000), //GICC Affinity Processor 37 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000026,0x00000001,0x00000000), //GICC Affinity Processor 38 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000027,0x00000001,0x00000000), //GICC Affinity Processor 39 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000028,0x00000001,0x00000000), //GICC Affinity Processor 40 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000029,0x00000001,0x00000000), //GICC Affinity Processor 41 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002A,0x00000001,0x00000000), //GICC Affinity Processor 42 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002B,0x00000001,0x00000000), //GICC Affinity Processor 43 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002C,0x00000001,0x00000000), //GICC Affinity Processor 44 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002D,0x00000001,0x00000000), //GICC Affinity Processor 45 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002E,0x00000001,0x00000000), //GICC Affinity Processor 46 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000002F,0x00000001,0x00000000), //GICC Affinity Processor 47 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000000,0x00000001,0x00000000), //GICC Affinity Processor 0 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000001,0x00000001,0x00000000), //GICC Affinity Processor 1 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000002,0x00000001,0x00000000), //GICC Affinity Processor 2 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000003,0x00000001,0x00000000), //GICC Affinity Processor 3 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000004,0x00000001,0x00000000), //GICC Affinity Processor 4 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000005,0x00000001,0x00000000), //GICC Affinity Processor 5 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000006,0x00000001,0x00000000), //GICC Affinity Processor 6 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000007,0x00000001,0x00000000), //GICC Affinity Processor 7 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000008,0x00000001,0x00000000), //GICC Affinity Processor 8 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000009,0x00000001,0x00000000), //GICC Affinity Processor 9 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000A,0x00000001,0x00000000), //GICC Affinity Processor 10 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000B,0x00000001,0x00000000), //GICC Affinity Processor 11 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000C,0x00000001,0x00000000), //GICC Affinity Processor 12 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000D,0x00000001,0x00000000), //GICC Affinity Processor 13 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000E,0x00000001,0x00000000), //GICC Affinity Processor 14 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000F,0x00000001,0x00000000), //GICC Affinity Processor 15 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000010,0x00000001,0x00000000), //GICC Affinity Processor 16 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000011,0x00000001,0x00000000), //GICC Affinity Processor 17 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000012,0x00000001,0x00000000), //GICC Affinity Processor 18 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000013,0x00000001,0x00000000), //GICC Affinity Processor 19 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000014,0x00000001,0x00000000), //GICC Affinity Processor 20 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000015,0x00000001,0x00000000), //GICC Affinity Processor 21 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000016,0x00000001,0x00000000), //GICC Affinity Processor 22 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000017,0x00000001,0x00000000), //GICC Affinity Processor 23 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000018,0x00000001,0x00000000), //GICC Affinity Processor 24 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000019,0x00000001,0x00000000), //GICC Affinity Processor 25 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001A,0x00000001,0x00000000), //GICC Affinity Processor 26 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001B,0x00000001,0x00000000), //GICC Affinity Processor 27 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001C,0x00000001,0x00000000), //GICC Affinity Processor 28 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001D,0x00000001,0x00000000), //GICC Affinity Processor 29 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001E,0x00000001,0x00000000), //GICC Affinity Processor 30 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000001F,0x00000001,0x00000000), //GICC Affinity Processor 31 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000020,0x00000001,0x00000000), //GICC Affinity Processor 32 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000021,0x00000001,0x00000000), //GICC Affinity Processor 33 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000022,0x00000001,0x00000000), //GICC Affinity Processor 34 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000023,0x00000001,0x00000000), //GICC Affinity Processor 35 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000024,0x00000001,0x00000000), //GICC Affinity Processor 36 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000025,0x00000001,0x00000000), //GICC Affinity Processor 37 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000026,0x00000001,0x00000000), //GICC Affinity Processor 38 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000027,0x00000001,0x00000000), //GICC Affinity Processor 39 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000028,0x00000001,0x00000000), //GICC Affinity Processor 40 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x00000029,0x00000001,0x00000000), //GICC Affinity Processor 41 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002A,0x00000001,0x00000000), //GICC Affinity Processor 42 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002B,0x00000001,0x00000000), //GICC Affinity Processor 43 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002C,0x00000001,0x00000000), //GICC Affinity Processor 44 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002D,0x00000001,0x00000000), //GICC Affinity Processor 45 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002E,0x00000001,0x00000000), //GICC Affinity Processor 46 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000001,0x0000002F,0x00000001,0x00000000), //GICC Affinity Processor 47 >> >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000030,0x00000001,0x00000000), //GICC Affinity Processor 48 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000031,0x00000001,0x00000000), //GICC Affinity Processor 49 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000032,0x00000001,0x00000000), //GICC Affinity Processor 50 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000033,0x00000001,0x00000000), //GICC Affinity Processor 51 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000034,0x00000001,0x00000000), //GICC Affinity Processor 52 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000035,0x00000001,0x00000000), //GICC Affinity Processor 53 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000036,0x00000001,0x00000000), //GICC Affinity Processor 54 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000037,0x00000001,0x00000000), //GICC Affinity Processor 55 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000038,0x00000001,0x00000000), //GICC Affinity Processor 56 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000039,0x00000001,0x00000000), //GICC Affinity Processor 57 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003A,0x00000001,0x00000000), //GICC Affinity Processor 58 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003B,0x00000001,0x00000000), //GICC Affinity Processor 59 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003C,0x00000001,0x00000000), //GICC Affinity Processor 60 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003D,0x00000001,0x00000000), //GICC Affinity Processor 61 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003E,0x00000001,0x00000000), //GICC Affinity Processor 62 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003F,0x00000001,0x00000000), //GICC Affinity Processor 63 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000040,0x00000001,0x00000000), //GICC Affinity Processor 64 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000041,0x00000001,0x00000000), //GICC Affinity Processor 65 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000042,0x00000001,0x00000000), //GICC Affinity Processor 66 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000043,0x00000001,0x00000000), //GICC Affinity Processor 67 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000044,0x00000001,0x00000000), //GICC Affinity Processor 68 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000045,0x00000001,0x00000000), //GICC Affinity Processor 69 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000046,0x00000001,0x00000000), //GICC Affinity Processor 70 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000047,0x00000001,0x00000000), //GICC Affinity Processor 71 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000048,0x00000001,0x00000000), //GICC Affinity Processor 72 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000049,0x00000001,0x00000000), //GICC Affinity Processor 73 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004A,0x00000001,0x00000000), //GICC Affinity Processor 74 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004B,0x00000001,0x00000000), //GICC Affinity Processor 75 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004C,0x00000001,0x00000000), //GICC Affinity Processor 76 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004D,0x00000001,0x00000000), //GICC Affinity Processor 77 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004E,0x00000001,0x00000000), //GICC Affinity Processor 78 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000004F,0x00000001,0x00000000), //GICC Affinity Processor 79 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000050,0x00000001,0x00000000), //GICC Affinity Processor 80 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000051,0x00000001,0x00000000), //GICC Affinity Processor 81 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000052,0x00000001,0x00000000), //GICC Affinity Processor 82 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000053,0x00000001,0x00000000), //GICC Affinity Processor 83 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000054,0x00000001,0x00000000), //GICC Affinity Processor 84 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000055,0x00000001,0x00000000), //GICC Affinity Processor 85 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000056,0x00000001,0x00000000), //GICC Affinity Processor 86 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000057,0x00000001,0x00000000), //GICC Affinity Processor 87 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000058,0x00000001,0x00000000), //GICC Affinity Processor 88 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000059,0x00000001,0x00000000), //GICC Affinity Processor 89 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005A,0x00000001,0x00000000), //GICC Affinity Processor 90 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005B,0x00000001,0x00000000), //GICC Affinity Processor 91 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005C,0x00000001,0x00000000), //GICC Affinity Processor 92 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005D,0x00000001,0x00000000), //GICC Affinity Processor 93 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005E,0x00000001,0x00000000), //GICC Affinity Processor 94 >> - EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000005F,0x00000001,0x00000000), //GICC Affinity Processor 95 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000030,0x00000001,0x00000000), //GICC Affinity Processor 48 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000031,0x00000001,0x00000000), //GICC Affinity Processor 49 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000032,0x00000001,0x00000000), //GICC Affinity Processor 50 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000033,0x00000001,0x00000000), //GICC Affinity Processor 51 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000034,0x00000001,0x00000000), //GICC Affinity Processor 52 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000035,0x00000001,0x00000000), //GICC Affinity Processor 53 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000036,0x00000001,0x00000000), //GICC Affinity Processor 54 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000037,0x00000001,0x00000000), //GICC Affinity Processor 55 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000038,0x00000001,0x00000000), //GICC Affinity Processor 56 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000039,0x00000001,0x00000000), //GICC Affinity Processor 57 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003A,0x00000001,0x00000000), //GICC Affinity Processor 58 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003B,0x00000001,0x00000000), //GICC Affinity Processor 59 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003C,0x00000001,0x00000000), //GICC Affinity Processor 60 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003D,0x00000001,0x00000000), //GICC Affinity Processor 61 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003E,0x00000001,0x00000000), //GICC Affinity Processor 62 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x0000003F,0x00000001,0x00000000), //GICC Affinity Processor 63 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000040,0x00000001,0x00000000), //GICC Affinity Processor 64 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000041,0x00000001,0x00000000), //GICC Affinity Processor 65 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000042,0x00000001,0x00000000), //GICC Affinity Processor 66 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000043,0x00000001,0x00000000), //GICC Affinity Processor 67 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000044,0x00000001,0x00000000), //GICC Affinity Processor 68 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000045,0x00000001,0x00000000), //GICC Affinity Processor 69 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000046,0x00000001,0x00000000), //GICC Affinity Processor 70 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000002,0x00000047,0x00000001,0x00000000), //GICC Affinity Processor 71 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000048,0x00000001,0x00000000), //GICC Affinity Processor 72 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000049,0x00000001,0x00000000), //GICC Affinity Processor 73 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004A,0x00000001,0x00000000), //GICC Affinity Processor 74 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004B,0x00000001,0x00000000), //GICC Affinity Processor 75 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004C,0x00000001,0x00000000), //GICC Affinity Processor 76 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004D,0x00000001,0x00000000), //GICC Affinity Processor 77 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004E,0x00000001,0x00000000), //GICC Affinity Processor 78 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000004F,0x00000001,0x00000000), //GICC Affinity Processor 79 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000050,0x00000001,0x00000000), //GICC Affinity Processor 80 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000051,0x00000001,0x00000000), //GICC Affinity Processor 81 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000052,0x00000001,0x00000000), //GICC Affinity Processor 82 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000053,0x00000001,0x00000000), //GICC Affinity Processor 83 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000054,0x00000001,0x00000000), //GICC Affinity Processor 84 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000055,0x00000001,0x00000000), //GICC Affinity Processor 85 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000056,0x00000001,0x00000000), //GICC Affinity Processor 86 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000057,0x00000001,0x00000000), //GICC Affinity Processor 87 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000058,0x00000001,0x00000000), //GICC Affinity Processor 88 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x00000059,0x00000001,0x00000000), //GICC Affinity Processor 89 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005A,0x00000001,0x00000000), //GICC Affinity Processor 90 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005B,0x00000001,0x00000000), //GICC Affinity Processor 91 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005C,0x00000001,0x00000000), //GICC Affinity Processor 92 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005D,0x00000001,0x00000000), //GICC Affinity Processor 93 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005E,0x00000001,0x00000000), //GICC Affinity Processor 94 >> + EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000005F,0x00000001,0x00000000), //GICC Affinity Processor 95 >> }, >> { >> - EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000001, 0x00000000), >> + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000000, 0x00000000), >> // EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000003, 0x00000001), >> }, >> }; >> -- >> 2.18.0 >> ^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve 2018-10-29 3:32 [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Ming Huang ` (11 preceding siblings ...) 2018-10-29 3:32 ` [PATCH edk2-platforms v1 12/12] Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot Ming Huang @ 2018-10-29 11:43 ` Leif Lindholm 2018-10-29 15:01 ` Ming Huang 12 siblings, 1 reply; 35+ messages in thread From: Leif Lindholm @ 2018-10-29 11:43 UTC (permalink / raw) To: Ming Huang Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 Hi Ming, On Mon, Oct 29, 2018 at 11:32:37AM +0800, Ming Huang wrote: > The major features of this patchset include: > 1. Modify acpi table for ACS test; > 2. Enable secure boot for SBBR-SCT; > 3. Other change for ACS test; > > For this SCT issue: > RT.SetVariable - Create one Time Base Auth Variable, the expect return status > should be EFI_SUCCESS – FAILURE > > The resule of fail is effected by the edk2 commit(67943427). > If Modify Variable.c as below, this case will pass. > --- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c > +++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c > @@ -3188,7 +3188,7 @@ VariableServiceSetVariable ( > // Maybe it's the delete operation of common authenticated variable at > // user physical presence. > // > if (DataSize != AUTHINFO_SIZE) { > - return EFI_UNSUPPORTED; > + return EFI_SECURITY_VIOLATION; > > I supect ACS SCT compatible with UEFI 2.7 spec. We will analyze this issue > continue. > > Code can also be found in github: > https://github.com/hisilicon/OpenPlatformPkg.git > branch: d06-acs-platforms > > > Ming Huang (12): > Silicon/Hisilicon/D06: Add watchdog to GTDT > Silicon/Hisilicon/D06: Drop _CID for fwts issue > Silicon/Hisilicon/D06: Fix fwts issue in Dbg2 > Silicon/Hisilicon/D06: Fix fwts issue in FADT > Hisilicon/D06: Move some functions to OemMiscLib > Silicon/Hisilicon: Modify for SBBR fwts SetTime_Func test case > Hisilicon/D0x: Fix secure boot bug in FlashFvbDxe > Hisilicon/D06: Fix SBBR-SCT AuthVar issue > Silicon/Hisilicon/D06: Reserve ECAM resource in DSDT > Silicon/Hisilicon/D06: Modify GTDT timer flag > Hisilicon/D06: Modify Gic base > Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot > > Silicon/Hisilicon/HisiPkg.dec | 1 + > Silicon/Hisilicon/Hisilicon.dsc.inc | 16 ++ > Platform/Hisilicon/D03/D03.dsc | 5 + > Platform/Hisilicon/D05/D05.dsc | 5 + > Platform/Hisilicon/D06/D06.dsc | 9 +- > .../Drivers/FlashFvbDxe/FlashFvbDxe.inf | 2 + > .../M41T83RealTimeClockLib.inf | 3 +- > .../Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 2 +- > .../Hisilicon/Include/Library/OemMiscLib.h | 9 + > .../M41T83RealTimeClock.h | 8 +- > .../D06/Library/OemMiscLibD06/OemMiscLibD06.c | 82 ++++++ > .../Drivers/FlashFvbDxe/FlashFvbDxe.c | 14 +- > .../M41T83RealTimeClockLib.c | 263 ++++++++++++------ > .../Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 1 - > .../Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 48 ---- > .../Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 36 ++- > .../Hi1620/Hi1620AcpiTables/Fadt.aslc | 2 +- > .../Hi1620/Hi1620AcpiTables/Gtdt.aslc | 35 +-- > .../Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 4 +- > .../Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 18 +- > .../Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 194 ++++++------- > .../Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 2 +- Can you ensure you use the options specified in https://github.com/tianocore/tianocore.github.io/wiki/Laszlo's-unkempt-git-guide-for-edk2-contributors-and-maintainers#contrib-23 when generating your patches? This way we don't need to guess which files are being modified when looking at the summary. Regards, Leif > 22 files changed, 475 insertions(+), 284 deletions(-) > > -- > 2.18.0 > ^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve 2018-10-29 11:43 ` [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Leif Lindholm @ 2018-10-29 15:01 ` Ming Huang 2018-10-29 16:14 ` Leif Lindholm 0 siblings, 1 reply; 35+ messages in thread From: Ming Huang @ 2018-10-29 15:01 UTC (permalink / raw) To: Leif Lindholm Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 Hi Leif, Yes, I generated this patchset with the same git configuration as previous patchset: ([PATCH edk2-platforms v5 00/28] Upload for D06 platform) and use the same command: git format-patch --stat=1000 --stat-graph-width=20 --cover-letter --no-binary --subject-prefix="PATCH edk2-platforms" -12 -v 1 -o v1 I check the URL below, no important different configuration found. Have problems with this patchset? Thanks, Ming On 10/29/2018 7:43 PM, Leif Lindholm wrote: > Hi Ming, > > On Mon, Oct 29, 2018 at 11:32:37AM +0800, Ming Huang wrote: >> The major features of this patchset include: >> 1. Modify acpi table for ACS test; >> 2. Enable secure boot for SBBR-SCT; >> 3. Other change for ACS test; >> >> For this SCT issue: >> RT.SetVariable - Create one Time Base Auth Variable, the expect return status >> should be EFI_SUCCESS – FAILURE >> >> The resule of fail is effected by the edk2 commit(67943427). >> If Modify Variable.c as below, this case will pass. >> --- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c >> +++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c >> @@ -3188,7 +3188,7 @@ VariableServiceSetVariable ( >> // Maybe it's the delete operation of common authenticated variable at >> // user physical presence. >> // >> if (DataSize != AUTHINFO_SIZE) { >> - return EFI_UNSUPPORTED; >> + return EFI_SECURITY_VIOLATION; >> >> I supect ACS SCT compatible with UEFI 2.7 spec. We will analyze this issue >> continue. >> >> Code can also be found in github: >> https://github.com/hisilicon/OpenPlatformPkg.git >> branch: d06-acs-platforms >> >> >> Ming Huang (12): >> Silicon/Hisilicon/D06: Add watchdog to GTDT >> Silicon/Hisilicon/D06: Drop _CID for fwts issue >> Silicon/Hisilicon/D06: Fix fwts issue in Dbg2 >> Silicon/Hisilicon/D06: Fix fwts issue in FADT >> Hisilicon/D06: Move some functions to OemMiscLib >> Silicon/Hisilicon: Modify for SBBR fwts SetTime_Func test case >> Hisilicon/D0x: Fix secure boot bug in FlashFvbDxe >> Hisilicon/D06: Fix SBBR-SCT AuthVar issue >> Silicon/Hisilicon/D06: Reserve ECAM resource in DSDT >> Silicon/Hisilicon/D06: Modify GTDT timer flag >> Hisilicon/D06: Modify Gic base >> Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot >> >> Silicon/Hisilicon/HisiPkg.dec | 1 + >> Silicon/Hisilicon/Hisilicon.dsc.inc | 16 ++ >> Platform/Hisilicon/D03/D03.dsc | 5 + >> Platform/Hisilicon/D05/D05.dsc | 5 + >> Platform/Hisilicon/D06/D06.dsc | 9 +- >> .../Drivers/FlashFvbDxe/FlashFvbDxe.inf | 2 + >> .../M41T83RealTimeClockLib.inf | 3 +- >> .../Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 2 +- >> .../Hisilicon/Include/Library/OemMiscLib.h | 9 + >> .../M41T83RealTimeClock.h | 8 +- >> .../D06/Library/OemMiscLibD06/OemMiscLibD06.c | 82 ++++++ >> .../Drivers/FlashFvbDxe/FlashFvbDxe.c | 14 +- >> .../M41T83RealTimeClockLib.c | 263 ++++++++++++------ >> .../Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 1 - >> .../Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 48 ---- >> .../Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 36 ++- >> .../Hi1620/Hi1620AcpiTables/Fadt.aslc | 2 +- >> .../Hi1620/Hi1620AcpiTables/Gtdt.aslc | 35 +-- >> .../Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 4 +- >> .../Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 18 +- >> .../Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 194 ++++++------- >> .../Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 2 +- > > Can you ensure you use the options specified in > https://github.com/tianocore/tianocore.github.io/wiki/Laszlo's-unkempt-git-guide-for-edk2-contributors-and-maintainers#contrib-23 > when generating your patches? > > This way we don't need to guess which files are being modified when > looking at the summary. > > Regards, > > Leif > >> 22 files changed, 475 insertions(+), 284 deletions(-) >> >> -- >> 2.18.0 >> ^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve 2018-10-29 15:01 ` Ming Huang @ 2018-10-29 16:14 ` Leif Lindholm [not found] ` <5eaaf9d7-e76b-2e98-f4c8-bb0a27007cfc@huawei.com> 0 siblings, 1 reply; 35+ messages in thread From: Leif Lindholm @ 2018-10-29 16:14 UTC (permalink / raw) To: Ming Huang Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, huangming23, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 On Mon, Oct 29, 2018 at 11:01:19PM +0800, Ming Huang wrote: > Hi Leif, > > Yes, I generated this patchset with the same git configuration as previous patchset: > ([PATCH edk2-platforms v5 00/28] Upload for D06 platform) > and use the same command: > git format-patch --stat=1000 --stat-graph-width=20 --cover-letter --no-binary --subject-prefix="PATCH edk2-platforms" -12 -v 1 -o v1 > > I check the URL below, no important different configuration found. > Have problems with this patchset? See below: > Thanks, > Ming > > On 10/29/2018 7:43 PM, Leif Lindholm wrote: > > Hi Ming, > > > > On Mon, Oct 29, 2018 at 11:32:37AM +0800, Ming Huang wrote: > >> The major features of this patchset include: > >> 1. Modify acpi table for ACS test; > >> 2. Enable secure boot for SBBR-SCT; > >> 3. Other change for ACS test; > >> > >> For this SCT issue: > >> RT.SetVariable - Create one Time Base Auth Variable, the expect return status > >> should be EFI_SUCCESS – FAILURE > >> > >> The resule of fail is effected by the edk2 commit(67943427). > >> If Modify Variable.c as below, this case will pass. > >> --- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c > >> +++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c > >> @@ -3188,7 +3188,7 @@ VariableServiceSetVariable ( > >> // Maybe it's the delete operation of common authenticated variable at > >> // user physical presence. > >> // > >> if (DataSize != AUTHINFO_SIZE) { > >> - return EFI_UNSUPPORTED; > >> + return EFI_SECURITY_VIOLATION; > >> > >> I supect ACS SCT compatible with UEFI 2.7 spec. We will analyze this issue > >> continue. > >> > >> Code can also be found in github: > >> https://github.com/hisilicon/OpenPlatformPkg.git > >> branch: d06-acs-platforms > >> > >> > >> Ming Huang (12): > >> Silicon/Hisilicon/D06: Add watchdog to GTDT > >> Silicon/Hisilicon/D06: Drop _CID for fwts issue > >> Silicon/Hisilicon/D06: Fix fwts issue in Dbg2 > >> Silicon/Hisilicon/D06: Fix fwts issue in FADT > >> Hisilicon/D06: Move some functions to OemMiscLib > >> Silicon/Hisilicon: Modify for SBBR fwts SetTime_Func test case > >> Hisilicon/D0x: Fix secure boot bug in FlashFvbDxe > >> Hisilicon/D06: Fix SBBR-SCT AuthVar issue > >> Silicon/Hisilicon/D06: Reserve ECAM resource in DSDT > >> Silicon/Hisilicon/D06: Modify GTDT timer flag > >> Hisilicon/D06: Modify Gic base > >> Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot > >> > >> Silicon/Hisilicon/HisiPkg.dec | 1 + > >> Silicon/Hisilicon/Hisilicon.dsc.inc | 16 ++ > >> Platform/Hisilicon/D03/D03.dsc | 5 + > >> Platform/Hisilicon/D05/D05.dsc | 5 + > >> Platform/Hisilicon/D06/D06.dsc | 9 +- > >> .../Drivers/FlashFvbDxe/FlashFvbDxe.inf | 2 + > >> .../M41T83RealTimeClockLib.inf | 3 +- > >> .../Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 2 +- > >> .../Hisilicon/Include/Library/OemMiscLib.h | 9 + > >> .../M41T83RealTimeClock.h | 8 +- > >> .../D06/Library/OemMiscLibD06/OemMiscLibD06.c | 82 ++++++ > >> .../Drivers/FlashFvbDxe/FlashFvbDxe.c | 14 +- > >> .../M41T83RealTimeClockLib.c | 263 ++++++++++++------ > >> .../Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 1 - > >> .../Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 48 ---- > >> .../Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 36 ++- > >> .../Hi1620/Hi1620AcpiTables/Fadt.aslc | 2 +- > >> .../Hi1620/Hi1620AcpiTables/Gtdt.aslc | 35 +-- > >> .../Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 4 +- > >> .../Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 18 +- > >> .../Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 194 ++++++------- > >> .../Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 2 +- These ... suggest --stat=1000 was not used. Can you verify please? Regards, Leif ^ permalink raw reply [flat|nested] 35+ messages in thread
[parent not found: <5eaaf9d7-e76b-2e98-f4c8-bb0a27007cfc@huawei.com>]
* Re: [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve [not found] ` <5eaaf9d7-e76b-2e98-f4c8-bb0a27007cfc@huawei.com> @ 2018-10-30 9:37 ` Leif Lindholm 0 siblings, 0 replies; 35+ messages in thread From: Leif Lindholm @ 2018-10-30 9:37 UTC (permalink / raw) To: Huangming (Mark) Cc: Ming Huang, linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, michael.d.kinney, lersek, wanghuiqiang, zhangjinsong2, huangdaode, john.garry, xinliang.liu, zhangfeng56 Hi Ming, I don't know when --stat was introduced, but it was a very long time ago. The oldest version of git I have easily available is 2.1.4, and that handles it properly. Something else must be going on. Regards, Leif On Tue, Oct 30, 2018 at 02:54:42PM +0800, Huangming (Mark) wrote: > Hi Leif, > > The cause of '...' is the git version, it is 2.18.0 in my build server. > I have ask the administrator to upgrade git. > Should I re-send this set(edk2-platforms) with new git version? > > Thanks, > Ming > > On 2018/10/30 0:14, Leif Lindholm wrote: > > On Mon, Oct 29, 2018 at 11:01:19PM +0800, Ming Huang wrote: > >> Hi Leif, > >> > >> Yes, I generated this patchset with the same git configuration as previous patchset: > >> ([PATCH edk2-platforms v5 00/28] Upload for D06 platform) > >> and use the same command: > >> git format-patch --stat=1000 --stat-graph-width=20 --cover-letter --no-binary --subject-prefix="PATCH edk2-platforms" -12 -v 1 -o v1 > >> > >> I check the URL below, no important different configuration found. > >> Have problems with this patchset? > > > > See below: > > > >> Thanks, > >> Ming > >> > >> On 10/29/2018 7:43 PM, Leif Lindholm wrote: > >>> Hi Ming, > >>> > >>> On Mon, Oct 29, 2018 at 11:32:37AM +0800, Ming Huang wrote: > >>>> The major features of this patchset include: > >>>> 1. Modify acpi table for ACS test; > >>>> 2. Enable secure boot for SBBR-SCT; > >>>> 3. Other change for ACS test; > >>>> > >>>> For this SCT issue: > >>>> RT.SetVariable - Create one Time Base Auth Variable, the expect return status > >>>> should be EFI_SUCCESS – FAILURE > >>>> > >>>> The resule of fail is effected by the edk2 commit(67943427). > >>>> If Modify Variable.c as below, this case will pass. > >>>> --- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c > >>>> +++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c > >>>> @@ -3188,7 +3188,7 @@ VariableServiceSetVariable ( > >>>> // Maybe it's the delete operation of common authenticated variable at > >>>> // user physical presence. > >>>> // > >>>> if (DataSize != AUTHINFO_SIZE) { > >>>> - return EFI_UNSUPPORTED; > >>>> + return EFI_SECURITY_VIOLATION; > >>>> > >>>> I supect ACS SCT compatible with UEFI 2.7 spec. We will analyze this issue > >>>> continue. > >>>> > >>>> Code can also be found in github: > >>>> https://github.com/hisilicon/OpenPlatformPkg.git > >>>> branch: d06-acs-platforms > >>>> > >>>> > >>>> Ming Huang (12): > >>>> Silicon/Hisilicon/D06: Add watchdog to GTDT > >>>> Silicon/Hisilicon/D06: Drop _CID for fwts issue > >>>> Silicon/Hisilicon/D06: Fix fwts issue in Dbg2 > >>>> Silicon/Hisilicon/D06: Fix fwts issue in FADT > >>>> Hisilicon/D06: Move some functions to OemMiscLib > >>>> Silicon/Hisilicon: Modify for SBBR fwts SetTime_Func test case > >>>> Hisilicon/D0x: Fix secure boot bug in FlashFvbDxe > >>>> Hisilicon/D06: Fix SBBR-SCT AuthVar issue > >>>> Silicon/Hisilicon/D06: Reserve ECAM resource in DSDT > >>>> Silicon/Hisilicon/D06: Modify GTDT timer flag > >>>> Hisilicon/D06: Modify Gic base > >>>> Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot > >>>> > >>>> Silicon/Hisilicon/HisiPkg.dec | 1 + > >>>> Silicon/Hisilicon/Hisilicon.dsc.inc | 16 ++ > >>>> Platform/Hisilicon/D03/D03.dsc | 5 + > >>>> Platform/Hisilicon/D05/D05.dsc | 5 + > >>>> Platform/Hisilicon/D06/D06.dsc | 9 +- > >>>> .../Drivers/FlashFvbDxe/FlashFvbDxe.inf | 2 + > >>>> .../M41T83RealTimeClockLib.inf | 3 +- > >>>> .../Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 2 +- > >>>> .../Hisilicon/Include/Library/OemMiscLib.h | 9 + > >>>> .../M41T83RealTimeClock.h | 8 +- > >>>> .../D06/Library/OemMiscLibD06/OemMiscLibD06.c | 82 ++++++ > >>>> .../Drivers/FlashFvbDxe/FlashFvbDxe.c | 14 +- > >>>> .../M41T83RealTimeClockLib.c | 263 ++++++++++++------ > >>>> .../Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 1 - > >>>> .../Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 48 ---- > >>>> .../Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 36 ++- > >>>> .../Hi1620/Hi1620AcpiTables/Fadt.aslc | 2 +- > >>>> .../Hi1620/Hi1620AcpiTables/Gtdt.aslc | 35 +-- > >>>> .../Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 4 +- > >>>> .../Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 18 +- > >>>> .../Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 194 ++++++------- > >>>> .../Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 2 +- > > > > These ... suggest --stat=1000 was not used. Can you verify please? > > > > Regards, > > > > Leif > > > > . > > > > -- > Best Regards, > > Ming > ^ permalink raw reply [flat|nested] 35+ messages in thread
end of thread, other threads:[~2018-11-15 7:09 UTC | newest]
Thread overview: 35+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-10-29 3:32 [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Ming Huang
2018-10-29 3:32 ` [PATCH edk2-platforms v1 01/12] Silicon/Hisilicon/D06: Add watchdog to GTDT Ming Huang
2018-11-14 0:39 ` Leif Lindholm
2018-10-29 3:32 ` [PATCH edk2-platforms v1 02/12] Silicon/Hisilicon/D06: Drop _CID for fwts issue Ming Huang
2018-11-14 0:48 ` Leif Lindholm
2018-10-29 3:32 ` [PATCH edk2-platforms v1 03/12] Silicon/Hisilicon/D06: Fix fwts issue in Dbg2 Ming Huang
2018-11-14 0:50 ` Leif Lindholm
2018-10-29 3:32 ` [PATCH edk2-platforms v1 04/12] Silicon/Hisilicon/D06: Fix fwts issue in FADT Ming Huang
2018-11-14 0:50 ` Leif Lindholm
2018-10-29 3:32 ` [PATCH edk2-platforms v1 05/12] Hisilicon/D06: Move some functions to OemMiscLib Ming Huang
2018-11-14 0:04 ` Leif Lindholm
2018-11-14 14:30 ` Ming Huang
2018-10-29 3:32 ` [PATCH edk2-platforms v1 06/12] Silicon/Hisilicon: Modify for SBBR fwts SetTime_Func test case Ming Huang
[not found] ` <20181113235222.amykmhqlh5gltg7p@bivouac.eciton.net>
2018-11-14 14:31 ` Ming Huang
2018-11-14 17:20 ` Leif Lindholm
2018-10-29 3:32 ` [PATCH edk2-platforms v1 07/12] Hisilicon/D0x: Fix secure boot bug in FlashFvbDxe Ming Huang
2018-11-13 23:57 ` Leif Lindholm
2018-11-15 7:09 ` Ming Huang
2018-10-29 3:32 ` [PATCH edk2-platforms v1 08/12] Hisilicon/D06: Fix SBBR-SCT AuthVar issue Ming Huang
2018-11-14 0:18 ` Leif Lindholm
2018-11-14 14:31 ` Ming Huang
2018-10-29 3:32 ` [PATCH edk2-platforms v1 09/12] Silicon/Hisilicon/D06: Reserve ECAM resource in DSDT Ming Huang
2018-11-14 0:23 ` Leif Lindholm
2018-10-29 3:32 ` [PATCH edk2-platforms v1 10/12] Silicon/Hisilicon/D06: Modify GTDT timer flag Ming Huang
2018-11-14 0:24 ` Leif Lindholm
2018-10-29 3:32 ` [PATCH edk2-platforms v1 11/12] Hisilicon/D06: Modify Gic base Ming Huang
2018-11-14 0:29 ` Leif Lindholm
2018-11-14 14:31 ` Ming Huang
2018-10-29 3:32 ` [PATCH edk2-platforms v1 12/12] Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot Ming Huang
2018-11-14 0:36 ` Leif Lindholm
2018-11-14 14:32 ` Ming Huang
2018-10-29 11:43 ` [PATCH edk2-platforms v1 00/12] Fix D06 SBSA/SBBR issue and improve Leif Lindholm
2018-10-29 15:01 ` Ming Huang
2018-10-29 16:14 ` Leif Lindholm
[not found] ` <5eaaf9d7-e76b-2e98-f4c8-bb0a27007cfc@huawei.com>
2018-10-30 9:37 ` Leif Lindholm
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