From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::441; helo=mail-wr1-x441.google.com; envelope-from=leif.lindholm@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr1-x441.google.com (mail-wr1-x441.google.com [IPv6:2a00:1450:4864:20::441]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id EAC9A2118C512 for ; Tue, 13 Nov 2018 16:24:03 -0800 (PST) Received: by mail-wr1-x441.google.com with SMTP id l9so2441709wrt.13 for ; Tue, 13 Nov 2018 16:24:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=4+HAjBgJuTor71ngGo5JlcVr8pjD2t3MWmWDKF5wE4g=; b=UG8/Y5PAPftjM+o9+2wJ8cShC5VvT3BYQMEqOVSeuyhXnMp89xNeTsTuomH1CChtXc otWkDLMYtUDHSkhlYqZ37R3mAK5LDL4s2jqQFsY9Fyly7WPjPHsFgKScjSPHLBb95IJ4 yc5TznBAs+DTq/zvY3ZgJEZYLlyuKd1b18v5Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=4+HAjBgJuTor71ngGo5JlcVr8pjD2t3MWmWDKF5wE4g=; b=fTnCkanSuqEr/Hwof+mxgV+TofujrXtTw6L2zONCrjGDVvmG/6ojsoBfEzTv01lqUz DY4ACMtp9bZl+hnj+KYHNKMAIvXZnUZaCTY9sl6LbGCJJmJ00T//I02XV6jRHZ4wKnqY GRsNfqZuyjqbA6xluQbO3G5EvGPHRgn72C1+L637fbCcrhc81ahCNquSgpe63Z8HCfvp 3Ih32XDV9DBsf01G2RzzrSJ/AzyT4of9rCBHXikbUS4K23mqwL0o0WVDxa1O1b8tu7FM qlwYiV9aCEaSvuzLa28lJbj10T55NFAmRgn6+8AH5mfjFChPKC/RwQ9UmqRmzyADbwUn 3whg== X-Gm-Message-State: AGRZ1gItb7W538zJGfBCDlNnKnvRDbWrL0k7LL3E00Pd6NCk9vD9vB1b F0lbVyarcxn0FCWvuzhoEIz6sQ== X-Google-Smtp-Source: AJdET5eqJwv3o+0jz37o6xLFPJN+FVzYIx6bBx9MwqbgiBFhBAAc0sN31eAeyttoivFVVanp7wRiGQ== X-Received: by 2002:a5d:5189:: with SMTP id k9-v6mr877538wrv.121.1542155042591; Tue, 13 Nov 2018 16:24:02 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id i7-v6sm18658187wrs.55.2018.11.13.16.24.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 13 Nov 2018 16:24:01 -0800 (PST) Date: Wed, 14 Nov 2018 00:24:00 +0000 From: Leif Lindholm To: Ming Huang Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org, zhangfeng56@huawei.com Message-ID: <20181114002400.dwwec47sbwjm3usc@bivouac.eciton.net> References: <20181029033249.45363-1-ming.huang@linaro.org> <20181029033249.45363-11-ming.huang@linaro.org> MIME-Version: 1.0 In-Reply-To: <20181029033249.45363-11-ming.huang@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms v1 10/12] Silicon/Hisilicon/D06: Modify GTDT timer flag X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 14 Nov 2018 00:24:04 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Mon, Oct 29, 2018 at 11:32:47AM +0800, Ming Huang wrote: > Add always on capibility to GTDT timer flag to fix SBSA 36 fail > issue: > 36 : SYS Timer if PE Timer not ON > PE Timers are not always-on. > Failed on PE - 0 for Level= 3 : Result: --FAIL-- 1 > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ming Huang Reviewed-by: Leif Lindholm > --- > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc > index d07070a912..5cab639cc5 100644 > --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc > +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc > @@ -28,8 +28,10 @@ > #define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY > #define GTDT_TIMER_ACTIVE_HIGH 0 > #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF > +#define GTDT_TIMER_ALWAYS_ON_CAPABILITY EFI_ACPI_6_2_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY > + > +#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ALWAYS_ON_CAPABILITY | GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED) > > -#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED) > #define GENERIC_WATCHDOG_CONTROL_BASE_CPU1_TOTEM_A 0x9C200000 > #define GENERIC_WATCHDOG_REFRESH_BASE_CPU1_TOTEM_A 0X9C210000 > > -- > 2.18.0 >